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soc: xlnx: zynq7000: add FPU support #83825

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@mausys mausys commented Jan 10, 2025

According to its datasheet the Zynq 7000 has a VFPv3U FPU

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mausys commented Jan 10, 2025

cmake/gcc-m-fpu.cmake Outdated Show resolved Hide resolved
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mausys commented Jan 13, 2025

i checked the FPU on the HW with this function:

static void fpu_info(void)
{
      int val_fpsid = 0;
      int val_mvfr0 = 0;
      int val_mvfr1 = 0;

      __asm__ ("vmrs  %[output], FPSID"  : [output] "=r" (val_fpsid));
      __asm__ ("vmrs  %[output], MVFR0"  : [output] "=r" (val_mvfr0));
      __asm__ ("vmrs  %[output], MVFR1"  : [output] "=r" (val_mvfr1));

      LOG_INF("fpsid=0x%x mvfr0=0x%x mvfr1=0x%x\n", val_fpsid, val_mvfr0, val_mvfr1);
}

output:
fpsid=0x41033094 mvfr0=0x10110222 mvfr1=0x1111111

So according to the reference manual (https://developer.arm.com/documentation/ddi0487/latest/) fp16 hw conversion is supported, but not the floating point exception trapping. But does it matter? VFP_FEATURE_TRAP isn't used anywhere.

According to its datasheet the Zynq 7000 has a VFPv3 FPU

Signed-off-by: Simon Maurer <mail@maurer.systems>
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mausys commented Jan 17, 2025

I removed the half-precision support. According to MVFR1 register only conversion and not arithmetic is supported and I'm not sure if for the gcc -mfpu=vfpv3-fp16 flag both must be supported.

Floating-Point System ID register (FPSID)        = 0x41033094
AArch32 Media and VFP Feature Register 0 (MVFR0) = 0x10110222
AArch32 Media and VFP Feature Register 0 (MVFR1) =  0x1111111

MVFR1 SIMDFMAC, bits [31:28] = 0; FMAC is not supported

Signed-off-by: Simon Maurer <mail@maurer.systems>
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mausys commented Jan 20, 2025

btw wouldn't it be simpler if the SOC just selects the FPU architecture that can directly be used as gcc flag, instead of selecting the FPU features in the SOC Kconfig and guessing the FPU architecture in gcc-m-fpu.cmake?

e.g. select FPU in the SOC Kconfig:

select FPU_ARCH_VFPV3

and in Kconfig.vfp

config FPU_ARCH_VFPV3
	bool
	select CPU_HAS_VFP
	select VFP_FEATURE_SINGLE_PRECISION
	select VFP_FEATURE_DOUBLE_PRECISION
	select VFP_FEATURE_REGS_S64_D32

Also the VFP_FEATURE_FMAC/VFP_FEATURE_FMAC/VFP_FEATURE_TRAP/VFP_FEATURE_HALF_PRECISION aren't used in zephyr, only the number of FPU registers are important for a thread context switch.

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