-
Notifications
You must be signed in to change notification settings - Fork 6.9k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
soc: xlnx: zynq7000: add FPU support #83825
base: main
Are you sure you want to change the base?
Conversation
i checked the FPU on the HW with this function:
output: So according to the reference manual (https://developer.arm.com/documentation/ddi0487/latest/) fp16 hw conversion is supported, but not the floating point exception trapping. But does it matter? VFP_FEATURE_TRAP isn't used anywhere. |
According to its datasheet the Zynq 7000 has a VFPv3 FPU Signed-off-by: Simon Maurer <mail@maurer.systems>
I removed the half-precision support. According to MVFR1 register only conversion and not arithmetic is supported and I'm not sure if for the gcc -mfpu=vfpv3-fp16 flag both must be supported. |
Floating-Point System ID register (FPSID) = 0x41033094 AArch32 Media and VFP Feature Register 0 (MVFR0) = 0x10110222 AArch32 Media and VFP Feature Register 0 (MVFR1) = 0x1111111 MVFR1 SIMDFMAC, bits [31:28] = 0; FMAC is not supported Signed-off-by: Simon Maurer <mail@maurer.systems>
btw wouldn't it be simpler if the SOC just selects the FPU architecture that can directly be used as gcc flag, instead of selecting the FPU features in the SOC Kconfig and guessing the FPU architecture in gcc-m-fpu.cmake? e.g. select FPU in the SOC Kconfig:
and in Kconfig.vfp
Also the VFP_FEATURE_FMAC/VFP_FEATURE_FMAC/VFP_FEATURE_TRAP/VFP_FEATURE_HALF_PRECISION aren't used in zephyr, only the number of FPU registers are important for a thread context switch. |
According to its datasheet the Zynq 7000 has a VFPv3U FPU