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Enable SPI on i.MX95 M7 #83630

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Enable SPI on i.MX95 M7 #83630

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24a9ee7
dts: arm: nxp_imx95_m7: add lpspi nodes
yangbolu1991 Jan 7, 2025
b023a79
boards: nxp: imx95_evk: add lpspi1 pinctrl in dtsi
yangbolu1991 Jan 7, 2025
473d971
boards: nxp: imx95_evk_mimx9596_m7: enable SPI1 interface
yangbolu1991 Jan 7, 2025
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8 changes: 8 additions & 0 deletions boards/nxp/imx95_evk/doc/index.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,8 @@ The Zephyr ``imx95_evk/mimx9596/m7`` board target supports the following hardwar
+-----------+------------+-------------------------------------+
| TPM | on-chip | tpm |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+

The Zephyr ``imx95_evk/mimx9596/a55`` and ``imx95_evk/mimx9596/a55/smp`` board targets support
the following hardware features:
Expand Down Expand Up @@ -131,6 +133,12 @@ oscilloscope.
Channel 2 signal routed to resistance R881.
Channel 3 signal routed to resistance R882.

SPI
---

SPI1 on J35 is enabled for M7.
R1217/R1218/R1219/R1220 should be soldered with 0R resistances.
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Do you mean need to rework the board? If yes, suggest to change it to be like the following:
The EVK board need to be reworked to solder R1217/R1218/R1219/R1220 with 0R resistances.

And is there any testcase available can be used to verify SPI on the board? If no device avaiable, whether can use loopback test: tests/drivers/spi/spi_loopback ?



Programming and Debugging (A55)
*******************************
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12 changes: 12 additions & 0 deletions boards/nxp/imx95_evk/imx95_evk-pinctrl.dtsi
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Expand Up @@ -28,6 +28,18 @@
};
};

lpspi1_default: lpspi1_default {
group0 {
pinmux = <&iomuxc_sai1_txfs_lpspi_pcs_lpspi1_pcs0>,
<&iomuxc_sai1_txd0_lpspi_sck_lpspi1_sck>,
<&iomuxc_sai1_txc_lpspi_sin_lpspi1_sin>,
<&iomuxc_sai1_rxd0_lpspi_sout_lpspi1_sout>;
bias-pull-down;
slew-rate = "slightly_fast";
drive-strength = "x4";
};
};

lpuart1_default: lpuart1_default {
group0 {
pinmux = <&iomuxc_uart1_rxd_lpuart_rx_lpuart1_rx>,
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6 changes: 6 additions & 0 deletions boards/nxp/imx95_evk/imx95_evk_mimx9596_m7.dts
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Expand Up @@ -35,6 +35,12 @@
status = "okay";
};

&lpspi1 {
pinctrl-0 = <&lpspi1_default>;
pinctrl-names = "default";
status = "okay";
};

&lpuart3 {
status = "okay";
current-speed = <115200>;
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1 change: 1 addition & 0 deletions boards/nxp/imx95_evk/imx95_evk_mimx9596_m7.yaml
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Expand Up @@ -18,4 +18,5 @@ supported:
- uart
- i2c
- pwm
- spi
vendor: nxp
1 change: 1 addition & 0 deletions boards/nxp/imx95_evk/imx95_evk_mimx9596_m7_defconfig
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Expand Up @@ -13,3 +13,4 @@ CONFIG_XIP=y
CONFIG_MBOX=y
CONFIG_MBOX_INIT_PRIORITY=0
CONFIG_ARM_SCMI=y
CONFIG_SPI=y
80 changes: 80 additions & 0 deletions dts/arm/nxp/nxp_imx95_m7.dtsi
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Expand Up @@ -148,6 +148,26 @@
status = "disabled";
};

lpspi3: spi@42550000 {
compatible = "nxp,lpspi";
reg = <0x42550000 0x4000>;
interrupts = <61 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpspi4: spi@42560000 {
compatible = "nxp,lpspi";
reg = <0x42560000 0x4000>;
interrupts = <62 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpuart3: serial@42570000 {
compatible = "nxp,imx-lpuart", "nxp,lpuart";
reg = <0x42570000 DT_SIZE_K(64)>;
Expand Down Expand Up @@ -253,6 +273,46 @@
status = "disabled";
};

lpspi5: spi@426f0000 {
compatible = "nxp,lpspi";
reg = <0x426f0000 0x4000>;
interrupts = <177 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI5>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpspi6: spi@42700000 {
compatible = "nxp,lpspi";
reg = <0x42700000 0x4000>;
interrupts = <178 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI6>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpspi7: spi@42710000 {
compatible = "nxp,lpspi";
reg = <0x42710000 0x4000>;
interrupts = <179 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI7>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpspi8: spi@42720000 {
compatible = "nxp,lpspi";
reg = <0x42720000 0x4000>;
interrupts = <180 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI8>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

tpm1: pwm@44310000 {
compatible = "nxp,kinetis-tpm";
reg = <0x44310000 0x88>;
Expand Down Expand Up @@ -295,6 +355,26 @@
status = "disabled";
};

lpspi1: spi@44360000 {
compatible = "nxp,lpspi";
reg = <0x44360000 0x4000>;
interrupts = <16 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpspi2: spi@44370000 {
compatible = "nxp,lpspi";
reg = <0x44370000 0x4000>;
interrupts = <17 3>;
clocks = <&scmi_clk IMX95_CLK_LPSPI2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};

lpuart1: serial@44380000 {
compatible = "nxp,imx-lpuart", "nxp,lpuart";
reg = <0x44380000 DT_SIZE_K(64)>;
Expand Down
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