From eb97377756a47ccd0bdb63b70ab73a24d2253b1a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Fri, 3 Jan 2025 11:51:50 +0100 Subject: [PATCH 1/3] dts: common: nordic: nrf54l: Add clocks to cpu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add clocks property to CPUs. nRF54Lx series is using hfpll as clock source for CPU (and fast peripherals). CPU clock frequency can be derived from frequency of the source clock so clock-frequency property is removed from cpu as it is redundant. nrfx/MDK expects that NRF_CONFIG_CPU_FREQ_MHZ define is set to correct CPU frequency. Modified nrfx CMakeLists.txt to use clock frequency of hfpll instead of CPU clock-frequency property. Signed-off-by: Krzysztof Chruściński --- dts/common/nordic/nrf54l09.dtsi | 2 +- dts/common/nordic/nrf54l20.dtsi | 2 +- dts/common/nordic/nrf54l_05_10_15.dtsi | 4 ++-- modules/hal_nordic/nrfx/CMakeLists.txt | 5 ++++- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/dts/common/nordic/nrf54l09.dtsi b/dts/common/nordic/nrf54l09.dtsi index 37acf9d34cb9..69457461535b 100644 --- a/dts/common/nordic/nrf54l09.dtsi +++ b/dts/common/nordic/nrf54l09.dtsi @@ -27,7 +27,7 @@ compatible = "arm,cortex-m33f"; reg = <0>; device_type = "cpu"; - clock-frequency = ; + clocks = <&hfpll>; #address-cells = <1>; #size-cells = <1>; itm: itm@e0000000 { diff --git a/dts/common/nordic/nrf54l20.dtsi b/dts/common/nordic/nrf54l20.dtsi index e5b019deff93..54e431295afa 100644 --- a/dts/common/nordic/nrf54l20.dtsi +++ b/dts/common/nordic/nrf54l20.dtsi @@ -23,7 +23,7 @@ compatible = "arm,cortex-m33f"; reg = <0>; device_type = "cpu"; - clock-frequency = ; + clocks = <&hfpll>; #address-cells = <1>; #size-cells = <1>; itm: itm@e0000000 { diff --git a/dts/common/nordic/nrf54l_05_10_15.dtsi b/dts/common/nordic/nrf54l_05_10_15.dtsi index 633b1d425e47..c74dd16f9a57 100644 --- a/dts/common/nordic/nrf54l_05_10_15.dtsi +++ b/dts/common/nordic/nrf54l_05_10_15.dtsi @@ -27,7 +27,7 @@ compatible = "arm,cortex-m33f"; reg = <0>; device_type = "cpu"; - clock-frequency = ; + clocks = <&hfpll>; #address-cells = <1>; #size-cells = <1>; itm: itm@e0000000 { @@ -41,7 +41,7 @@ compatible = "nordic,vpr"; reg = <1>; device_type = "cpu"; - clock-frequency = ; + clocks = <&hfpll>; riscv,isa = "rv32emc"; nordic,bus-width = <32>; }; diff --git a/modules/hal_nordic/nrfx/CMakeLists.txt b/modules/hal_nordic/nrfx/CMakeLists.txt index 91c694878cae..3e77e1175d06 100644 --- a/modules/hal_nordic/nrfx/CMakeLists.txt +++ b/modules/hal_nordic/nrfx/CMakeLists.txt @@ -183,7 +183,10 @@ if(DEFINED uicr_path) endif() if(CONFIG_SOC_NRF54L_CPUAPP_COMMON) - dt_prop(clock_frequency PATH "/cpus/cpu@0" PROPERTY "clock-frequency") + # Ideally, hfpll should taken as a phandle from clocks property from cpu but it + # seems that there is no such option in DT cmake functions. Assuming that nrf54l + # is using hfpll as CPU clock source (true for all existing devices). + dt_prop(clock_frequency PATH "/clocks/hfpll" PROPERTY "clock-frequency") math(EXPR clock_frequency_mhz "${clock_frequency} / 1000000") zephyr_compile_definitions("NRF_CONFIG_CPU_FREQ_MHZ=${clock_frequency_mhz}") endif() From 908a7eb3f69a5a450b1b5090fdcb4d54dfe251cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Fri, 3 Jan 2025 11:56:54 +0100 Subject: [PATCH 2/3] boards: nordic: Set 64M CPU frequency for nrf54l20pdk and nrf54l09pdk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit nrf54l20pdk and nrf54l09pdk must use 64 MHz for now. So far it was done by using SOC_NRF54LX_SKIP_CLOCK_CONFIG Kconfig option which was skipping oscillator configuration so that it was running the default frequency (which is 64 MHz). This approach was a bit cryptic because DT was indicating that CPU was running 128 MHz when actual frequency was different (and it was relying on assumption that default frequency is 64 MHz). After adding hfpll as clock source for CPU Kconfig option can be replaced with DT setting where actual frequency is correctly indicated. Since hfpll is a clock source for fast peripherals (e.g. TIMER00) it is possible to have single source of information regarding frequency. Signed-off-by: Krzysztof Chruściński --- boards/nordic/nrf54l09pdk/Kconfig.defconfig | 3 --- boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi | 5 +++++ boards/nordic/nrf54l20pdk/Kconfig.defconfig | 3 --- boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi | 5 +++++ 4 files changed, 10 insertions(+), 6 deletions(-) diff --git a/boards/nordic/nrf54l09pdk/Kconfig.defconfig b/boards/nordic/nrf54l09pdk/Kconfig.defconfig index e495d3e67ce8..44589c9b35b7 100644 --- a/boards/nordic/nrf54l09pdk/Kconfig.defconfig +++ b/boards/nordic/nrf54l09pdk/Kconfig.defconfig @@ -9,9 +9,6 @@ config BT_CTLR config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT -config SOC_NRF54LX_SKIP_CLOCK_CONFIG - default y - config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE default y diff --git a/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi b/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi index c258cb2f4b77..0bdab1b8851d 100644 --- a/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l09pdk/nrf54l09_cpuapp_common.dtsi @@ -27,6 +27,11 @@ status = "okay"; }; +&hfpll { + /* For now use 64 MHz clock for CPU and fast peripherals. */ + clock-frequency = ; +}; + &lfxo { load-capacitors = "internal"; load-capacitance-femtofarad = <15500>; diff --git a/boards/nordic/nrf54l20pdk/Kconfig.defconfig b/boards/nordic/nrf54l20pdk/Kconfig.defconfig index f6987b800879..406a65c88269 100644 --- a/boards/nordic/nrf54l20pdk/Kconfig.defconfig +++ b/boards/nordic/nrf54l20pdk/Kconfig.defconfig @@ -6,9 +6,6 @@ if BOARD_NRF54L20PDK_NRF54L20_CPUAPP config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT -config SOC_NRF54LX_SKIP_CLOCK_CONFIG - default y - config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE default y diff --git a/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi b/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi index cdf6d62a30a7..0d3c1fe98e99 100644 --- a/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi @@ -27,6 +27,11 @@ status = "okay"; }; +&hfpll { + /* For now use 64 MHz clock for CPU and fast peripherals. */ + clock-frequency = ; +}; + &lfxo { load-capacitors = "internal"; load-capacitance-femtofarad = <15500>; From 47c3a5bba2b8a578bfc9781a88c20673eb4b971a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Chru=C5=9Bci=C5=84ski?= Date: Fri, 17 Jan 2025 06:01:28 +0100 Subject: [PATCH 3/3] soc: nordic: nrf54l: Set SystemCoreClock using frequency from DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use cpu clock source frequency as system core clock. Signed-off-by: Krzysztof Chruściński --- soc/nordic/nrf54l/soc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/soc/nordic/nrf54l/soc.c b/soc/nordic/nrf54l/soc.c index abb0f778ac33..5c24df49d54d 100644 --- a/soc/nordic/nrf54l/soc.c +++ b/soc/nordic/nrf54l/soc.c @@ -32,6 +32,7 @@ #include #include +#include LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); @@ -43,9 +44,9 @@ LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); static int nordicsemi_nrf54l_init(void) { /* Update the SystemCoreClock global variable with current core clock - * retrieved from hardware state. + * retrieved from the DT. */ - SystemCoreClockUpdate(); + SystemCoreClock = NRF_PERIPH_GET_FREQUENCY(DT_NODELABEL(cpu)); #if defined(NRF_APPLICATION) /* Enable ICACHE */