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hwmv2: Port STM32WLX SoCs & boards #68613

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2 changes: 1 addition & 1 deletion CODEOWNERS
Original file line number Diff line number Diff line change
Expand Up @@ -428,7 +428,7 @@
/dts/arm64/nxp/ @JiafeiPan
/dts/arm64/renesas/ @lorc @xakep-amatop
/dts/arm/quicklogic/ @fkokosinski @kgugala
/dts/arm/seeed/ @str4t0m
/dts/arm/seeed_studio/ @str4t0m
/dts/arm/st/ @erwango
/dts/arm/st/h7/*stm32h735* @benediktibk
/dts/arm/st/l4/*stm32l451* @benediktibk
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Expand Up @@ -15,4 +15,4 @@ supported:
- usb_device
ram: 96
flash: 512
vendor: seeed
vendor: 96boards
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
board:
name: 96b_carbon
vendor: seeed
vendor: 96boards
socs:
- name: stm32f401xe
Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,7 @@ features:
More details about the board can be found at `96Boards website`_.

The default configuration can be found in
:zephyr_file:`boards/seeed/96b_carbon/96b_carbon_defconfig`
:zephyr_file:`boards/96boards/96b_carbon/96b_carbon_defconfig`

Connections and IOs
===================
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11 changes: 0 additions & 11 deletions boards/boards_legacy/arm/lora_e5_dev_board/Kconfig.defconfig

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11 changes: 0 additions & 11 deletions boards/boards_legacy/arm/lora_e5_mini/Kconfig.defconfig

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8 changes: 0 additions & 8 deletions boards/boards_legacy/arm/nucleo_wl55jc/Kconfig.board

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11 changes: 0 additions & 11 deletions boards/boards_legacy/arm/nucleo_wl55jc/Kconfig.defconfig

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11 changes: 0 additions & 11 deletions boards/boards_legacy/arm/olimex_lora_stm32wl_devkit/revision.cmake

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Original file line number Diff line number Diff line change
@@ -1,8 +1,5 @@
# Olimex LoRa STM32WL DevKit configuration

# Copyright (c) 2022 Martin Jäger <martin@libre.solar>
# SPDX-License-Identifier: Apache-2.0

config BOARD_OLIMEX_LORA_STM32WL_DEVKIT
bool "Olimex LoRa STM32WL DevKit"
depends on SOC_STM32WLE5XX
select SOC_STM32WLE5XX
11 changes: 11 additions & 0 deletions boards/olimex/olimex_lora_stm32wl_devkit/board.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
board:
name: olimex_lora_stm32wl_devkit
vendor: olimex
revision:
format: letter
default: "C"
revisions:
- name: "C"
- name: "D"
socs:
- name: stm32wle5xx
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Original file line number Diff line number Diff line change
Expand Up @@ -81,10 +81,10 @@ hardware features:

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig and dts files:
The default configuration can be found in:

- :zephyr_file:`boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_defconfig`
- :zephyr_file:`boards/arm/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts`
- :zephyr_file:`boards/olimex/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit_defconfig`
- :zephyr_file:`boards/olimex/olimex_lora_stm32wl_devkit/olimex_lora_stm32wl_devkit.dts`

Programming and Debugging
*************************
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Original file line number Diff line number Diff line change
@@ -1,6 +1,3 @@
CONFIG_SOC_SERIES_STM32WLX=y
CONFIG_SOC_STM32WLE5XX=y

# enable uart driver
CONFIG_SERIAL=y

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Original file line number Diff line number Diff line change
@@ -1,8 +1,5 @@
# LoRa-E5 Dev board configuration

# Copyright (c) 2021 Thomas Stranger
# SPDX-License-Identifier: Apache-2.0

config BOARD_LORA_E5_DEV_BOARD
bool "LoRa E5 Development Board"
depends on SOC_STM32WLE5XX
select SOC_STM32WLE5XX
5 changes: 5 additions & 0 deletions boards/seeed_studio/lora_e5_dev_board/board.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
board:
name: lora_e5_dev_board
vendor: seeed studio
socs:
- name: stm32wle5xx
Original file line number Diff line number Diff line change
Expand Up @@ -111,10 +111,9 @@ features:

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig and dts files:

- :zephyr_file:`boards/arm/lora_e5_dev_board/lora_e5_dev_board_defconfig`
- :zephyr_file:`boards/arm/lora_e5_dev_board/lora_e5_dev_board.dts`
The default configuration can be found in:
- :zephyr_file:`boards/seeed_studio/lora_e5_dev_board/lora_e5_dev_board_defconfig`
- :zephyr_file:`boards/seeed_studio/lora_e5_dev_board/lora_e5_dev_board.dts`


Connections and IOs
Expand Down Expand Up @@ -215,7 +214,7 @@ set the RDP option byte to ``AA``,
or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
to perform this read protection regression.
The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
firmware, from which seeed has neither released the source code nor a binary.
firmware, from which seeed studio has neither released the source code nor a binary.
Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
so the system bootloader will only be executed if configured in the option bytes.

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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
*/

/dts-v1/;
#include <seeed/lora-e5.dtsi>
#include <seeed_studio/lora-e5.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
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Original file line number Diff line number Diff line change
Expand Up @@ -17,4 +17,4 @@ supported:
- uart
- watchdog
- lora
vendor: seeed
vendor: seeed studio
Original file line number Diff line number Diff line change
@@ -1,6 +1,3 @@
CONFIG_SOC_SERIES_STM32WLX=y
CONFIG_SOC_STM32WLE5XX=y

# enable uart driver
CONFIG_SERIAL=y

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Original file line number Diff line number Diff line change
@@ -1,8 +1,5 @@
# LoRa-E5 mini configuration

# Copyright (c) 2023 Marcin Niestroj
# SPDX-License-Identifier: Apache-2.0

config BOARD_LORA_E5_MINI
bool "LoRa E5 mini"
depends on SOC_STM32WLE5XX
select SOC_STM32WLE5XX
5 changes: 5 additions & 0 deletions boards/seeed_studio/lora_e5_mini/board.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
board:
name: lora_e5_mini
vendor: seeed studio
socs:
- name: stm32wle5xx
Original file line number Diff line number Diff line change
Expand Up @@ -100,10 +100,10 @@ The Zephyr LoRa-E5 mini configuration supports the following hardware features:

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig and dts files:
The default configuration can be found in:

- :zephyr_file:`boards/arm/lora_e5_mini/lora_e5_mini_defconfig`
- :zephyr_file:`boards/arm/lora_e5_mini/lora_e5_mini.dts`
- :zephyr_file:`boards/seeed_studio/lora_e5_mini/lora_e5_mini_defconfig`
- :zephyr_file:`boards/seeed_studio/lora_e5_mini/lora_e5_mini.dts`


Connections and IOs
Expand Down Expand Up @@ -151,7 +151,7 @@ set the RDP option byte to ``AA``,
or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
to perform this read protection regression.
The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
firmware, from which seeed has neither released the source code nor a binary.
firmware, from which seeed studio has neither released the source code nor a binary.
Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
so the system bootloader will only be executed if configured in the option bytes.

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
*/

/dts-v1/;
#include <seeed/lora-e5.dtsi>
#include <seeed_studio/lora-e5.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
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Original file line number Diff line number Diff line change
Expand Up @@ -16,4 +16,4 @@ supported:
- uart
- watchdog
- lora
vendor: seeed
vendor: seeed studio
Original file line number Diff line number Diff line change
@@ -1,6 +1,3 @@
CONFIG_SOC_SERIES_STM32WLX=y
CONFIG_SOC_STM32WLE5XX=y

# enable uart driver
CONFIG_SERIAL=y

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5 changes: 5 additions & 0 deletions boards/st/nucleo_wl55jc/Kconfig.nucleo_wl55jc
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
# Copyright (c) 2020 STMicroelectronics
# SPDX-License-Identifier: Apache-2.0

config BOARD_NUCLEO_WL55JC
select SOC_STM32WL55XX
5 changes: 5 additions & 0 deletions boards/st/nucleo_wl55jc/board.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
board:
name: nucleo_wl55jc
vendor: st
socs:
- name: stm32wl55xx
Original file line number Diff line number Diff line change
Expand Up @@ -211,10 +211,10 @@ features:

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig and dts files:
The default configuration can be found in:

- :zephyr_file:`boards/arm/nucleo_wl55jc/nucleo_wl55jc_defconfig`
- :zephyr_file:`boards/arm/nucleo_wl55jc/nucleo_wl55jc.dts`
- :zephyr_file:`boards/st/nucleo_wl55jc/nucleo_wl55jc_defconfig`
- :zephyr_file:`boards/st/nucleo_wl55jc/nucleo_wl55jc.dts`


Connections and IOs
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Original file line number Diff line number Diff line change
@@ -1,6 +1,3 @@
CONFIG_SOC_SERIES_STM32WLX=y
CONFIG_SOC_STM32WL55XX=y

# enable uart driver
CONFIG_SERIAL=y

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File renamed without changes.
22 changes: 0 additions & 22 deletions soc/soc_legacy/arm/st_stm32/stm32wl/Kconfig.soc

This file was deleted.

6 changes: 6 additions & 0 deletions soc/st/stm32/soc.yml
Original file line number Diff line number Diff line change
Expand Up @@ -76,3 +76,9 @@ family:
- name: stm32f303xe
- name: stm32f334x8
- name: stm32f373xc
- name: stm32wlx
socs:
- name: stm32wle4xx
- name: stm32wle5xx
- name: stm32wl54xx
- name: stm32wl55xx
Original file line number Diff line number Diff line change
Expand Up @@ -9,4 +9,6 @@ zephyr_sources_ifdef(CONFIG_PM

zephyr_sources_ifdef(CONFIG_POWEROFF poweroff.c)

zephyr_include_directories(.)

set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")
Original file line number Diff line number Diff line change
Expand Up @@ -4,15 +4,11 @@
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_STM32WLX
bool "STM32WLx Series MCU"
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
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select SOC_FAMILY_STM32
select HAS_STM32CUBE
select CPU_HAS_ARM_MPU
select CLOCK_CONTROL_STM32_CUBE if CLOCK_CONTROL
select HAS_PM
select HAS_POWEROFF
help
Enable support for STM32WL MCU series
Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,6 @@

if SOC_SERIES_STM32WLX

source "soc/soc_legacy/arm/st_stm32/stm32wl/Kconfig.defconfig.stm32wl*"

config SOC_SERIES
default "stm32wl"
rsource "Kconfig.defconfig.stm32wl*"

endif # SOC_SERIES_STM32WLX
Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,6 @@

if SOC_STM32WL54XX

config SOC
default "stm32wl54xx"

config NUM_IRQS
default 62

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Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,6 @@

if SOC_STM32WL55XX

config SOC
default "stm32wl55xx"

config NUM_IRQS
default 62

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Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,6 @@

if SOC_STM32WLE4XX

config SOC
default "stm32wle4xx"

config NUM_IRQS
default 62

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