hwmv2: intel_ish: Port to HMWv2 #68178

golowanow · 2024-01-26T22:20:41Z

Port intel_ish SoCs and board configurations for:

intel_ish_5_4_1
intel_ish_5_6_0
intel_ish_5_8_0

tejlmand

lgtm.

tejlmand · 2024-01-31T08:18:43Z

boards/v2/intel/intel_ish/Kconfig.defconfig

+if TEST
+config TEST_EXTRA_STACK_SIZE


minor nit, the construct if construct is equivalent to apply if on all entries.

So when there is only one entry, then you might just write:

config TEST_EXTRA_STACK_SIZE int default 1024 depends on TEST

(depends on is also equivalent to apply if on all parts)
Ref: https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html#

boards/v2/intel/intel_ish/Kconfig.intel_ish_5_4_1

boards/v2/intel/intel_ish/Kconfig.intel_ish_5_6_0

boards/v2/intel/intel_ish/Kconfig.intel_ish_5_8_0

nordicjm · 2024-01-31T10:09:01Z

boards/v2/intel/intel_ish/board.yml

+  - name: intel_ish_5_4_1
+    vendor: intel
+    socs:
+      - name: intel_ish_5_4_1
+
+  - name: intel_ish_5_6_0
+    vendor: intel
+    socs:
+      - name: intel_ish_5_6_0
+
+  - name: intel_ish_5_8_0
+    vendor: intel
+    socs:
+      - name: intel_ish_5_8_0


this should be using revisions

but we don't have revisions for SoCs in Zephyr, only for boards, and those numbers seems to identify the SoC.

I assume somewhat similar to what nRF does with its package variant identification field, like qfaa, ciaa, etc.

So probably the cleanest approach would be to have a single board, and then identify the soc, something like:

board name: intel_ish vendor: intel socs: - name: intel_ish_5_4_1 - name: intel_ish_5_6_0 - name: intel_ish_5_8_0

but I would leave such decision at the discretion of the board maintainer.

We do have board revisions which can select which soc is used, as per 6809aae#diff-e26d2b274c8899adef8f82cb8fcf2a53a96838c4726caa9d7ad11c2afdb886af

but I would leave such decision at the discretion of the board maintainer.

@nashif , @jhedberg, @tbursztyka, @kwd-doodling - what do you think: should we keep ISH for HWMv2 as separate socs/boards for now same as currently, or migrate to board variants ~~revisions~~, or ?

We do have board revisions which can select which soc is used

I know, I was just pointing to the fact that 5_4_1, 5_6_0, 5_8_0 doesn't seem to be a revision of the board, but the revision of the SoC, and therefore using board revisions in this case might be a misnomer as well.

In fact, they're different boards with different SoCs, not one board with different SoCs.
I've tried board revision. unfortunately it's a support of different boards with a same SoC, which doesn't fit our usage.

In fact, they're different boards with different SoCs, not one board with different SoCs. I've tried board revision. unfortunately it's a support of different boards with a same SoC, which doesn't fit our usage.

@kwd-doodling just to double check: does the new board/soc/variant naming scheme fit the ISH purposes ?,
i.e. what is proposed with the last commit here to have intel_ish/intel_ish_5_4_1 etc. board names

In fact, they're different boards with different SoCs, not one board with different SoCs.

if they are in fact different boards, then I think they should still be modeled as individual boards.
I just had the impression that the intel_ish as a board was kind of a phony board, because the ish is a co-processor inside a SoC / SiP.

@nashif what do you think about possible optimizations for ISH names ?

@nashif what do you think about possible optimizations for ISH names ?

@nashif, @kwd-doodling - are we going to rename SoC/boards somehow towards hwmv2 in this PR ?
If yes, then please suggest your new naming schema.

boards/v2/intel/intel_ish/intel_ish_5_6_0_defconfig

boards/v2/intel/intel_ish/Kconfig.defconfig

kwd-doodling · 2024-02-02T06:24:53Z

@golowanow Hi Dmitrii, what's HMWv2? why move ISH boards/SoCs into a new v2 sub-directory?

golowanow · 2024-02-02T06:40:14Z

@golowanow Hi Dmitrii, what's HMWv2? why move ISH boards/SoCs into a new v2 sub-directory?

@kwd-doodling more details on HMWv2 are here - #51831, #67682 or you can contacl me or @nashif on Teams/email.

golowanow · 2024-02-05T10:52:01Z

adjusted to hwmv2: move all non-ported legacy boards and socs to legacy folders #68346
keep intel_ish board configurations as separate boards (no revisions, no variants) as suggested by @kwd-doodling

golowanow · 2024-02-06T08:39:07Z

@kwd-doodling, @tejlmand, @nashif, @57300, @gmarull - up to your attention.

soc/intel/intel_ish/Kconfig

soc/intel/intel_ish/Kconfig.soc

soc/intel/intel_ish/Kconfig.defconfig

soc/intel/intel_ish/intel_ish5/Kconfig.soc

boards/intel/intel_ish/intel_ish_5_4_1.yaml

kwd-doodling · 2024-02-07T08:54:33Z

boards/intel/intel_ish/intel_ish_5_6_0.yaml

same comments as to intel_ish_5_4_1.yaml.

same thing - it is not yet upstreamed

zephyr/boards/x86/intel_ish/intel_ish_5_6_0.yaml

Lines 1 to 14 in 7551b85

identifier: intel_ish_5_6_0

name: Intel ISH 5.6.0 SoC

type: mcu

arch: x86

toolchain:

- zephyr

ram: 640

supported:

- serial

testing:

ignore_tags:

- net

- bluetooth

vendor: intel

boards/intel/intel_ish/intel_ish_5_8_0.yaml

simonguinot · 2024-02-16T09:17:11Z

Sorry, I messed up with the reviewers list while removing myself. And for some reason I am unable to fix it...

simonguinot · 2024-02-16T09:24:01Z

It looks like that at most 15 reviewers can be "manually" selected. Maybe the removal of additional people is due to this limit as well.

Move and convert soc/x86/intel_ish to HWMv2 as soc/intel/intel_ish Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>

Move and convert to HWMv2 the following board configurations: intel_ish_5_4_1, intel_ish_5_6_0, intel_ish_5_8_0 Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>

Adjust intel/intel_ish SoC and board maintainers to HWMv2 move. Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>

golowanow · 2024-02-16T16:50:16Z

rebase to the latest changes at collab-hwm
align paths at MAINTAINERS

golowanow mentioned this pull request Jan 26, 2024

HWMv2 Board / SoC porting progress #67682

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golowanow marked this pull request as ready for review January 27, 2024 10:08

golowanow requested review from nashif and tejlmand January 27, 2024 10:09

tejlmand approved these changes Jan 31, 2024

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golowanow force-pushed the hwmv2_intel_ish branch from 2f44ab3 to 981d235 Compare February 1, 2024 10:33

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golowanow force-pushed the hwmv2_intel_ish branch from a4d89c3 to f3c8227 Compare February 5, 2024 10:47

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golowanow added 3 commits February 16, 2024 17:45

soc: x86: intel_ish: move and convert to HWMv2

d0154b0

Move and convert soc/x86/intel_ish to HWMv2 as soc/intel/intel_ish Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>

boards: x86: intel_ish: move and convert intel_ish boards to HWMv2

69478d6

Move and convert to HWMv2 the following board configurations: intel_ish_5_4_1, intel_ish_5_6_0, intel_ish_5_8_0 Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>

MAINTAINERS: intel_ish: Adjust to HWMv2 move

db0dd1b

Adjust intel/intel_ish SoC and board maintainers to HWMv2 move. Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>

golowanow force-pushed the hwmv2_intel_ish branch from f63eeca to db0dd1b Compare February 16, 2024 16:49

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kwd-doodling approved these changes Feb 18, 2024

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nordicjm merged commit 90f38dd into zephyrproject-rtos:collab-hwm Feb 19, 2024
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hwmv2: intel_ish: Port to HMWv2 #68178

hwmv2: intel_ish: Port to HMWv2 #68178

golowanow commented Jan 26, 2024

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golowanow commented Feb 16, 2024

	identifier: intel_ish_5_6_0
	name: Intel ISH 5.6.0 SoC
	type: mcu
	arch: x86
	toolchain:
	- zephyr
	ram: 640
	supported:
	- serial
	testing:
	ignore_tags:
	- net
	- bluetooth
	vendor: intel

hwmv2: intel_ish: Port to HMWv2 #68178

hwmv2: intel_ish: Port to HMWv2 #68178

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