drivers: adc: Add Microchip MCP3914 SPI 8ch ADC driver

[dean-at-evos]

New driver for the above chip on SPI bus. Runs in async, interrupt driven mode only. Basic chip features supported at this stage.

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A new driver for the microchip mcp3914 on SPI bus. Tested on ESP32c3 with basic functionality.

[dean-at-evos]

Opening this up for a quick review. We do have a few things to add for our own app;

• per channel PGA_GAIN support (there is a TODO in comments where that might go)
• offset/slope correction register set
• maybe CRC config/interrupt support

There are two things I would like to get feedback on early;

• The AFE on reset is 24 bit (BE) on the SPI bus, the driver is doing sign extension/cpu endian correction and outputs in int32_t and report resolution as 32 bit. Seems like the best place to do it to me .. is the driver expected to output device native data?
• For our app it is nice to know when a sample has occurred. I pass a timestamp down inside the driver but want to expose it. At the moment if there is a non-null user-data pointer in the sequence-options the driver treats it is an arrt of timestamps. Of course the can be documented, but it is the correct use of the user data field... or did I miss an obvious way to do this .. or something else??

[salmankhalid-cpi]

@dean-at-evos I also needed mcp3914 driver for zephyr found your pull request. I am testing it with STM32G491 (not able to successfully test it yet). Also added few comments.

[salmankhalid-cpi]

Still working on review .. few initial comments.

[dean-at-evos]

@dean-at-evos I also needed mcp3914 driver for zephyr found your pull request. I am testing it with STM32G491 (not able to successfully test it yet). Also added few comments.

Thanks for your interest.

TLDR; I'll get to the review soon. I am on another project for a month or two, but I am coming back to this, Q2 24

You say you haven't been able to test it. Does that mean it doesn't [build|load|work] for you, or you just haven't had the [hardware|time] to do it? I have had a machine running with this driver (two chips) for a 16 channel system for a few months now, but that is just on one SOC. If you need help with implementing to get things running let me know, .... I'll look at the review soon

[github-actions]

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[dean-at-evos]

Apologies but this is no longer stale ... back in active development :)