dt-bindings: pinctrl: silabs: Add analog bus bindings

Add definitions for analog bus selections on Series 2 devices. Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
zephyrproject-rtos · Jan 30, 2025 · fc7143f · fc7143f
1 parent 120691a
commit fc7143f
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Showing 6 changed files with 216 additions and 5 deletions.
diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/xg21-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/xg21-pinctrl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2024 Silicon Laboratories Inc.
+ * Copyright (c) 2025 Silicon Laboratories Inc.
  * SPDX-License-Identifier: Apache-2.0
  *
  * Pin Control for Silicon Labs XG21 devices
@@ -1185,4 +1185,41 @@
 #define USART2_CTS_PD3 SILABS_DBUS_USART2_CTS(0x3, 0x3)
 #define USART2_CTS_PD4 SILABS_DBUS_USART2_CTS(0x3, 0x4)
 
+#define ABUS_AEVEN0_IADC0  SILABS_ABUS(0x0, 0x0, 0x1)
+#define ABUS_AEVEN0_ACMP0  SILABS_ABUS(0x0, 0x0, 0x2)
+#define ABUS_AEVEN0_ACMP1  SILABS_ABUS(0x0, 0x0, 0x3)
+#define ABUS_AEVEN1_IADC0  SILABS_ABUS(0x0, 0x1, 0x1)
+#define ABUS_AEVEN1_ACMP0  SILABS_ABUS(0x0, 0x1, 0x2)
+#define ABUS_AEVEN1_ACMP1  SILABS_ABUS(0x0, 0x1, 0x3)
+#define ABUS_AODD0_IADC0   SILABS_ABUS(0x0, 0x2, 0x1)
+#define ABUS_AODD0_ACMP0   SILABS_ABUS(0x0, 0x2, 0x2)
+#define ABUS_AODD0_ACMP1   SILABS_ABUS(0x0, 0x2, 0x3)
+#define ABUS_AODD1_IADC0   SILABS_ABUS(0x0, 0x3, 0x1)
+#define ABUS_AODD1_ACMP0   SILABS_ABUS(0x0, 0x3, 0x2)
+#define ABUS_AODD1_ACMP1   SILABS_ABUS(0x0, 0x3, 0x3)
+#define ABUS_BEVEN0_IADC0  SILABS_ABUS(0x1, 0x0, 0x1)
+#define ABUS_BEVEN0_ACMP0  SILABS_ABUS(0x1, 0x0, 0x2)
+#define ABUS_BEVEN0_ACMP1  SILABS_ABUS(0x1, 0x0, 0x3)
+#define ABUS_BEVEN1_IADC0  SILABS_ABUS(0x1, 0x1, 0x1)
+#define ABUS_BEVEN1_ACMP0  SILABS_ABUS(0x1, 0x1, 0x2)
+#define ABUS_BEVEN1_ACMP1  SILABS_ABUS(0x1, 0x1, 0x3)
+#define ABUS_BODD0_IADC0   SILABS_ABUS(0x1, 0x2, 0x1)
+#define ABUS_BODD0_ACMP0   SILABS_ABUS(0x1, 0x2, 0x2)
+#define ABUS_BODD0_ACMP1   SILABS_ABUS(0x1, 0x2, 0x3)
+#define ABUS_BODD1_IADC0   SILABS_ABUS(0x1, 0x3, 0x1)
+#define ABUS_BODD1_ACMP0   SILABS_ABUS(0x1, 0x3, 0x2)
+#define ABUS_BODD1_ACMP1   SILABS_ABUS(0x1, 0x3, 0x3)
+#define ABUS_CDEVEN0_IADC0 SILABS_ABUS(0x2, 0x0, 0x1)
+#define ABUS_CDEVEN0_ACMP0 SILABS_ABUS(0x2, 0x0, 0x2)
+#define ABUS_CDEVEN0_ACMP1 SILABS_ABUS(0x2, 0x0, 0x3)
+#define ABUS_CDEVEN1_IADC0 SILABS_ABUS(0x2, 0x1, 0x1)
+#define ABUS_CDEVEN1_ACMP0 SILABS_ABUS(0x2, 0x1, 0x2)
+#define ABUS_CDEVEN1_ACMP1 SILABS_ABUS(0x2, 0x1, 0x3)
+#define ABUS_CDODD0_IADC0  SILABS_ABUS(0x2, 0x2, 0x1)
+#define ABUS_CDODD0_ACMP0  SILABS_ABUS(0x2, 0x2, 0x2)
+#define ABUS_CDODD0_ACMP1  SILABS_ABUS(0x2, 0x2, 0x3)
+#define ABUS_CDODD1_IADC0  SILABS_ABUS(0x2, 0x3, 0x1)
+#define ABUS_CDODD1_ACMP0  SILABS_ABUS(0x2, 0x3, 0x2)
+#define ABUS_CDODD1_ACMP1  SILABS_ABUS(0x2, 0x3, 0x3)
+
 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG21_PINCTRL_H_ */
diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/xg22-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/xg22-pinctrl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2024 Silicon Laboratories Inc.
+ * Copyright (c) 2025 Silicon Laboratories Inc.
  * SPDX-License-Identifier: Apache-2.0
  *
  * Pin Control for Silicon Labs XG22 devices
@@ -1789,4 +1789,17 @@
 #define USART1_CTS_PB3 SILABS_DBUS_USART1_CTS(0x1, 0x3)
 #define USART1_CTS_PB4 SILABS_DBUS_USART1_CTS(0x1, 0x4)
 
+#define ABUS_AEVEN0_IADC0  SILABS_ABUS(0x0, 0x0, 0x1)
+#define ABUS_AEVEN1_IADC0  SILABS_ABUS(0x0, 0x1, 0x1)
+#define ABUS_AODD0_IADC0   SILABS_ABUS(0x0, 0x2, 0x1)
+#define ABUS_AODD1_IADC0   SILABS_ABUS(0x0, 0x3, 0x1)
+#define ABUS_BEVEN0_IADC0  SILABS_ABUS(0x1, 0x0, 0x1)
+#define ABUS_BEVEN1_IADC0  SILABS_ABUS(0x1, 0x1, 0x1)
+#define ABUS_BODD0_IADC0   SILABS_ABUS(0x1, 0x2, 0x1)
+#define ABUS_BODD1_IADC0   SILABS_ABUS(0x1, 0x3, 0x1)
+#define ABUS_CDEVEN0_IADC0 SILABS_ABUS(0x2, 0x0, 0x1)
+#define ABUS_CDEVEN1_IADC0 SILABS_ABUS(0x2, 0x1, 0x1)
+#define ABUS_CDODD0_IADC0  SILABS_ABUS(0x2, 0x2, 0x1)
+#define ABUS_CDODD1_IADC0  SILABS_ABUS(0x2, 0x3, 0x1)
+
 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG22_PINCTRL_H_ */
diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/xg23-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/xg23-pinctrl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2024 Silicon Laboratories Inc.
+ * Copyright (c) 2025 Silicon Laboratories Inc.
  * SPDX-License-Identifier: Apache-2.0
  *
  * Pin Control for Silicon Labs XG23 devices
@@ -3201,4 +3201,53 @@
 #define USART0_CTS_PD4 SILABS_DBUS_USART0_CTS(0x3, 0x4)
 #define USART0_CTS_PD5 SILABS_DBUS_USART0_CTS(0x3, 0x5)
 
+#define ABUS_AEVEN0_IADC0     SILABS_ABUS(0x0, 0x0, 0x1)
+#define ABUS_AEVEN0_ACMP0     SILABS_ABUS(0x0, 0x0, 0x2)
+#define ABUS_AEVEN0_ACMP1     SILABS_ABUS(0x0, 0x0, 0x3)
+#define ABUS_AEVEN0_VDAC0CH0  SILABS_ABUS(0x0, 0x0, 0x4)
+#define ABUS_AEVEN1_IADC0     SILABS_ABUS(0x0, 0x1, 0x1)
+#define ABUS_AEVEN1_ACMP0     SILABS_ABUS(0x0, 0x1, 0x2)
+#define ABUS_AEVEN1_ACMP1     SILABS_ABUS(0x0, 0x1, 0x3)
+#define ABUS_AEVEN1_VDAC0CH1  SILABS_ABUS(0x0, 0x1, 0x4)
+#define ABUS_AODD0_IADC0      SILABS_ABUS(0x0, 0x2, 0x1)
+#define ABUS_AODD0_ACMP0      SILABS_ABUS(0x0, 0x2, 0x2)
+#define ABUS_AODD0_ACMP1      SILABS_ABUS(0x0, 0x2, 0x3)
+#define ABUS_AODD0_VDAC0CH0   SILABS_ABUS(0x0, 0x2, 0x4)
+#define ABUS_AODD1_IADC0      SILABS_ABUS(0x0, 0x3, 0x1)
+#define ABUS_AODD1_ACMP0      SILABS_ABUS(0x0, 0x3, 0x2)
+#define ABUS_AODD1_ACMP1      SILABS_ABUS(0x0, 0x3, 0x3)
+#define ABUS_AODD1_VDAC0CH1   SILABS_ABUS(0x0, 0x3, 0x4)
+#define ABUS_BEVEN0_IADC0     SILABS_ABUS(0x1, 0x0, 0x1)
+#define ABUS_BEVEN0_ACMP0     SILABS_ABUS(0x1, 0x0, 0x2)
+#define ABUS_BEVEN0_ACMP1     SILABS_ABUS(0x1, 0x0, 0x3)
+#define ABUS_BEVEN0_VDAC0CH0  SILABS_ABUS(0x1, 0x0, 0x4)
+#define ABUS_BEVEN1_IADC0     SILABS_ABUS(0x1, 0x1, 0x1)
+#define ABUS_BEVEN1_ACMP0     SILABS_ABUS(0x1, 0x1, 0x2)
+#define ABUS_BEVEN1_ACMP1     SILABS_ABUS(0x1, 0x1, 0x3)
+#define ABUS_BEVEN1_VDAC0CH1  SILABS_ABUS(0x1, 0x1, 0x4)
+#define ABUS_BODD0_IADC0      SILABS_ABUS(0x1, 0x2, 0x1)
+#define ABUS_BODD0_ACMP0      SILABS_ABUS(0x1, 0x2, 0x2)
+#define ABUS_BODD0_ACMP1      SILABS_ABUS(0x1, 0x2, 0x3)
+#define ABUS_BODD0_VDAC0CH0   SILABS_ABUS(0x1, 0x2, 0x4)
+#define ABUS_BODD1_IADC0      SILABS_ABUS(0x1, 0x3, 0x1)
+#define ABUS_BODD1_ACMP0      SILABS_ABUS(0x1, 0x3, 0x2)
+#define ABUS_BODD1_ACMP1      SILABS_ABUS(0x1, 0x3, 0x3)
+#define ABUS_BODD1_VDAC0CH1   SILABS_ABUS(0x1, 0x3, 0x4)
+#define ABUS_CDEVEN0_IADC0    SILABS_ABUS(0x2, 0x0, 0x1)
+#define ABUS_CDEVEN0_ACMP0    SILABS_ABUS(0x2, 0x0, 0x2)
+#define ABUS_CDEVEN0_ACMP1    SILABS_ABUS(0x2, 0x0, 0x3)
+#define ABUS_CDEVEN0_VDAC0CH0 SILABS_ABUS(0x2, 0x0, 0x4)
+#define ABUS_CDEVEN1_IADC0    SILABS_ABUS(0x2, 0x1, 0x1)
+#define ABUS_CDEVEN1_ACMP0    SILABS_ABUS(0x2, 0x1, 0x2)
+#define ABUS_CDEVEN1_ACMP1    SILABS_ABUS(0x2, 0x1, 0x3)
+#define ABUS_CDEVEN1_VDAC0CH1 SILABS_ABUS(0x2, 0x1, 0x4)
+#define ABUS_CDODD0_IADC0     SILABS_ABUS(0x2, 0x2, 0x1)
+#define ABUS_CDODD0_ACMP0     SILABS_ABUS(0x2, 0x2, 0x2)
+#define ABUS_CDODD0_ACMP1     SILABS_ABUS(0x2, 0x2, 0x3)
+#define ABUS_CDODD0_VDAC0CH0  SILABS_ABUS(0x2, 0x2, 0x4)
+#define ABUS_CDODD1_IADC0     SILABS_ABUS(0x2, 0x3, 0x1)
+#define ABUS_CDODD1_ACMP0     SILABS_ABUS(0x2, 0x3, 0x2)
+#define ABUS_CDODD1_ACMP1     SILABS_ABUS(0x2, 0x3, 0x3)
+#define ABUS_CDODD1_VDAC0CH1  SILABS_ABUS(0x2, 0x3, 0x4)
+
 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG23_PINCTRL_H_ */
diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/xg24-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/xg24-pinctrl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2024 Silicon Laboratories Inc.
+ * Copyright (c) 2025 Silicon Laboratories Inc.
  * SPDX-License-Identifier: Apache-2.0
  *
  * Pin Control for Silicon Labs XG24 devices
@@ -2700,4 +2700,65 @@
 #define USART0_CTS_PD4 SILABS_DBUS_USART0_CTS(0x3, 0x4)
 #define USART0_CTS_PD5 SILABS_DBUS_USART0_CTS(0x3, 0x5)
 
+#define ABUS_AEVEN0_IADC0     SILABS_ABUS(0x0, 0x0, 0x1)
+#define ABUS_AEVEN0_ACMP0     SILABS_ABUS(0x0, 0x0, 0x2)
+#define ABUS_AEVEN0_ACMP1     SILABS_ABUS(0x0, 0x0, 0x3)
+#define ABUS_AEVEN0_VDAC0CH0  SILABS_ABUS(0x0, 0x0, 0x4)
+#define ABUS_AEVEN0_VDAC1CH0  SILABS_ABUS(0x0, 0x0, 0x5)
+#define ABUS_AEVEN1_IADC0     SILABS_ABUS(0x0, 0x1, 0x1)
+#define ABUS_AEVEN1_ACMP0     SILABS_ABUS(0x0, 0x1, 0x2)
+#define ABUS_AEVEN1_ACMP1     SILABS_ABUS(0x0, 0x1, 0x3)
+#define ABUS_AEVEN1_VDAC0CH1  SILABS_ABUS(0x0, 0x1, 0x4)
+#define ABUS_AEVEN1_VDAC1CH1  SILABS_ABUS(0x0, 0x1, 0x5)
+#define ABUS_AODD0_IADC0      SILABS_ABUS(0x0, 0x2, 0x1)
+#define ABUS_AODD0_ACMP0      SILABS_ABUS(0x0, 0x2, 0x2)
+#define ABUS_AODD0_ACMP1      SILABS_ABUS(0x0, 0x2, 0x3)
+#define ABUS_AODD0_VDAC0CH0   SILABS_ABUS(0x0, 0x2, 0x4)
+#define ABUS_AODD0_VDAC1CH0   SILABS_ABUS(0x0, 0x2, 0x5)
+#define ABUS_AODD1_IADC0      SILABS_ABUS(0x0, 0x3, 0x1)
+#define ABUS_AODD1_ACMP0      SILABS_ABUS(0x0, 0x3, 0x2)
+#define ABUS_AODD1_ACMP1      SILABS_ABUS(0x0, 0x3, 0x3)
+#define ABUS_AODD1_VDAC0CH1   SILABS_ABUS(0x0, 0x3, 0x4)
+#define ABUS_AODD1_VDAC1CH1   SILABS_ABUS(0x0, 0x3, 0x5)
+#define ABUS_BEVEN0_IADC0     SILABS_ABUS(0x1, 0x0, 0x1)
+#define ABUS_BEVEN0_ACMP0     SILABS_ABUS(0x1, 0x0, 0x2)
+#define ABUS_BEVEN0_ACMP1     SILABS_ABUS(0x1, 0x0, 0x3)
+#define ABUS_BEVEN0_VDAC0CH0  SILABS_ABUS(0x1, 0x0, 0x4)
+#define ABUS_BEVEN0_VDAC1CH0  SILABS_ABUS(0x1, 0x0, 0x5)
+#define ABUS_BEVEN1_IADC0     SILABS_ABUS(0x1, 0x1, 0x1)
+#define ABUS_BEVEN1_ACMP0     SILABS_ABUS(0x1, 0x1, 0x2)
+#define ABUS_BEVEN1_ACMP1     SILABS_ABUS(0x1, 0x1, 0x3)
+#define ABUS_BEVEN1_VDAC0CH1  SILABS_ABUS(0x1, 0x1, 0x4)
+#define ABUS_BEVEN1_VDAC1CH1  SILABS_ABUS(0x1, 0x1, 0x5)
+#define ABUS_BODD0_IADC0      SILABS_ABUS(0x1, 0x2, 0x1)
+#define ABUS_BODD0_ACMP0      SILABS_ABUS(0x1, 0x2, 0x2)
+#define ABUS_BODD0_ACMP1      SILABS_ABUS(0x1, 0x2, 0x3)
+#define ABUS_BODD0_VDAC0CH0   SILABS_ABUS(0x1, 0x2, 0x4)
+#define ABUS_BODD0_VDAC1CH0   SILABS_ABUS(0x1, 0x2, 0x5)
+#define ABUS_BODD1_IADC0      SILABS_ABUS(0x1, 0x3, 0x1)
+#define ABUS_BODD1_ACMP0      SILABS_ABUS(0x1, 0x3, 0x2)
+#define ABUS_BODD1_ACMP1      SILABS_ABUS(0x1, 0x3, 0x3)
+#define ABUS_BODD1_VDAC0CH1   SILABS_ABUS(0x1, 0x3, 0x4)
+#define ABUS_BODD1_VDAC1CH1   SILABS_ABUS(0x1, 0x3, 0x5)
+#define ABUS_CDEVEN0_IADC0    SILABS_ABUS(0x2, 0x0, 0x1)
+#define ABUS_CDEVEN0_ACMP0    SILABS_ABUS(0x2, 0x0, 0x2)
+#define ABUS_CDEVEN0_ACMP1    SILABS_ABUS(0x2, 0x0, 0x3)
+#define ABUS_CDEVEN0_VDAC0CH0 SILABS_ABUS(0x2, 0x0, 0x4)
+#define ABUS_CDEVEN0_VDAC1CH0 SILABS_ABUS(0x2, 0x0, 0x5)
+#define ABUS_CDEVEN1_IADC0    SILABS_ABUS(0x2, 0x1, 0x1)
+#define ABUS_CDEVEN1_ACMP0    SILABS_ABUS(0x2, 0x1, 0x2)
+#define ABUS_CDEVEN1_ACMP1    SILABS_ABUS(0x2, 0x1, 0x3)
+#define ABUS_CDEVEN1_VDAC0CH1 SILABS_ABUS(0x2, 0x1, 0x4)
+#define ABUS_CDEVEN1_VDAC1CH1 SILABS_ABUS(0x2, 0x1, 0x5)
+#define ABUS_CDODD0_IADC0     SILABS_ABUS(0x2, 0x2, 0x1)
+#define ABUS_CDODD0_ACMP0     SILABS_ABUS(0x2, 0x2, 0x2)
+#define ABUS_CDODD0_ACMP1     SILABS_ABUS(0x2, 0x2, 0x3)
+#define ABUS_CDODD0_VDAC0CH0  SILABS_ABUS(0x2, 0x2, 0x4)
+#define ABUS_CDODD0_VDAC1CH0  SILABS_ABUS(0x2, 0x2, 0x5)
+#define ABUS_CDODD1_IADC0     SILABS_ABUS(0x2, 0x3, 0x1)
+#define ABUS_CDODD1_ACMP0     SILABS_ABUS(0x2, 0x3, 0x2)
+#define ABUS_CDODD1_ACMP1     SILABS_ABUS(0x2, 0x3, 0x3)
+#define ABUS_CDODD1_VDAC0CH1  SILABS_ABUS(0x2, 0x3, 0x4)
+#define ABUS_CDODD1_VDAC1CH1  SILABS_ABUS(0x2, 0x3, 0x5)
+
 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG24_PINCTRL_H_ */
diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/xg27-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/xg27-pinctrl.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2024 Silicon Laboratories Inc.
+ * Copyright (c) 2025 Silicon Laboratories Inc.
  * SPDX-License-Identifier: Apache-2.0
  *
  * Pin Control for Silicon Labs XG27 devices
@@ -1872,4 +1872,30 @@
 #define USART1_CTS_PB3 SILABS_DBUS_USART1_CTS(0x1, 0x3)
 #define USART1_CTS_PB4 SILABS_DBUS_USART1_CTS(0x1, 0x4)
 
+#define ABUS_AEVEN0_IADC0  SILABS_ABUS(0x0, 0x0, 0x1)
+#define ABUS_AEVEN0_ACMP0  SILABS_ABUS(0x0, 0x0, 0x2)
+#define ABUS_AEVEN1_IADC0  SILABS_ABUS(0x0, 0x1, 0x1)
+#define ABUS_AEVEN1_ACMP0  SILABS_ABUS(0x0, 0x1, 0x2)
+#define ABUS_AODD0_IADC0   SILABS_ABUS(0x0, 0x2, 0x1)
+#define ABUS_AODD0_ACMP0   SILABS_ABUS(0x0, 0x2, 0x2)
+#define ABUS_AODD1_IADC0   SILABS_ABUS(0x0, 0x3, 0x1)
+#define ABUS_AODD1_ACMP0   SILABS_ABUS(0x0, 0x3, 0x2)
+#define ABUS_BEVEN0_IADC0  SILABS_ABUS(0x1, 0x0, 0x1)
+#define ABUS_BEVEN0_ACMP0  SILABS_ABUS(0x1, 0x0, 0x2)
+#define ABUS_BEVEN1_IADC0  SILABS_ABUS(0x1, 0x1, 0x1)
+#define ABUS_BEVEN1_ACMP0  SILABS_ABUS(0x1, 0x1, 0x2)
+#define ABUS_BODD0_IADC0   SILABS_ABUS(0x1, 0x2, 0x1)
+#define ABUS_BODD0_ACMP0   SILABS_ABUS(0x1, 0x2, 0x2)
+#define ABUS_BODD1_IADC0   SILABS_ABUS(0x1, 0x3, 0x1)
+#define ABUS_BODD1_ACMP0   SILABS_ABUS(0x1, 0x3, 0x2)
+#define ABUS_CDEVEN0_IADC0 SILABS_ABUS(0x2, 0x0, 0x1)
+#define ABUS_CDEVEN0_ACMP0 SILABS_ABUS(0x2, 0x0, 0x2)
+#define ABUS_CDEVEN1_IADC0 SILABS_ABUS(0x2, 0x1, 0x1)
+#define ABUS_CDEVEN1_ACMP0 SILABS_ABUS(0x2, 0x1, 0x2)
+#define ABUS_CDODD0_IADC0  SILABS_ABUS(0x2, 0x2, 0x1)
+#define ABUS_CDODD0_ACMP0  SILABS_ABUS(0x2, 0x2, 0x2)
+#define ABUS_CDODD0_PMON   SILABS_ABUS(0x2, 0x2, 0xc)
+#define ABUS_CDODD1_IADC0  SILABS_ABUS(0x2, 0x3, 0x1)
+#define ABUS_CDODD1_ACMP0  SILABS_ABUS(0x2, 0x3, 0x2)
+
 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG27_PINCTRL_H_ */
diff --git a/include/zephyr/dt-bindings/pinctrl/silabs/xg29-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/silabs/xg29-pinctrl.h
@@ -2036,4 +2036,29 @@
 #define USART1_CTS_PB3 SILABS_DBUS_USART1_CTS(0x1, 0x3)
 #define USART1_CTS_PB4 SILABS_DBUS_USART1_CTS(0x1, 0x4)
 
+#define ABUS_AEVEN0_IADC0  SILABS_ABUS(0x0, 0x0, 0x1)
+#define ABUS_AEVEN0_ACMP0  SILABS_ABUS(0x0, 0x0, 0x2)
+#define ABUS_AEVEN1_IADC0  SILABS_ABUS(0x0, 0x1, 0x1)
+#define ABUS_AEVEN1_ACMP0  SILABS_ABUS(0x0, 0x1, 0x2)
+#define ABUS_AODD0_IADC0   SILABS_ABUS(0x0, 0x2, 0x1)
+#define ABUS_AODD0_ACMP0   SILABS_ABUS(0x0, 0x2, 0x2)
+#define ABUS_AODD1_IADC0   SILABS_ABUS(0x0, 0x3, 0x1)
+#define ABUS_AODD1_ACMP0   SILABS_ABUS(0x0, 0x3, 0x2)
+#define ABUS_BEVEN0_IADC0  SILABS_ABUS(0x1, 0x0, 0x1)
+#define ABUS_BEVEN0_ACMP0  SILABS_ABUS(0x1, 0x0, 0x2)
+#define ABUS_BEVEN1_IADC0  SILABS_ABUS(0x1, 0x1, 0x1)
+#define ABUS_BEVEN1_ACMP0  SILABS_ABUS(0x1, 0x1, 0x2)
+#define ABUS_BODD0_IADC0   SILABS_ABUS(0x1, 0x2, 0x1)
+#define ABUS_BODD0_ACMP0   SILABS_ABUS(0x1, 0x2, 0x2)
+#define ABUS_BODD1_IADC0   SILABS_ABUS(0x1, 0x3, 0x1)
+#define ABUS_BODD1_ACMP0   SILABS_ABUS(0x1, 0x3, 0x2)
+#define ABUS_CDEVEN0_IADC0 SILABS_ABUS(0x2, 0x0, 0x1)
+#define ABUS_CDEVEN0_ACMP0 SILABS_ABUS(0x2, 0x0, 0x2)
+#define ABUS_CDEVEN1_IADC0 SILABS_ABUS(0x2, 0x1, 0x1)
+#define ABUS_CDEVEN1_ACMP0 SILABS_ABUS(0x2, 0x1, 0x2)
+#define ABUS_CDODD0_IADC0  SILABS_ABUS(0x2, 0x2, 0x1)
+#define ABUS_CDODD0_ACMP0  SILABS_ABUS(0x2, 0x2, 0x2)
+#define ABUS_CDODD1_IADC0  SILABS_ABUS(0x2, 0x3, 0x1)
+#define ABUS_CDODD1_ACMP0  SILABS_ABUS(0x2, 0x3, 0x2)
+
 #endif /* ZEPHYR_DT_BINDINGS_PINCTRL_SILABS_XG29_PINCTRL_H_ */