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soc: imxrt118x: Use the External Cache driver for CM33
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The CM33 has a XCACHE controller to manage the External
cache. Remove unused Kconfigs as we can use Zephyr API's
to manage the CM33 cache,

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
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mmahadevan108 committed Jan 14, 2025
1 parent 579deb8 commit d4c3cd1
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Showing 3 changed files with 7 additions and 18 deletions.
10 changes: 2 additions & 8 deletions soc/nxp/imxrt/imxrt118x/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,8 @@ config SOC_SERIES_IMXRT118X

config SOC_MIMXRT1189_CM33
select CPU_CORTEX_M33
select HAS_MCUX_XCACHE
select CACHE_MANAGEMENT

config SOC_MIMXRT1189_CM7
select CPU_CORTEX_M7
Expand Down Expand Up @@ -66,12 +68,4 @@ config S3MU_MCUX_S3MU
default y
bool "Use S3MU MCUX Driver"

config IMXRT118X_CM33_XCACHE_PS
bool "Use CM33 XCACHE_PS"
default y if SOC_MIMXRT1189_CM33
help
Use CM33 XCACHE_PS at boot. Please note XCACHE_PC have been
enabled in SystemInit function. If this Kconfig is cleared,
the XCACHE controller won't be enabled during SOC init

endif # SOC_SERIES_IMXRT118X
4 changes: 4 additions & 0 deletions soc/nxp/imxrt/imxrt118x/Kconfig.defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -34,4 +34,8 @@ config NXP_IMXRT_BOOT_HEADER

endif # SECOND_CORE_MCUX

choice CACHE_TYPE
default EXTERNAL_CACHE if SOC_MIMXRT1189_CM33
endchoice

endif # SOC_SERIES_IMXRT118X
11 changes: 1 addition & 10 deletions soc/nxp/imxrt/imxrt118x/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -10,11 +10,7 @@
#include <soc.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#if defined(CONFIG_SOC_MIMXRT1189_CM7)
#include <zephyr/cache.h>
#elif defined(CONFIG_IMXRT118X_CM33_XCACHE_PS)
#include <fsl_cache.h>
#endif
#include <fsl_clock.h>
#include <fsl_gpc.h>
#include <fsl_pmu.h>
Expand Down Expand Up @@ -631,13 +627,8 @@ void soc_early_init_hook(void)
trdc_enable_all_access();

/* Enable data cache */
#if defined(CONFIG_IMXRT118X_CM33_XCACHE_PS)
XCACHE_EnableCache(XCACHE_PC);
XCACHE_EnableCache(XCACHE_PS);
#elif defined(CONFIG_SOC_MIMXRT1189_CM7)
sys_cache_instr_enable();
sys_cache_data_enable();
#endif

__ISB();
__DSB();
}
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