Skip to content

Commit

Permalink
boards: rename vendor seeed to seeed_studio
Browse files Browse the repository at this point in the history
rename seeed folder to seeed_studio

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
  • Loading branch information
ajarmouni-st committed Feb 12, 2024
1 parent abe1d18 commit d48bc1a
Show file tree
Hide file tree
Showing 32 changed files with 14 additions and 14 deletions.
2 changes: 1 addition & 1 deletion CODEOWNERS
Original file line number Diff line number Diff line change
Expand Up @@ -428,7 +428,7 @@
/dts/arm64/nxp/ @JiafeiPan
/dts/arm64/renesas/ @lorc @xakep-amatop
/dts/arm/quicklogic/ @fkokosinski @kgugala
/dts/arm/seeed/ @str4t0m
/dts/arm/seeed_studio/ @str4t0m
/dts/arm/st/ @erwango
/dts/arm/st/h7/*stm32h735* @benediktibk
/dts/arm/st/l4/*stm32l451* @benediktibk
Expand Down
File renamed without changes.
Original file line number Diff line number Diff line change
Expand Up @@ -15,4 +15,4 @@ supported:
- usb_device
ram: 96
flash: 512
vendor: seeed
vendor: seeed studio
File renamed without changes.
File renamed without changes.
File renamed without changes.
File renamed without changes.
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
board:
name: 96b_carbon
vendor: seeed
vendor: seeed studio
socs:
- name: stm32f401xe
Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,7 @@ features:
More details about the board can be found at `96Boards website`_.

The default configuration can be found in
:zephyr_file:`boards/seeed/96b_carbon/96b_carbon_defconfig`
:zephyr_file:`boards/seeed_studio/96b_carbon/96b_carbon_defconfig`

Connections and IOs
===================
Expand Down
File renamed without changes.
File renamed without changes.
Original file line number Diff line number Diff line change
Expand Up @@ -112,8 +112,8 @@ features:
Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in:
- :zephyr_file:`boards/seeed/lora_e5_dev_board/lora_e5_dev_board_defconfig`
- :zephyr_file:`boards/seeed/lora_e5_dev_board/lora_e5_dev_board.dts`
- :zephyr_file:`boards/seeed_studio/lora_e5_dev_board/lora_e5_dev_board_defconfig`
- :zephyr_file:`boards/seeed_studio/lora_e5_dev_board/lora_e5_dev_board.dts`


Connections and IOs
Expand Down Expand Up @@ -214,7 +214,7 @@ set the RDP option byte to ``AA``,
or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
to perform this read protection regression.
The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
firmware, from which seeed has neither released the source code nor a binary.
firmware, from which seeed studio has neither released the source code nor a binary.
Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
so the system bootloader will only be executed if configured in the option bytes.

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
*/

/dts-v1/;
#include <seeed/lora-e5.dtsi>
#include <seeed_studio/lora-e5.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -17,4 +17,4 @@ supported:
- uart
- watchdog
- lora
vendor: seeed
vendor: seeed studio
File renamed without changes.
File renamed without changes.
Original file line number Diff line number Diff line change
Expand Up @@ -102,8 +102,8 @@ Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in:

- :zephyr_file:`boards/seeed/lora_e5_mini/lora_e5_mini_defconfig`
- :zephyr_file:`boards/seeed/lora_e5_mini/lora_e5_mini.dts`
- :zephyr_file:`boards/seeed_studio/lora_e5_mini/lora_e5_mini_defconfig`
- :zephyr_file:`boards/seeed_studio/lora_e5_mini/lora_e5_mini.dts`


Connections and IOs
Expand Down Expand Up @@ -151,7 +151,7 @@ set the RDP option byte to ``AA``,
or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
to perform this read protection regression.
The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
firmware, from which seeed has neither released the source code nor a binary.
firmware, from which seeed studio has neither released the source code nor a binary.
Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
so the system bootloader will only be executed if configured in the option bytes.

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
*/

/dts-v1/;
#include <seeed/lora-e5.dtsi>
#include <seeed_studio/lora-e5.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -16,4 +16,4 @@ supported:
- uart
- watchdog
- lora
vendor: seeed
vendor: seeed studio
File renamed without changes.

0 comments on commit d48bc1a

Please sign in to comment.