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drivers: pwm: bbled: Update bbled-pwm dts files
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Updated Overlay, dtsi and yaml files.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
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Manimaran-A committed Feb 27, 2024
1 parent 78682eb commit 8594eeb
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Showing 5 changed files with 221 additions and 4 deletions.
15 changes: 15 additions & 0 deletions dts/arm/microchip/mec152x/mec152xhsz-pinctrl.dtsi
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Expand Up @@ -1349,4 +1349,19 @@
low-power-enable;
};

/* BBLED */
led0_gpio156_sleep: led0_gpio156_sleep {
pinmux = < MCHP_XEC_PINMUX(0156, MCHP_AF1) >;
low-power-enable;
};

led1_gpio157_sleep: led1_gpio157_sleep {
pinmux = < MCHP_XEC_PINMUX(0157, MCHP_AF1) >;
low-power-enable;
};

led2_gpio153_sleep: led2_gpio153_sleep {
pinmux = < MCHP_XEC_PINMUX(0153, MCHP_AF1) >;
low-power-enable;
};
};
22 changes: 22 additions & 0 deletions dts/arm/microchip/mec172x/mec172xnsz-pinctrl.dtsi
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Expand Up @@ -1344,4 +1344,26 @@
pinmux = < MCHP_XEC_PINMUX(0140, MCHP_AF3) >;
low-power-enable;
};

/* BBLED */
led0_gpio156_sleep: led0_gpio156_sleep {
pinmux = < MCHP_XEC_PINMUX(0156, MCHP_AF1) >;
low-power-enable;
};

led1_gpio157_sleep: led1_gpio157_sleep {
pinmux = < MCHP_XEC_PINMUX(0157, MCHP_AF1) >;
low-power-enable;
};

led2_gpio153_sleep: led2_gpio153_sleep {
pinmux = < MCHP_XEC_PINMUX(0153, MCHP_AF1) >;
low-power-enable;
};

led3_gpio035_sleep: led3_gpio035_sleep {
pinmux = < MCHP_XEC_PINMUX(035, MCHP_AF4) >;
low-power-enable;
};

};
7 changes: 3 additions & 4 deletions dts/bindings/pwm/microchip,xec-pwmbbled.yaml
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Expand Up @@ -30,11 +30,9 @@ properties:
description: |
Clock source selection: 32 KHz is available in deep sleep.
- PWM_BBLED_CLK_AHB: Clock source is the PLL based AHB clock
- PWM_BBLED_CLK_SLOW: Clock source is the PLL based PCR slow clock
- PWM_BBLED_CLK_32K: Clock source is the 32KHz domain
enum:
- "PWM_BBLED_CLK_32K"
- "PWM_BBLED_CLK_SLOW"
- "PWM_BBLED_CLK_48M"

pinctrl-0:
Expand All @@ -44,7 +42,7 @@ properties:
required: true

"#pwm-cells":
const: 2
const: 3

enable-low-power-32k:
type: boolean
Expand All @@ -55,9 +53,10 @@ properties:
When BBLED enter into Suspend state, 48MHz clock will be switched off by
PCR(Power, Clock and Reset) block. But 32KHz Core clock will be available to BBLED.
There may be a product requirement, either to blink (or) not blink LED in Suspend state.
Flag "enable-low-power-32k" shall be used along with 32KHz clock to blink (or) not blink
Property "enable-low-power-32k" shall be used along with 32KHz clock to blink (or) not blink
the LED in Suspend state.
pwm-cells:
- channel
- period
- flags
81 changes: 81 additions & 0 deletions samples/drivers/led_pwm/boards/mec15xxevb_assy6853.overlay
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/*
* Copyright (c) 2023 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/dt-bindings/pwm/pwm.h>

/* MEC152x EVB
* BBLED controller 0 uses GPIO156/LED0 connected to JP31-13
* BBLED controller 1 uses GPIO157/LED1 connected to JP31-15
* BBLED controller 2 uses GPIO153/LED2 connected to JP31-17
*
* BBLED hardware divides input clock (32KHz or 48MHz) by (256 * (prescalar+1)
* and implements duty cycle for blink mode as an 8-bit value where 0 is off and
* 255 full on. BBLED PWM is 8-bit.
* BBLED-PWM driver get cycles API reports 32KHz/256 or 48M/256.
* Due to all the above we use 50 ms for DT PWM period.
*/

/* PWM_SEC(1) PWM_USEC(7812) */
/ {
pwmleds {
compatible = "pwm-leds";
/* struct pwm_dt_spec: phandle channel period(ns) flags */
bbled_pwm0: bbled_pwm0 {
pwms = <&bbled0 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
bbled_pwm1: bbled_pwm1 {
pwms = <&bbled1 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
bbled_pwm2: bbled_pwm2 {
pwms = <&bbled2 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
};
};

&pinctrl {
led0_gpio156_invert: led0_gpio156_invert {
pinmux = <MCHP_XEC_PINMUX(0156, MCHP_AF1)>;
microchip,output-func-invert;
};
led1_gpio157_invert: led1_gpio157_invert {
pinmux = <MCHP_XEC_PINMUX(0157, MCHP_AF1)>;
microchip,output-func-invert;
};
led2_gpio153_invert: led2_gpio153_invert {
pinmux = <MCHP_XEC_PINMUX(0153, MCHP_AF1)>;
microchip,output-func-invert;
};
};

&bbled0 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led0_gpio156>;
pinctrl-1 = <&led0_gpio156_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};

&bbled1 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led1_gpio157>;
pinctrl-1 = <&led1_gpio157_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};

&bbled2 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led2_gpio153>;
pinctrl-1 = <&led2_gpio153_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};
100 changes: 100 additions & 0 deletions samples/drivers/led_pwm/boards/mec172xevb_assy6906.overlay
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/*
* Copyright (c) 2023 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/dt-bindings/pwm/pwm.h>

/* MEC172x EVB
* BBLED controller 0 uses GPIO156/LED1 connected to JP71-11
* BBLED controller 1 uses GPIO157/LED2 connected to JP71-13
* BBLED controller 2 uses GPIO153/LED3 connected to JP71-5
* BBLED controller 3 uses GPIO035/PWM8 connected to JP67-19
* NOTE: Data sheet indicates BBLED3 uses GPIO035.
* Schematic Rev A1p0 shows LED3 on GPIO226 (incorrect).
* BBLED hardware divides input clock (32KHz or 48MHz) by (256 * (prescalar+1)
* and implements duty cycle for blink mode as an 8-bit value where 0 is off and
* 255 full on. BBLED PWM is 8-bit.
* BBLED-PWM driver get cycles API reports 32KHz/256 or 48M/256.
* Due to all the above we use 50 ms for DT PWM period.
*/

/* PWM_SEC(1) PWM_USEC(7812) */
/ {
pwmleds {
compatible = "pwm-leds";
/* struct pwm_dt_spec: phandle channel period(ns) flags */
bbled_pwm0: bbled_pwm0 {
pwms = <&bbled0 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
bbled_pwm1: bbled_pwm1 {
pwms = <&bbled1 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
bbled_pwm2: bbled_pwm2 {
pwms = <&bbled2 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
bbled_pwm3: bbled_pwm3 {
pwms = <&bbled3 0 PWM_MSEC(50) PWM_POLARITY_NORMAL>;
};
};
};

&pinctrl {
led0_gpio156_invert: led0_gpio156_invert {
pinmux = <MCHP_XEC_PINMUX(0156, MCHP_AF1)>;
microchip,output-func-invert;
};
led1_gpio157_invert: led1_gpio157_invert {
pinmux = <MCHP_XEC_PINMUX(0157, MCHP_AF1)>;
microchip,output-func-invert;
};
led2_gpio153_invert: led2_gpio153_invert {
pinmux = <MCHP_XEC_PINMUX(0153, MCHP_AF1)>;
microchip,output-func-invert;
};
led3_gpio035_invert: led3_gpio035_invert {
pinmux = <MCHP_XEC_PINMUX(035, MCHP_AF4)>;
microchip,output-func-invert;
};
};

&bbled0 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led0_gpio156>;
pinctrl-1 = <&led0_gpio156_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};

&bbled1 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led1_gpio157>;
pinctrl-1 = <&led1_gpio157_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};

&bbled2 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led2_gpio153>;
pinctrl-1 = <&led2_gpio153_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};

&bbled3 {
compatible = "microchip,xec-pwmbbled";
clock-select = "PWM_BBLED_CLK_32K";
pinctrl-0 = <&led3_gpio035>;
pinctrl-1 = <&led3_gpio035_sleep>;
pinctrl-names = "default", "sleep";
status = "okay";
#pwm-cells = <3>;
};

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