soc: mimxrt1180: Add USB support

This was tested on the MIMXRT1180 EVK board

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>

boards/nxp/mimxrt1180_evk/doc/index.rst

@@ -122,6 +122,8 @@ configuration supports the following hardware features:
 +-----------+------------+-------------------------------------+
 | HWINFO    | on-chip    | Unique device serial number         |
 +-----------+------------+-------------------------------------+
+| USB       | on-chip    | USB device                          |
++-----------+------------+-------------------------------------+
 
 The default configuration can be found in the defconfig file:
 :zephyr_file:`boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33_defconfig`

boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.dts

@@ -79,3 +79,15 @@
 &i3c2 {
 	status = "okay";
 };
+
+zephyr_udc0: &usb1 {
+	status = "okay";
+	phy_handle = <&usbphy1>;
+};
+
+&usbphy1 {
+	status = "okay";
+	tx-d-cal = <7>;
+	tx-cal-45-dp-ohms = <6>;
+	tx-cal-45-dm-ohms = <6>;
+};

boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml

@@ -25,4 +25,5 @@ supported:
   - pwm
   - uart
   - i3c
+  - usb_device
 vendor: nxp

boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.dts

@@ -51,3 +51,15 @@
 &i3c2 {
 	status = "okay";
 };
+
+zephyr_udc0: &usb1 {
+	status = "okay";
+	phy_handle = <&usbphy1>;
+};
+
+&usbphy1 {
+	status = "okay";
+	tx-d-cal = <7>;
+	tx-cal-45-dp-ohms = <6>;
+	tx-cal-45-dm-ohms = <6>;
+};

dts/arm/nxp/nxp_rt118x.dtsi

@@ -37,6 +37,13 @@
 			#size-cells = <1>;
 		};
 	};
+
+	/* USB PLL */
+	usbclk: usbpll-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		#clock-cells = <0>;
+	};
 };
 
 &peripheral {
@@ -934,15 +941,47 @@
 		#address-cells = <3>;
 		#size-cells = <0>;
 	};
+
+	usb1: usbd@2c80000 {
+		compatible = "nxp,ehci";
+		reg = <0x2c80000 0x1000>;
+		interrupts = <215 0>;
+		interrupt-names = "usb_otg";
+		clocks = <&usbclk>;
+		num-bidir-endpoints = <8>;
+		status = "disabled";
+	};
+
+	usb2: usbd@2c90000 {
+		compatible = "nxp,ehci";
+		reg = <0x2c90000 0x1000>;
+		interrupts = <214 0>;
+		interrupt-names = "usb_otg";
+		clocks = <&usbclk>;
+		num-bidir-endpoints = <8>;
+		status = "disabled";
+	};
+
+	usbphy1: usbphy@2ca0000 {
+		compatible = "nxp,usbphy";
+		reg = <0x2ca0000 0x1000>;
+		status = "disabled";
+	};
+
+	usbphy2: usbphy@2cb0000 {
+		compatible = "nxp,usbphy";
+		reg = <0x2cb0000 0x1000>;
+		status = "disabled";
+	};
 };
 
 &flexspi {
-		compatible = "nxp,imx-flexspi";
-		interrupts = <55 0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-		clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0>;
+	compatible = "nxp,imx-flexspi";
+	interrupts = <55 0>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "disabled";
+	clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0>;
 };
 
 &flexspi2 {

soc/nxp/imxrt/imxrt118x/soc.c

@@ -23,6 +23,10 @@
 #include <fsl_trdc.h>
 #include <zephyr/dt-bindings/clock/imx_ccm_rev2.h>
 #include <cmsis_core.h>
+#if CONFIG_USB_DC_NXP_EHCI
+#include "usb_phy.h"
+#include "usb.h"
+#endif
 
 /*
  * Set ELE_STICK_FAILED_STS to 0 when ELE status check is not required,
@@ -88,6 +92,17 @@ __attribute__((weak)) void board_flexspi_clock_safe_config(void)
 {
 }
 
+#if CONFIG_USB_DC_NXP_EHCI
+/* USB PHY condfiguration */
+#define BOARD_USB_PHY_D_CAL     (0x07U)
+#define BOARD_USB_PHY_TXCAL45DP (0x06U)
+#define BOARD_USB_PHY_TXCAL45DM (0x06U)
+
+usb_phy_config_struct_t usbPhyConfig = {
+	BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM,
+};
+#endif
+
 /**
  * @brief Initialize the system clock
  */
@@ -467,6 +482,16 @@ static ALWAYS_INLINE void clock_init(void)
 
 #endif /* CONFIG_DT_HAS_NXP_MCUX_I3C_ENABLED */
 
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && (CONFIG_USB_DC_NXP_EHCI || CONFIG_UDC_NXP_EHCI)
+	CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usb480M,
+		DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
+	CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M,
+		DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && CONFIG_USB_DC_NXP_EHCI
+	USB_EhciPhyInit(kUSB_ControllerEhci0, CPU_XTAL_CLK_HZ, &usbPhyConfig);
+#endif
+#endif
+
 	/* Keep core clock ungated during WFI */
 	CCM->LPCG[1].LPM0 = 0x33333333;
 	CCM->LPCG[1].LPM1 = 0x33333333;