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stm32cube: Modify SAI_TypeDef U585
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Changed SAI_TypeDef of U585 to consist
of two SAI_Block_TypeDef

Signed-off-by: Christopher Schirk <christopher.schirk@draeger.com>
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chrisschir committed Dec 18, 2024
1 parent d2a1f86 commit f9332b5
Showing 1 changed file with 14 additions and 13 deletions.
27 changes: 14 additions & 13 deletions stm32cube/stm32u5xx/soc/stm32u585xx.h
Original file line number Diff line number Diff line change
Expand Up @@ -1211,26 +1211,27 @@ typedef struct
/**
* @brief Serial Audio Interface
*/
typedef struct
{
__IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x00 */
__IO uint32_t CR2; /*!< SAI block x configuration register 2, Address offset: 0x04 */
__IO uint32_t FRCR; /*!< SAI block x frame configuration register, Address offset: 0x08 */
__IO uint32_t SLOTR; /*!< SAI block x slot register, Address offset: 0x0C */
__IO uint32_t IMR; /*!< SAI block x interrupt mask register, Address offset: 0x10 */
__IO uint32_t SR; /*!< SAI block x status register, Address offset: 0x14 */
__IO uint32_t CLRFR; /*!< SAI block x clear flag register, Address offset: 0x18 */
__IO uint32_t DR; /*!< SAI block x data register, Address offset: 0x1C */
} SAI_Block_TypeDef;

typedef struct
{
__IO uint32_t GCR; /*!< SAI global configuration register, Address offset: 0x00 */
uint32_t RESERVED[16]; /*!< Reserved, Address offset: 0x04 to 0x40 */
SAI_Block_TypeDef BLOCK_A; /*!< First Block of SAI Module Address offset: 0x04 */
SAI_Block_TypeDef BLOCK_B; /*!< Second Block of SAI Module Address offset: 0x24 */
__IO uint32_t PDMCR; /*!< SAI PDM control register, Address offset: 0x44 */
__IO uint32_t PDMDLY; /*!< SAI PDM delay register, Address offset: 0x48 */
} SAI_TypeDef;

typedef struct
{
__IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */
__IO uint32_t CR2; /*!< SAI block x configuration register 2, Address offset: 0x08 */
__IO uint32_t FRCR; /*!< SAI block x frame configuration register, Address offset: 0x0C */
__IO uint32_t SLOTR; /*!< SAI block x slot register, Address offset: 0x10 */
__IO uint32_t IMR; /*!< SAI block x interrupt mask register, Address offset: 0x14 */
__IO uint32_t SR; /*!< SAI block x status register, Address offset: 0x18 */
__IO uint32_t CLRFR; /*!< SAI block x clear flag register, Address offset: 0x1C */
__IO uint32_t DR; /*!< SAI block x data register, Address offset: 0x20 */
} SAI_Block_TypeDef;

/**
* @brief System configuration controller
*/
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