From ed81059fad8b84896467ec1438e37ab00fcdabbd Mon Sep 17 00:00:00 2001
From: Uri Shaked <uri@urishaked.com>
Date: Wed, 2 Sep 2020 23:50:05 +0300
Subject: [PATCH] perf(timer): speed up interrupt handling

---
 src/peripherals/timer.ts | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/peripherals/timer.ts b/src/peripherals/timer.ts
index dc1302a..5ba908e 100644
--- a/src/peripherals/timer.ts
+++ b/src/peripherals/timer.ts
@@ -232,6 +232,7 @@ export class AVRTimer {
   private tcntUpdated = false;
   private countingUp = true;
   private divider = 0;
+  private pendingInterrupt = false;
 
   // This is the temporary register used to access 16-bit registers (section 16.3 of the datasheet)
   private highByteTemp: u8 = 0;
@@ -302,6 +303,7 @@ export class AVRTimer {
   }
 
   set TIFR(value: u8) {
+    this.pendingInterrupt = value > 0;
     this.cpu.data[this.config.TIFR] = value;
   }
 
@@ -367,7 +369,7 @@ export class AVRTimer {
       }
     }
     this.tcntUpdated = false;
-    if (this.cpu.interruptsEnabled) {
+    if (this.cpu.interruptsEnabled && this.pendingInterrupt) {
       const { TIFR, TIMSK } = this;
       if (TIFR & TOV && TIMSK & TOIE) {
         avrInterrupt(this.cpu, this.config.ovfInterrupt);
@@ -381,6 +383,7 @@ export class AVRTimer {
         avrInterrupt(this.cpu, this.config.compBInterrupt);
         this.TIFR &= ~OCFB;
       }
+      this.pendingInterrupt = false;
     }
   }