merge bump/mill_chisel5 into develop

cannot generate code in one file bug fixed fpu is not default configuration now readme fixed only rift2330 and rift2370 are tested in ci Signed-off-by: Ruige <295054118@whut.edu.cn>
whutddk · Feb 6, 2024 · 21d127a · 21d127a
1 parent 7967e94
commit 21d127a
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diff --git a/.github/workflows/BuildAndTest.yml b/.github/workflows/BuildAndTest.yml
@@ -19,14 +19,19 @@ jobs:
     runs-on: [self-hosted, Linux, X64]
     name: chiselStage
     container:
-      image: whutddk/rift2env:riscvtest
+      image: whutddk/rift2env:chisel5
+      # options: >-
+      #   --memory 60g
+      #   --oom-kill-disable
+      #   --memory-swap -1
+
     # needs: clean
     # Steps represent a sequence of tasks that will be executed as part of the job
     steps:
       - name: set up apt
         run: |
           apt-get update
-          apt-get install -y wget git make
+          apt-get install -y wget git make curl
 
 
       - uses: actions/checkout@v3.3.0
@@ -41,8 +46,11 @@ jobs:
       - name: Compile
         run: |
           echo ${GITHUB_WORKSPACE}
-          sbt "test:runMain test.testAll"
-          sbt doc
+
+          rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
+          mill -i rift2Core[chisel].test.runMain test.testAll
+          mill --no-server show rift2Core[chisel].docJar
+          unzip -d ScalaDoc/ out/rift2Core/chisel/docJar.dest/out.jar
 
           echo $GITHUB_REF_NAME
           
@@ -53,19 +61,19 @@ jobs:
 
           cp ${GITHUB_WORKSPACE}/LICENSE.Apache ${GITHUB_WORKSPACE}/../
           cp ${GITHUB_WORKSPACE}/LICENSE.NPL ${GITHUB_WORKSPACE}/../
-          cp -R target/scala-2.13/api ${GITHUB_WORKSPACE}/../ScalaDoc/$GITHUB_REF_NAME
-
-          cd ${GITHUB_WORKSPACE}/generated/Release/
-          tar -cvf Rift2300-Release.tar Rift2300/*
-          tar -cvf Rift2310-Release.tar Rift2310/*
-          tar -cvf Rift2320-Release.tar Rift2320/*
-          tar -cvf Rift2330-Release.tar Rift2330/*
-          tar -cvf Rift2340-Release.tar Rift2340/*
-          tar -cvf Rift2350-Release.tar Rift2350/*
-          tar -cvf Rift2360-Release.tar Rift2360/*
-          tar -cvf Rift2370-Release.tar Rift2370/*
-          tar -cvf Rift2380-Release.tar Rift2380/*
-          tar -cvf Rift2390-Release.tar Rift2390/*
+          cp -R ScalaDoc/* ${GITHUB_WORKSPACE}/../ScalaDoc/$GITHUB_REF_NAME
+
+          # cd ${GITHUB_WORKSPACE}/generated/Release/
+          # tar -cvf Rift2300-Release.tar Rift2300/*
+          # tar -cvf Rift2310-Release.tar Rift2310/*
+          # tar -cvf Rift2320-Release.tar Rift2320/*
+          # tar -cvf Rift2330-Release.tar Rift2330/*
+          # tar -cvf Rift2340-Release.tar Rift2340/*
+          # tar -cvf Rift2350-Release.tar Rift2350/*
+          # tar -cvf Rift2360-Release.tar Rift2360/*
+          # tar -cvf Rift2370-Release.tar Rift2370/*
+          # tar -cvf Rift2380-Release.tar Rift2380/*
+          # tar -cvf Rift2390-Release.tar Rift2390/*
 
           cd ${GITHUB_WORKSPACE}/generated/Debug/
           tar -cvf Rift2300-Debug.tar  Rift2300/*
@@ -89,7 +97,7 @@ jobs:
           git checkout gh_pages
 
           rm -rf ${GITHUB_WORKSPACE}/ScalaDoc/$GITHUB_REF_NAME
-          cp -R ${GITHUB_WORKSPACE}/../ScalaDoc/$GITHUB_REF_NAME ${GITHUB_WORKSPACE}/ScalaDoc/$GITHUB_REF_NAME
+          cp -R ${GITHUB_WORKSPACE}/../ScalaDoc/* ${GITHUB_WORKSPACE}/ScalaDoc/
           cp ${GITHUB_WORKSPACE}/../LICENSE.Apache ${GITHUB_WORKSPACE}/
           cp ${GITHUB_WORKSPACE}/../LICENSE.NPL ${GITHUB_WORKSPACE}/
 
@@ -124,25 +132,25 @@ jobs:
           prerelease: true
           target_commitish: ${{github.ref_name}}
           files: |
-            ./generated/Release/Rift2300-Release.tar
+            # ./generated/Release/Rift2300-Release.tar
             ./generated/Debug/Rift2300-Debug.tar
-            ./generated/Release/Rift2310-Release.tar
+            # ./generated/Release/Rift2310-Release.tar
             ./generated/Debug/Rift2310-Debug.tar
-            ./generated/Release/Rift2320-Release.tar
+            # ./generated/Release/Rift2320-Release.tar
             ./generated/Debug/Rift2320-Debug.tar
-            ./generated/Release/Rift2330-Release.tar
+            # ./generated/Release/Rift2330-Release.tar
             ./generated/Debug/Rift2330-Debug.tar
-            ./generated/Release/Rift2340-Release.tar
+            # ./generated/Release/Rift2340-Release.tar
             ./generated/Debug/Rift2340-Debug.tar
-            ./generated/Release/Rift2350-Release.tar
+            # ./generated/Release/Rift2350-Release.tar
             ./generated/Debug/Rift2350-Debug.tar
-            ./generated/Release/Rift2360-Release.tar
+            # ./generated/Release/Rift2360-Release.tar
             ./generated/Debug/Rift2360-Debug.tar
-            ./generated/Release/Rift2370-Release.tar
+            # ./generated/Release/Rift2370-Release.tar
             ./generated/Debug/Rift2370-Debug.tar
-            ./generated/Release/Rift2380-Release.tar
+            # ./generated/Release/Rift2380-Release.tar
             ./generated/Debug/Rift2380-Debug.tar
-            ./generated/Release/Rift2390-Release.tar
+            # ./generated/Release/Rift2390-Release.tar
             ./generated/Debug/Rift2390-Debug.tar
             ./LICENSE.Apache
             ./LICENSE.NPL
@@ -160,25 +168,25 @@ jobs:
           prerelease: false
           target_commitish: ${{github.ref_name}}
           files: |
-            ./generated/Release/Rift2300-Release.tar
+            # ./generated/Release/Rift2300-Release.tar
             ./generated/Debug/Rift2300-Debug.tar
-            ./generated/Release/Rift2310-Release.tar
+            # ./generated/Release/Rift2310-Release.tar
             ./generated/Debug/Rift2310-Debug.tar
-            ./generated/Release/Rift2320-Release.tar
+            # ./generated/Release/Rift2320-Release.tar
             ./generated/Debug/Rift2320-Debug.tar
-            ./generated/Release/Rift2330-Release.tar
+            # ./generated/Release/Rift2330-Release.tar
             ./generated/Debug/Rift2330-Debug.tar
-            ./generated/Release/Rift2340-Release.tar
+            # ./generated/Release/Rift2340-Release.tar
             ./generated/Debug/Rift2340-Debug.tar
-            ./generated/Release/Rift2350-Release.tar
+            # ./generated/Release/Rift2350-Release.tar
             ./generated/Debug/Rift2350-Debug.tar
-            ./generated/Release/Rift2360-Release.tar
+            # ./generated/Release/Rift2360-Release.tar
             ./generated/Debug/Rift2360-Debug.tar
-            ./generated/Release/Rift2370-Release.tar
+            # ./generated/Release/Rift2370-Release.tar
             ./generated/Debug/Rift2370-Debug.tar
-            ./generated/Release/Rift2380-Release.tar
+            # ./generated/Release/Rift2380-Release.tar
             ./generated/Debug/Rift2380-Debug.tar
-            ./generated/Release/Rift2390-Release.tar
+            # ./generated/Release/Rift2390-Release.tar
             ./generated/Debug/Rift2390-Debug.tar
             ./LICENSE.Apache
             ./LICENSE.NPL
@@ -202,10 +210,14 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        version: [Rift2330, Rift2340, Rift2350, Rift2360, Rift2370, Rift2380, Rift2390]
+        version: [Rift2330, Rift2370]
     runs-on: [self-hosted, Linux, X64]
     container:
-      image: whutddk/rift2env:riscvtest
+      image: whutddk/rift2env:chisel5
+      # options: >-
+      #   --memory 60g
+      #   --oom-kill-disable
+      #   --memory-swap -1
 
 
     # services:
@@ -253,7 +265,7 @@ jobs:
           cd /Rift2Core
 
           wget https://github.com/whutddk/Rift2Core/releases/download/${{ steps.getrelease.outputs.tag_name }}/${{matrix.version}}-Debug.tar
-          wget https://github.com/whutddk/Rift2Core/releases/download/${{ steps.getrelease.outputs.tag_name }}/${{matrix.version}}-Release.tar
+          # wget https://github.com/whutddk/Rift2Core/releases/download/${{ steps.getrelease.outputs.tag_name }}/${{matrix.version}}-Release.tar
 
 
 
@@ -262,10 +274,10 @@ jobs:
           cd /Rift2Core
           
           mkdir -p ./generated/Debug
-          mkdir -p ./generated/Release
+          # mkdir -p ./generated/Release
           
           tar -xvf ./${{matrix.version}}-Debug.tar -C ./generated/Debug
-          tar -xvf ./${{matrix.version}}-Release.tar -C ./generated/Release
+          # tar -xvf ./${{matrix.version}}-Release.tar -C ./generated/Release
 
 
 
@@ -276,7 +288,7 @@ jobs:
           cp /test/* ./tb/ci
           git restore -s ${{ github.ref_name }} -- ./tb
           git restore -s ${{ github.ref_name }} -- ./Makefile
-# git restore -s ${{ github.ref_name }} -- ./src/yosys/area.ys
+          # git restore -s ${{ github.ref_name }} -- ./src/yosys/area.ys
 
         
       - name: isa, dhrystone, coremark, yosys
@@ -292,7 +304,7 @@ jobs:
 
 
 
-# make area CONFIG=/Release/${{matrix.version}}/
+      # make area CONFIG=/Release/${{matrix.version}}/
 
       - name: commit result
         if: success() || failure()
@@ -304,7 +316,7 @@ jobs:
           git add ./generated/Debug/${{matrix.version}}/*.json
           git commit --no-gpg-sign --allow-empty -m "ci update ${{matrix.version}}"
 
-# git add ./generated/Release/${{matrix.version}}/area.json
+          # git add ./generated/Release/${{matrix.version}}/area.json
 
       - name: push
         if: success() || failure()

diff --git a/.gitignore b/.gitignore
@@ -366,3 +366,5 @@ tb/compile/env/
 VSimTop
 tb/sw/opensbi/fw_jump.dep
 tb/sw/opensbi/fw_jump.elf.ld
+mill
+ScalaDoc/
diff --git a/Makefile b/Makefile
@@ -260,7 +260,7 @@ isa ?= $(aluisa) $(bruisa) $(lsuisa) $(privisa) $(mulisa)# $(fpuisa)
 
 
 
-.PHONY: compile clean VSimTop
+.PHONY: compile clean VSimTop mill doc
 
 module:
 	sbt "test:runMain test.testModule --target-dir generated --show-registrations --full-stacktrace -E verilog"
@@ -270,22 +270,35 @@ compile:
 	sbt "test:runMain test.testMain \
 	-e verilog"
 
-
 #--gen-mem-verilog \
 # --inline \
 
 # --list-clocks \
 
+
+mill:
+	rm -rf ./generated/Main/
+	rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
+	./mill --no-server clean
+	./mill -i rift2Core[chisel].test.runMain test.testMain
+
+doc:
+	rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
+	./mill --no-server show rift2Core[chisel].docJar
+	unzip -d ScalaDoc/ out/rift2Core/chisel/docJar.dest/out.jar
+
 noc:
 	rm -rf ./generated/Main/
 	sbt "test:runMain test.testNoC \
 	-e verilog"
 
 
 line: 
+	rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
 	rm -rf generated/Debug/
-	rm -rf generated/Release/
-	sbt "test:runMain test.testAll"
+	# rm -rf generated/Release/
+	./mill --no-server clean
+	./mill -i rift2Core[chisel].test.runMain test.testAll
 
 CONFIG ?= /Main/
 
@@ -312,7 +325,7 @@ VSimTop:
 	${R2}/tb/verilator/sim_main.cpp  \
 	${R2}/tb/verilator/diff.cpp \
 	-Mdir ./generated/build/$(CONFIG) \
-	-j 30
+	-j 1
 
 
 

diff --git a/README.md b/README.md
@@ -12,32 +12,29 @@
 --------------------------------------------
 
 
-Based on Chisel3, Rift2Core is a 9-stage, N-issue(Configurable), out-of-order, 64-bits RISC-V Core, which supports RV64GC and M, S, U mode.
+Based on Chisel, Rift2Core is a 9-stage, N-issue(Configurable), out-of-order, 64-bits RISC-V Core, which supports RV64GC and M, S, U mode.
 
 [RiftCore](https://github.com/whutddk/RiftCore) is the previous version of Rift2Core in Verilog.
 
 
 
 
-
-
-
-
-
 ----------------
 
 
 ## [How to Setup](doc/Setup.md)
 You can complete the deployment of the compilation and test environment following the steps below:
 * Setup Repo
-* Setup sbt
+* ~~Setup sbt~~
+* Setup mill
 * Setup verilator and gtkwave
-* Compile chisel3 to verilog
+* ~~Compile chisel3 to verilog~~
+* Compile chisel to verilog
 * Compile Model of Rif2Chip
 * Test a single ISA with waveform
 * Test all ISA without waveform
 
-Also we provide a [Docker-Image](https://hub.docker.com/repository/docker/whutddk/rift2env) mainly for CI, which can also be used for compiling and testing.
+Also we provide a [Docker-Image](https://hub.docker.com/repository/docker/whutddk/chisel5) mainly for CI, which can also be used for compiling and testing.
 
 ## [How to Config](doc/Configuration.md)
 
@@ -55,12 +52,12 @@ Download Pre-compile Version [Here](https://github.com/whutddk/Rift2Core/release
 |Rift-2310|N/A|N/A|N/A|
 |Rift-2320|N/A|N/A|N/A|
 |Rift-2330|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2330/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2330/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2330/coremark.json)|
-|Rift-2340|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2340/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2340/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2340/coremark.json)|
-|Rift-2350|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2350/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2350/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2350/coremark.json)|
-|Rift-2360|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2360/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2360/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2360/coremark.json)|
+|Rift-2340|N/A|N/A|N/A|
+|Rift-2350|N/A|N/A|N/A|
+|Rift-2360|N/A|N/A|N/A|
 |Rift-2370|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2370/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2370/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2370/coremark.json)|
-|Rift-2380|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2380/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2380/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2380/coremark.json)|
-|Rift-2390|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2390/isa.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2390/dhrystone.json)|![](https://img.shields.io/endpoint?url=https://raw.githubusercontent.com/whutddk/Rift2Core/gh_pages/generated/Debug/Rift2390/coremark.json)|
+|Rift-2380|N/A|N/A|N/A|
+|Rift-2390|N/A|N/A|N/A|
 
 
 
@@ -87,11 +84,11 @@ Download Pre-compile Version [Here](https://github.com/whutddk/Rift2Core/release
 
 ## API
 
-Rift2Core is not only a highly configurable RISC-V CPU generator, but also provides configurable generation of submodules.
+Rift2Core is not only an extremely configurable RISC-V CPU generator, but also provides configurable generation of submodules.
 
 Search the provided API in the Scala Doc.
 
-[API Here](https://whutddk.github.io/Rift2Core/ScalaDoc/api/index.html)
+[API Here](https://whutddk.github.io/Rift2Core/ScalaDoc/index.html)
 
 ## Wiki