diff --git a/flow/designs/asap7/mock-array/simulate.sh b/flow/designs/asap7/mock-array/simulate.sh
index 8fb1af516c..47bd552266 100755
--- a/flow/designs/asap7/mock-array/simulate.sh
+++ b/flow/designs/asap7/mock-array/simulate.sh
@@ -18,6 +18,7 @@ cp $FLOW_HOME/results/asap7/mock-array_Element/base/6_final.v $POST_DIR/MockArra
 
 # Run simulation and have Verilator write the output files to the objects area
 verilator -Wall --cc \
+  --timescale 1ps/1ps \
   -Wno-DECLFILENAME \
   -Wno-UNUSEDSIGNAL \
   -Wno-PINMISSING \
@@ -35,7 +36,7 @@ verilator -Wall --cc \
   $FLOW_HOME/designs/src/mock-array/simulate.cpp
 
 # Link the generated object files into the VMockArray executable
-make -j -C $OBJ_DIR -f VMockArray.mk
+make -j16 -C $OBJ_DIR -f VMockArray.mk
 
 # Run the simulation
 $OBJ_DIR/VMockArray
diff --git a/flow/designs/src/mock-array/simulate.cpp b/flow/designs/src/mock-array/simulate.cpp
index e5a2e78b53..7b2fba8945 100644
--- a/flow/designs/src/mock-array/simulate.cpp
+++ b/flow/designs/src/mock-array/simulate.cpp
@@ -80,7 +80,7 @@ int main(int argc, char** argv) {
 
             for (int k = 0; k < 2; k++) {
                 top->eval();
-                vcd->dump(tick++);
+                vcd->dump(tick++ * 125);
                 top->clock = !top->clock;
             }
         }