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apfcp.tex
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\documentclass[11pt,xcolor=dvipsnames]{beamer}
\usepackage{minted}
\usepackage{graphics}
\usecolortheme[named=Brown]{structure}
\usetheme{CambridgeUS}
\setbeamertemplate{navigation symbols}{}
\setbeamertemplate{section in toc}[ball unnumbered]
\setbeamertemplate{itemize item}[square]
\setbeamertemplate{itemize subitem}[square]
\setbeamerfont{frametitle}{size*={12}{1}}
\setbeamerfont{section in head/foot}{size*={9.5}{1}}
\setbeamersize{text margin left = 1em}
\usemintedstyle{perldoc}
\newminted{gas}{fontsize=\fontsize{9}{8},obeytabs=true}
\newminted{customobjdump}{fontsize=\fontsize{9}{8},obeytabs=true}
\newminted{c}{fontsize=\fontsize{9.25}{8.5},obeytabs=true}
\newminted{nasm}{fontsize=\fontsize{9.25}{8.5},obeytabs=true}
\newminted{bash}{fontsize=\fontsize{9.25}{8.5},obeytabs=true}
\newminted{text}{fontsize=\fontsize{9.25}{8.5},obeytabs=true}
\newcommand{\vs}{\vspace{0.5em}}
\newcommand{\mvs}{\vspace{-0.95em}}
\AtBeginSection{
\begin{frame}
\begin{center}
\structure{\huge \insertsection}
\end{center}
\end{frame}
}
\makeatletter
\setbeamertemplate{footline}
{
\leavevmode%
\hbox{%
\begin{beamercolorbox}[wd=.50\paperwidth,ht=2.25ex,dp=1ex,center]{title in head/foot}%
\usebeamerfont{title in head/foot}\insertshorttitle
\end{beamercolorbox}%
\begin{beamercolorbox}[wd=.50\paperwidth,ht=2.25ex,dp=1ex,right]{date in head/foot}%
\usebeamerfont{date in head/foot}\insertshortdate{}\hspace*{2em}
\insertframenumber{} / \inserttotalframenumber\hspace*{2ex}
\end{beamercolorbox}}%
\vskip0pt%
}
\makeatother
\makeatletter
\setbeamertemplate{headline}
{
\leavevmode%
\hbox{%
\begin{beamercolorbox}[wd=\paperwidth,ht=5ex,dp=2.5ex,left]{section in head/foot}%
\hspace*{2ex}\usebeamerfont{section in head/foot}\insertsectionhead
\end{beamercolorbox} }%
% \begin{beamercolorbox}[wd=.30\paperwidth,ht=5ex,dp=2.5ex,left]{subsection in head/foot}%
% \usebeamerfont{subsection in head/foot}\hspace*{2ex}\insertsubsectionhead
% \end{beamercolorbox}}%
\vskip0pt%
}
\makeatother
\begin{document}
\title{x86 Assembly Primer for C Programmers}
\author{Ivan Sergeev}
\institute{\url{https://github.com/vsergeev/apfcp} \\ \vs {\ttfamily git clone git://github.com/vsergeev/apfcp.git}}
\date{January 22/24, 2013}
%%% Title Slide
\begin{frame}[plain]
\titlepage
\end{frame}
\section*{Introduction and Example}
%%% Introduction and Example Slide 0
\begin{frame}[fragile,t]
\frametitle{Why Assembly?}
\begin{itemize}
\item Embedded Systems
\item Well-characterized execution time
\item Bootstrapping an OS
\item Compilers
\item Debugging
\item Fancy instructions
\vs \vs
\pause
\item {\bf Sharpened intuition} on computing
\begin{itemize}
\item Gut instinct on implementation and feasibility
\item Justification for liking powers of two
\item Turing completeness is a special cage
\end{itemize}
\end{itemize}
\end{frame}
%%% Introduction and Example Slide 1
\begin{frame}[fragile,t]
\frametitle{Reasonable strlen (example-strlen.c)}
Reasonable implementation of \verb+strlen()+ in C:\vs
\begin{ccode}
size_t ex_strlen(const char *s) {
size_t i;
for (i = 0; *s != '\0'; i++)
s++;
return i;
}
\end{ccode}
\end{frame}
%%% Introduction and Example Slide 2
\begin{frame}[fragile,t]
\frametitle{Reasonable strlen (example-strlen.c) Disassembly}
Let's compile and disassemble it.\vs
\begin{customobjdumpcode}
$ gcc -O1 example-strlen.c -o example-strlen
$ objdump -d example-strlen
...
080483b4 <ex_strlen>:
80483b4: 8b 54 24 04 mov 0x4(%esp),%edx
80483b8: b8 00 00 00 00 mov $0x0,%eax
80483bd: 80 3a 00 cmpb $0x0,(%edx)
80483c0: 74 09 je 80483cb <ex_strlen+0x17>
80483c2: 83 c0 01 add $0x1,%eax
80483c5: 80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
80483c9: 75 f7 jne 80483c2 <ex_strlen+0xe>
80483cb: f3 c3 repz ret
...
\end{customobjdumpcode}
\begin{itemize}
\item Output of optimization levels 2 and 3 only differs with added padding bytes for memory alignment.
\end{itemize}
\end{frame}
%% Introduction and Example Slide 3
\begin{frame}[fragile,t]
\frametitle{Reasonable strlen (example-strlen.c) Disassembly}
Commented disassembly for \verb+ex_strlen()+:\vs
\begin{gascode}
# size_t strlen(const char *s);
ex_strlen:
mov 0x4(%esp),%edx # %edx = argument s
mov $0x0,%eax # %eax = 0
cmpb $0x0,(%edx) # Compare *(%edx) with 0x00
je end # If equal, jump to return
loop:
add $0x1,%eax # %eax += 1
cmpb $0x0,(%edx,%eax,1) # Compare *(%edx + %eax*1), 0x00
jne loop # If not equal, jump to add
end:
repz ret # Return, return value in %eax
\end{gascode}
\end{frame}
%%% Introduction and Example Slide 4
\begin{frame}[fragile,t]
\frametitle{glibc strlen (example-strlen.c)}
glibc's i386 implementation of \verb+strlen()+:\vs
\begin{customobjdumpcode}
$ cat glibc/sysdeps/i386/strlen.c
\end{customobjdumpcode}
\begin{ccode}
...
size_t
strlen (const char *str)
{
int cnt;
asm("cld\n" /* Search forward. */
/* Some old versions of gas need `repne' instead of `repnz'. */
"repnz\n" /* Look for a zero byte. */
"scasb" /* %0, %1, %3 */ :
"=c" (cnt) : "D" (str), "0" (-1), "a" (0));
return -2 - cnt;
}
...
\end{ccode}
\end{frame}
%%% Introduction and Example Slide 5
\begin{frame}[fragile,t]
\frametitle{glibc strlen (example-strlen.c) Disassembly}
Let's compile and disassemble it.\vs
\begin{customobjdumpcode}
$ gcc -O1 example-strlen.c -o example-strlen
$ objdump -d a.out
...
080483cd <glibc_strlen>:
80483cd: 57 push %edi
80483ce: b9 ff ff ff ff mov $0xffffffff,%ecx
80483d3: b8 00 00 00 00 mov $0x0,%eax
80483d8: 8b 7c 24 08 mov 0x8(%esp),%edi
80483dc: fc cld
80483dd: f2 ae repnz scas %es:(%edi),%al
80483df: b8 fe ff ff ff mov $0xfffffffe,%eax
80483e4: 29 c8 sub %ecx,%eax
80483e6: 5f pop %edi
80483e7: c3 ret
..
\end{customobjdumpcode}
\end{frame}
%%% Introduction and Example Slide 6
%\begin{frame}[fragile,t]
%\frametitle{glibc strlen (example-strlen.c) disassembly}
%Commented disassembly for glibc's \verb+strlen()+:\vs
%\begin{gascode}
%# size_t strlen(const char *s);
%strlen:
% push %edi # Save %edi
% mov $0xffffffff,%ecx # %ecx = 0xffffffff
% mov $0x0,%eax # %eax = 0
% mov 0x8(%esp),%edi # %edi = argument s
% cld # Clear direction flag
%
% repnz scas %es:(%edi),%al # Repeat scan while *(%edi) != 0x0
%
% mov $0xfffffffe,%eax # %eax = 0xfffffffe
% sub %ecx,%eax # %eax = %eax - %ecx
% pop %edi # Restore %edi
% ret # Return, return value in %eax
%\end{gascode}
%\end{frame}
%%% Introduction and Example Slide 7
\begin{frame}[fragile,t]
\frametitle{Disassembly side-by-side}
A side-by-side comparison of the disassembly:\vspace{-0.8em}
\begin{columns}[T]
\column{0.5\textwidth}
\begin{customobjdumpcode*}{fontsize=\fontsize{6.5}{8},frame=single}
<ex_strlen>:
# Initialization
8b 54 24 04 mov 0x4(%esp),%edx
b8 00 00 00 00 mov $0x0,%eax
80 3a 00 cmpb $0x0,(%edx)
74 09 je 80483cb <ex_strlen+0x17>
# Main loop
83 c0 01 add $0x1,%eax
80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
75 f7 jne 80483c2 <ex_strlen+0xe>
# End
f3 c3 repz ret
\end{customobjdumpcode*}
\column{0.5\textwidth}
\begin{customobjdumpcode*}{fontsize=\fontsize{6.5}{8},frame=single}
<glibc_strlen>:
# Initialization
57 push %edi
b9 ff ff ff ff mov $0xffffffff,%ecx
b8 00 00 00 00 mov $0x0,%eax
8b 7c 24 08 mov 0x8(%esp),%edi
fc cld
# Main loop
f2 ae repnz scas %es:(%edi),%al
# End
b8 fe ff ff ff mov $0xfffffffe,%eax
29 c8 sub %ecx,%eax
5f pop %edi
c3 ret
\end{customobjdumpcode*}
\end{columns}
\end{frame}
%%% Introduction and Example Slide 8
\begin{frame}[fragile,t]
\frametitle{Disassembly side-by-side}
\mvs
A side-by-side comparison of the main loop disassembly:\vspace{-0.8em}
\begin{columns}[T]
\column{0.5\textwidth}
\begin{customobjdumpcode*}{fontsize=\fontsize{6.5}{8},frame=single}
<ex_strlen>:
...
# Main loop
83 c0 01 add $0x1,%eax
80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
75 f7 jne 80483c2 <ex_strlen+0xe>
...
\end{customobjdumpcode*}
\column{0.5\textwidth}
\begin{customobjdumpcode*}{fontsize=\fontsize{6.5}{8},frame=single}
<glibc_strlen>:
...
# Main loop
f2 ae repnz scas %es:(%edi),%al
...
\end{customobjdumpcode*}
\end{columns}
\vs
\begin{itemize}
\item glibc's i386 \verb+strlen()+ "main loop" is only 2 bytes!
\begin{itemize}
\item In fact, it's only one instruction: \verb+repnz scas (%edi),%al+.
\end{itemize}
\pause
\item Reasonable strlen's "main loop" is three instructions, with a conditional branch \verb+jne 0x80483c2+.
\pause
\item An older example of when hand-assembly utilized processor features for a more efficient implementation
\item glibc's i486 and i586 implementations of {\ttfamily strlen()} are still assembly, but much more complicated, taking into account memory alignment and processor pipeline
\end{itemize}
\end{frame}
% Outline Slide
\section*{Table of Contents}
\begin{frame}{Outline}
\tableofcontents[part=1]
\end{frame}
\begin{frame}{Outline}
\tableofcontents[part=2]
\end{frame}
\part{1}
\section{Topic 1: State, Instructions, Fetch-Decode-Execute}
\begin{frame}[fragile,t]
\frametitle{State and Instructions}
\begin{itemize}
\item State is retained information
\begin{itemize}
\item CPU Registers: small, built-in, referred to by name \\ ({\ttfamily \%eax, \%ebx, \%ecx, \%edx, ...})
\item Memory: large, external, referred to by address \\ ({\ttfamily 0x80000000, ...})
\end{itemize}
\item Instructions affect and/or use state
\begin{itemize}
\item Add a constant to a register, subtract two registers, write to a memory location, jump to a memory location if a flag is set, etc.
\end{itemize}
\vs
\pause
\item Sufficient expressiveness of instructions makes a CPU Turing complete, provided you have infinite memory
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{8086 CPU Registers}
\mvs
\begin{figure}
\centering \includegraphics[width=0.85\textwidth]{figures/8086state.png}
\end{figure}
\begin{itemize}
\item Original 8086 was a 16-bit CPU
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{386+ CPU Registers}
\mvs
\begin{figure}
\centering \includegraphics[width=0.85\textwidth]{figures/386state.png}
\end{figure}
\begin{itemize}
\item 386+ is a 32-bit CPU, all registers extended to 32-bits
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{386+ CPU Registers and Memory}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386statemem.png}
\end{figure}
\begin{itemize}
\item Registers + Memory comprise (almost) total system state
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instructions}
\begin{itemize}
\item x86 instructions manipulate CPU registers, memory, and I/O ports
\item Encoded as numbers, sitting in memory like any other data
\item Uniquely defined for each architecture in its {\bf instruction set}
\item {\ttfamily \%eip} contains address of next instruction
\vs \vs \vs
\pause
\item Fetch-Decode-Execute Simplified CPU Model
\begin{itemize}
\item CPU {\bf fetches} data at address {\ttfamily \%eip} from main memory \\
\item CPU {\bf decodes} data into an instruction \\
\item CPU {\bf executes} instruction, \\ possibly manipulating memory, I/O, and its own state, including {\ttfamily \%eip}
\end{itemize}
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute0.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute1.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute2.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute3.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute4.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute5.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute6.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Instruction Fetch-Decode-Execute}
\mvs
\begin{figure}
\centering \includegraphics[width=0.65\textwidth]{figures/386fetch_decode_execute7.png}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Sampling of Core 386+ User Instructions}
\mvs
\begin{itemize}
\item {\bf Arithmetic:} {\ttfamily adc, add, and, cmp, dec, div, idiv, imul, inc, mul, neg, not, or, rcl, rcr, rol, ror, sal, sar, sbb, shl, shr, sub, test, xor, lea}
\item {\bf Flags:} {\ttfamily clc / stc, cld / std, cli / sti, cmc}
\item {\bf String:} {\ttfamily cmpsb / cmpsw, lodsb / lodsw, movsb / movsw, scasb / scasw, stosb / stosw, repxx}
\item {\bf Stack:} {\ttfamily push, pop}
\item {\bf Memory:} {\ttfamily mov}
\item {\bf Flow Control:} {\ttfamily call, jxx, jmp, ret / retn / retf, loop/loopxx}
\item {\bf Operating System:} {\ttfamily int, into, iret, hlt, pushf, popf, popad, popfd, pushad}
\item {\bf Input/Output:} {\ttfamily in, out}
\item {\bf Misc:} {\ttfamily aaa, aad, aam, aas, daa, cbw, cwd, lahf, lds, les, lock, wait, xchg, xlat, nop}
\end{itemize}
\end{frame}
\section{Topic 2: Arithmetic, and Data Transfer}
\begin{frame}[fragile,t]
\frametitle{Instructions in Assembly}
\begin{itemize}
\item Instructions represented by a mnemonic and operands
\item AT\&T/GAS syntax
\begin{itemize}
\item {\bf No operands:} \verb+<mnemonic>+
\begin{itemize}
\item {\ttfamily nop}
\end{itemize}
\item {\bf One operand:} \verb+<mnemonic> <dest>+
\begin{itemize}
\item {\ttfamily incl \%eax}
\end{itemize}
\item {\bf Two operands:} \verb+<mnemonic> <src>,<dest>+
\begin{itemize}
\item {\ttfamily addl \$0x1, \%eax}
\end{itemize}
\end{itemize}
\vs
\pause
\item Source and destination operands are typically one of:
\begin{itemize}
\item {\bf Register:} {\ttfamily \%eax, \%ebx, \%ecx, \%edx,} etc.
\begin{itemize}
\item {\ttfamily movl \%eax, \%ebx}
\end{itemize}
\item {\bf Immediate:} constant value embedded in the instruction encoding
\begin{itemize}
\item {\ttfamily movl \$0x1, \%eax}
\end{itemize}
\item {\bf Memory:} constant value representing an absolute (0x80000000) or relative address (+4)
\begin{itemize}
\item {\ttfamily movl 0x800000000, \%eax}
\end{itemize}
\end{itemize}
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Example Arithmetic and Data Transfer (example-arith-mov.S)}
\mvs
\begin{gascode}
.section .text
nop # ; (Do nothing!)
# add, sub, adc, and, or, xor
addl %eax, %ebx # %ebx = %ebx + %eax
addl magicNumber, %ebx # %ebx = %ebx + *(magicNumber)
addl %ebx, magicNumber # *(magicNumber) = *(magicNumber) + %ebx
addl $0x12341234, %ebx # %ebx = %ebx + 0x12341234
# inc, dec, not, neg
decl %eax # %eax--
decw %ax # %ax--
decb %al # %al--
# rol, rcl, shl, shr, sal, sar
shrl $3, %eax # %eax = %eax >> 3
shrl $3, magicNumber # *(magicNumber) = *(magicNumber) >> 3
# mov
movl %eax, %ebx # %ebx = %eax
movl magicNumber, %eax # %eax = *(magicNumber)
movl %eax, magicNumber # *(magicNumber) = %eax
.section .data
magicNumber: .long 0xdeadbeef # *magicNumber = 0xdeadbeef;
\end{gascode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Ex. Arithmetic and Data Transfer (example-arith-mov.S) Disassembly}
\mvs
\begin{customobjdumpcode}
$ as example-arith-mov.S -o example-arith-mov.o
$ ld example-arith-mov.o -o example-arith-mov
$ objdump -D example-arith-mov
Disassembly of section .text:
08048074 <.text>:
8048074: 90 nop
8048075: 01 c3 add %eax,%ebx
8048077: 03 1d a4 90 04 08 add 0x80490a4,%ebx
804807d: 01 1d a4 90 04 08 add %ebx,0x80490a4
8048083: 81 c3 34 12 34 12 add $0x12341234,%ebx
8048089: 48 dec %eax
804808a: 66 48 dec %ax
804808c: fe c8 dec %al
804808e: c1 e8 03 shr $0x3,%eax
8048091: c1 2d a4 90 04 08 03 shrl $0x3,0x80490a4
8048098: 89 c3 mov %eax,%ebx
804809a: a1 a4 90 04 08 mov 0x80490a4,%eax
804809f: a3 a4 90 04 08 mov %eax,0x80490a4
Disassembly of section .data:
080490a4 <magicNumber>:
80490a4: ef out %eax,(%dx)
80490a5: be .byte 0xbe
80490a6: ad lods %ds:(%esi),%eax
80490a7: de .byte 0xde
\end{customobjdumpcode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{A Note on GAS Syntax}
\begin{itemize}
\item Syntax
\begin{itemize}
\item {\ttfamily \%} precedes a register: {\ttfamily \%eax}
\item {\ttfamily \$} precedes a constant: {\ttfamily \$5, \$0xff, \$07, \$'A, \$0b111}
\item {\ttfamily .} precedes a directive: {\ttfamily .byte, .long, .ascii, .section, .comm}
\item {\ttfamily \#} precedes a comment
\vs
\pause
\item {\bf No special character precedes a dereferenced memory address:} \\ {\ttfamily movl \%eax, 0x80000000 \;\; \# *(0x80000000) = \%eax}
\pause
\item {\ttfamily mylabel:} defines a label, a symbol of name {\ttfamily mylabel} containing the address at that point
\pause
\end{itemize}
\vs
\item Directives
\begin{itemize}
\item Place a raw byte: {\ttfamily .byte 0xff}
\item Place a raw short: {\ttfamily .short 0x1234}
\item Place a raw ASCII string: {\ttfamily .ascii "Hello World!\textbackslash0"}
\item Specify a section (e.g. .text, .data, .rodata, .bss): \\ {\ttfamily .section <section-name>}
\end{itemize}
\end{itemize}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{A Note on GAS Syntax}
\begin{itemize}
\item Instruction Size Suffix
\begin{itemize}
\item x86 is backwards compatible to the original 8086
\item Inherited instructions operate on 8-bits, 16-bits, 32-bits
\item Naturally, they often have the same name...
\vs
\pause
\item GAS supports the syntax {\ttfamily <mnemonic><size>} \\ to unambiguously encode the correct instruction \\
\begin{textcode}
movb $0xff, %al movw %bx, %ax movl memAddr, %eax
incb %ah incw %ax incl %eax
\end{textcode}
\end{itemize}
\end{itemize}
\begin{center}
\begin{tabular}{c|c|c}
\textbf{Name} & \textbf{Size} & \textbf{GAS Suffix} \\
\hline \hline
byte & 8-bits & b \\
word & 16-bits & w \\
dword & 32-bits & l \\
qword & 64-bits & q \\
\end{tabular}
\end{center}
\end{frame}
\section{Basic Tools}
\begin{frame}[fragile,t]
\frametitle{Common Invocations}
\begin{itemize}
\item Assemble: {\ttfamily as prog.asm -o prog.o}
\item Link directly: {\ttfamily ld prog.o -o prog}
\item Link with libc: {\ttfamily gcc prog.o -o prog}
\item Disassemble: {\ttfamily objdump -D prog}
\item View Sections: {\ttfamily objdump -x prog}
\item View Symbols: {\ttfamily nm prog}
\item Debug Disassembly: {\ttfamily gdb prog}
\begin{itemize}
\item Step instruction: {\ttfamily si}
\item Disassembly layout: {\ttfamily layout asm}
\item Set breakpoint at symbol: {\ttfamily b \_start}
\item Set breakpoint at address: {\ttfamily b * 0x80001230}
\item View CPU registers: {\ttfamily info reg}
\item Disassemble next three instructions: {\ttfamily x/3i \$eip}
\item View five dwords of memory starting at {\ttfamily \$esp}: {\ttfamily x/5w \$esp}
\item View five bytes of memory starting at {\ttfamily 0xbffffff0}: {\ttfamily x/5b 0xbffffff0}
\end{itemize}
\end{itemize}
\end{frame}
\section{Topic 3: Flow Control}
\begin{frame}[fragile,t]
\frametitle{Modifying Flow of Execution}
\mvs
\begin{itemize}
\item With most instructions, CPU will increment {\ttfamily \%eip} by the executed instruction size to proceed to the next immediate instruction
\end{itemize}
\begin{gascode}
a_label:
nop
addl $5, %eax # %eax = %eax + 5
xorl %ecx, %ebx # %ebx = %ebx ^ %ecx
another_label:
nop
nop
\end{gascode}
\pause
\begin{itemize}
\item The unconditional {\ttfamily jmp <label>} instruction allows us to explicitly change {\ttfamily \%eip} to another address, and continue execution from there
\end{itemize}
\begin{gascode}
a_label:
nop
addl $5, %eax # %eax = %eax + 5
jmp somewhere_else # Jump to somewhere_else
another_label:
... # We just skipped over all of this
somewhere_else:
xorl %ecx, %ebx # %ebx = %ebx ^ %ecx
\end{gascode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Modifying Flow of Execution Conditionally}
\begin{itemize}
\item Certain instructions will set boolean bit flags in the {\ttfamily \%eflags} registers based on the result
\begin{itemize}
\item Implicitly, based on result of an arithmetic instruction
\item Explicitly, with {\ttfamily cmp} or {\ttfamily test} between two operands
\end{itemize}
\item Flags are the basis of flow control with conditional jumps, which \\ update {\ttfamily \%eip} to a relative offset if an {\ttfamily \%eflags} flag is set
\end{itemize}
\mvs
\begin{figure}
\centering
\includegraphics[width=\textwidth]{figures/eflags.png} \\
\vs
\includegraphics[height=0.3\paperheight]{figures/ia32-eflags.png}\let\thefootnote\relax\footnote{Intel 64 and IA-32 Architectures Software Developer’s Manual Vol. 1, A-1}
\end{figure}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Conditional Jumps}
\mvs
\begin{table}[h]\scriptsize
\begin{tabular}{l|c|c}
\textbf{Instruction} & \textbf{\%eflags Condition} & \textbf{Description} \\
\hline
{\ttfamily jmp <label>} & - & Unconditional Jump \\
\textbf{Unsigned Conditional Jumps} & & \\
\hline
{\ttfamily ja / jnbe <label>} & (CF or ZF) = 0 & Above / Not below or equal \\
{\ttfamily jae / jnb <label>} & CF = 0 & Above or equal / Not below \\
{\ttfamily jb / jnae <label>} & (CF or ZF) = 1 & Below / Not above or equal \\
{\ttfamily jc <label>} & CF = 1 & Carry \\
{\ttfamily je/jz <label>} & ZF = 1 & Equal / Zero \\
{\ttfamily jnc <label>} & CF = 0 & Not Carry \\
{\ttfamily jne/jnz <label>} & ZF = 0 & Not Equal / Not Zero \\
\textbf{Signed Conditional Jumps} & & \\
\hline
{\ttfamily jg / jnle <label>} & ((SF xor OF) or ZF) = 0 & Greater / Not Less or Equal\\
{\ttfamily jge / jnl <label>} & (SF xor OF) = 0 & Greater or Equal / Not Less\\
{\ttfamily jl / jnge <label>} & (SF xor OF) = 1 & Less / Not Greater or Equal \\
{\ttfamily jle / jng <label>} & ((SF xor OF) or ZF) = 1 & Less or Equal / Not Greater \\
{\ttfamily jno <label>} & OF = 0 & Not overflow \\
{\ttfamily jns <label>} & SF = 0 & Not sign (non-negative) \\
{\ttfamily jo <label>} & OF = 1 & Overflow \\
{\ttfamily js <label>} & SF = 1 & Sign (negative) \\
\end{tabular}
\end{table} \let\thefootnote\relax\footnote{Intel 64 and IA-32 Architectures Software Developer’s Manual Vol. 1, 7-23}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Example Conditional Jumps (example-cond-jmp.S)}
\mvs
\begin{gascode}
.section .text
# cmpl %oper1, %oper2
# updates flags based on result of %oper2 - %oper1
cmpl %eax, %ecx
cmpl $0xFF, %eax
# conditional jumps
je label_foo # jump if %oper2 == %oper1
jg label_bar # jump if %oper2 > %oper1
jl label_xyz # jump if %oper2 < %oper1
# test %oper1, %oper2
# updates flags based on result of %oper2 & %oper1
testl %eax, %ecx
testl $0x1F, %eax
# arithmetic
# updates flags based on result
addl %eax, %ebx
incl %eax
decl %ebx
\end{gascode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Example Conditional Jumps (example-cond-jmp.S) Continued}
\mvs
\begin{gascode}
# labels are just symbols containing an address to make
# it easy to specify addresses
label1:
label2:
movl $0, %eax # %eax = 0
incl %eax # %eax++ ; ZF set to 0!
jz label1 # Jump if ZF = 1 (not taken)
jnz label3 # Jump if ZF = 0 (taken)
decl %eax # I won't be executed
label3:
nop
nop # Execution will fall
label4: # through label4
jmp label1 # Jump back to label1
# Loops
movl $10, %eax
loop:
nop
decl %eax
jnz loop
# Direct Comparison
cmpl $0x05, %eax
je label_foo # Jump to label_foo if %eax == 5
\end{gascode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Example Conditional Jumps (example-cond-jmp.S) Disassembly}
\mvs
\begin{customobjdumpcode}
$ as example-cond-jmp.S -o example-cond-jmp.o
$ ld example-cond-jmp.o -o example-cond-jmp
$ objdump -D example-cond-jmp
Disassembly of section .text:
08048054 <_start>:
8048054: 39 c1 cmp %eax,%ecx
8048056: 3d ff 00 00 00 cmp $0xff,%eax
804805b: 74 2c je 8048089 <label_foo>
804805d: 7f 2b jg 804808a <label_bar>
804805f: 7c 2a jl 804808b <label_xyz>
8048061: 85 c1 test %eax,%ecx
8048063: a9 1f 00 00 00 test $0x1f,%eax
8048068: 01 c3 add %eax,%ebx
804806a: 40 inc %eax
804806b: 4b dec %ebx
...
\end{customobjdumpcode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Example Conditional Jumps (example-cond-jmp.S) Disassembly}
\mvs
\begin{customobjdumpcode}
0804806c <label1>:
804806c: b8 00 00 00 00 mov $0x0,%eax
8048071: 40 inc %eax
8048072: 74 f8 je 804806c <label1>
8048074: 75 01 jne 8048077 <label3>
8048076: 48 dec %eax
08048077 <label3>:
8048077: 90 nop
8048078: 90 nop
08048079 <label4>:
8048079: eb f1 jmp 804806c <label1>
804807b: b8 0a 00 00 00 mov $0xa,%eax
08048080 <loop>:
8048080: 90 nop
8048081: 48 dec %eax
8048082: 75 fc jne 8048080 <loop>
8048084: 83 f8 05 cmp $0x5,%eax
8048087: 74 00 je 8048089 <label_foo>
...
\end{customobjdumpcode}
\end{frame}
\section{Program Example: Iterative Fibonacci}
\begin{frame}[fragile,t]
\frametitle{Iterative Fibonacci (fibonacci.S)}
\mvs
\begin{gascode}
.section .text
.global main
main:
movl $0, %ecx # f_n-2 = 0
movl $1, %ebx # f_n-1 = 1
movl $1, %eax # f_n = 1
movl $12, %edi # Number of integers to compute
fib_loop:
# Print %eax
call myprint
movl %ebx, %ecx # f_n-1 -> f_n-2
movl %eax, %ebx # f_n -> f_n-1
addl %ecx, %eax # New f_n = Old f_n + f_n-2
# Decrement %edi
decl %edi
jnz fib_loop
ret
myprint:
...
\end{gascode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Iterative Fibonacci (fibonacci.S) Output}
\mvs
\begin{textcode}
$ as fibonacci.S -o fibonacci.o
$ gcc fibonacci.o -o fibonacci # (Easy way to link with libc,
# more on this, later)
$ ./fibonacci
1
2
3
5
8
13
21
34
55
89
144
233
$
\end{textcode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Iterative Fibonacci (fibonacci.S) Disassembly}
\mvs
\begin{customobjdumpcode}
$ objdump -D fibonacci
Disassembly of section .text:
...
080483e4 <main>:
80483e4: b9 00 00 00 00 mov $0x0,%ecx
80483e9: bb 01 00 00 00 mov $0x1,%ebx
80483ee: b8 01 00 00 00 mov $0x1,%eax
80483f3: bf 0c 00 00 00 mov $0xc,%edi
080483f8 <fib_loop>:
80483f8: e8 0a 00 00 00 call 8048407 <myprint>
80483fd: 89 d9 mov %ebx,%ecx
80483ff: 89 c3 mov %eax,%ebx
8048401: 01 c8 add %ecx,%eax
8048403: 4f dec %edi
8048404: 75 f2 jne 80483f8 <fib_loop>
8048406: c3 ret
...
\end{customobjdumpcode}
\begin{itemize}
\item Main code is only 35 bytes!
\item Can easily be cut down to 28 bytes by optimizing the clears
\end{itemize}
\end{frame}
\section{Topic 4: Program Memory}
\begin{frame}[fragile,t]
\frametitle{Static Allocation in C}
\begin{itemize}
\item From C, we're used to uninitialized and initialized static memory allocations
\end{itemize}
\vs
\begin{ccode}
/* Uninitialized static allocation, read-write */
char buff[1024];
/* Initialized static allocations, read-write */
int foo = 5;
char str[] = "Hello World";
\end{ccode}
\pause
\begin{ccode}
/* Trickier example: */
char *p = "Hello World";
/* char *p is an initialized static allocation, read-write */
/* "Hello World" is initialized static allocation, READ-ONLY */
int main(void) {
return 0;
}
\end{ccode}
\end{frame}
\begin{frame}[fragile,t]
\frametitle{Static Allocation in Assembly}
\begin{itemize}
\item Responsible for manually specifying the contents of memory
\item Description is stored in a binary format like ELF, \\ in terms of sections, r/w/x permissions, and sizes
\item OS is responsible for setting up memory as described in ELF binary in {\ttfamily execve()}
\pause
\vs\vs\vs
\item {\ttfamily section \textbf{.text}}: \textbf{read-only executable} program instructions
\item {\ttfamily section \textbf{.rodata}}: initialized statically allocated \textbf{read-only data}