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Bump FIRRTL to 1.5.6; Update dependencies; Add passes to accomodate FIRRTL changes #21

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merged 1 commit into from
Jan 5, 2024

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@haoozi haoozi commented Dec 15, 2023

Bump up FIRRTL to 1.5.6, the last SFC (Scala FIRRTL Compiler) before MFC (MLIR FIRRTL Compiler).
Bump up json4s to satisfy FIRRTL 1.5.6 dependency.
Bump up Scala to satisfy FIRRTL 1.5.6 dependency.
Bump up sbt for more recent JDK support.
Add a new pass to remove formal and coverage IR nodes.
Invoke firrtl.passes.memlib.VerilogMemDelays to align the behavior of MemRead.
Invoke firrtl.transforms.formal.ConvertAsserts to transform assertions (Verification IR nodes with op == Formal.Assert) into combination of Print and Stop statements.
Fix expected result of ReplaceRsvdKeywords pass test.

Compilation passed under JDK11 and JDK 17, also on JDK21 if further bump sbt to 1.9.0
Correctly generates header file for RocketChip (Both Chisel 3.5.6 and 3.4.3), simulation (dhrystone) passed.

@haoozi haoozi requested a review from sbeamer December 15, 2023 04:30
@sbeamer sbeamer merged commit 18dd3d5 into ucsc-vama:master Jan 5, 2024
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2 participants