zynq7000

Here are 2 public repositories matching this topic...

Senior thesis completed for Harvard University S.B. degree in EE (as a part of senior design project course ES100)

fpga dsp zynq7000

lvds - transceiver for zynq7000 with data rate of 1200Mbit/s

monitor delay tab transceiver high-speed verilog-hdl zynq7000 lvds link-layer

Add a description, image, and links to the zynq7000 topic page so that developers can more easily learn about it.

To associate your repository with the zynq7000 topic, visit your repo's landing page and select "manage topics."