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cache-controller

Here are 2 public repositories matching this topic...

omega-rg / Cache-Controller

Two Level Cache Controller implementation in Verilog HDL

fpga verilog cache-controller direct-mapping replacement-policies memory-handling

Updated Jul 9, 2020
Verilog

nihar-sheth / cache-controller-project

A cache controller implementation in VHDL for the demonstration of SRAM and SDRAM.

memory vhdl sram sdram cache-controller

Updated May 6, 2022
C

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