From 615715fd22f41df61919985cbe4a2df1c4a17b4c Mon Sep 17 00:00:00 2001 From: Bojan Rosko Date: Wed, 26 Feb 2025 16:24:27 +0000 Subject: [PATCH] changes --- tt_metal/fabric/control_plane.cpp | 4 ++-- tt_metal/tools/memset.cpp | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tt_metal/fabric/control_plane.cpp b/tt_metal/fabric/control_plane.cpp index 0e0118a8bb7..8604bf9f4b5 100644 --- a/tt_metal/fabric/control_plane.cpp +++ b/tt_metal/fabric/control_plane.cpp @@ -317,7 +317,7 @@ void ControlPlane::convert_fabric_routing_table_to_chip_routing_table() { const auto& physical_chip_id = this->logical_mesh_chip_id_to_physical_chip_id_mapping_[mesh_id][src_chip_id]; std::uint32_t num_ports_per_chip = - tt::Cluster::instance().get_soc_desc(physical_chip_id).ethernet_cores.size(); + tt::Cluster::instance().get_soc_desc(physical_chip_id).get_cores(CoreType::ETH).size(); this->intra_mesh_routing_tables_[mesh_id][src_chip_id].resize( num_ports_per_chip); // contains more entries than needed, this size is for all eth channels on chip for (int i = 0; i < num_ports_per_chip; i++) { @@ -368,7 +368,7 @@ void ControlPlane::convert_fabric_routing_table_to_chip_routing_table() { const auto& physical_chip_id = this->logical_mesh_chip_id_to_physical_chip_id_mapping_[src_mesh_id][src_chip_id]; std::uint32_t num_ports_per_chip = - tt::Cluster::instance().get_soc_desc(physical_chip_id).ethernet_cores.size(); + tt::Cluster::instance().get_soc_desc(physical_chip_id).get_cores(CoreType::ETH).size(); this->inter_mesh_routing_tables_[src_mesh_id][src_chip_id].resize( num_ports_per_chip); // contains more entries than needed for (int i = 0; i < num_ports_per_chip; i++) { diff --git a/tt_metal/tools/memset.cpp b/tt_metal/tools/memset.cpp index cb0f5c12d4f..a6008b3d8a0 100644 --- a/tt_metal/tools/memset.cpp +++ b/tt_metal/tools/memset.cpp @@ -21,7 +21,7 @@ void memset_dram(std::vector mem_vec, uint32_t chip_id, uint32_t start const metal_SocDescriptor& sdesc = tt::Cluster::instance().get_soc_desc(chip_id); for (uint32_t dram_view = 0; dram_view < sdesc.get_num_dram_views(); dram_view++) { for (uint32_t dram_src_subchannel_id = 0; - dram_src_subchannel_id < sdesc.dram_cores.at(sdesc.get_channel_for_dram_view(dram_view)).size(); + dram_src_subchannel_id < sdesc.get_dram_cores().at(sdesc.get_channel_for_dram_view(dram_view)).size(); dram_src_subchannel_id++) { tt::Cluster::instance().write_dram_vec( mem_vec, tt_target_dram{chip_id, dram_view, dram_src_subchannel_id}, start_addr);