From 2349baebd7fa3b9b89d073e707159bb4f77feffd Mon Sep 17 00:00:00 2001
From: Hirosh Dabui <hirosh@dabui.de>
Date: Sat, 4 Jan 2025 21:12:28 +0100
Subject: [PATCH] update of README.md

---
 README.md | 33 +++++++++++++++++----------------
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/README.md b/README.md
index da2f7b0..c350e6a 100644
--- a/README.md
+++ b/README.md
@@ -2,8 +2,8 @@
 
 You'll own nothing and be happy!
 ================================
-I am a professional embedded systems engineer. I started in 2021 with logic
-design, motivated to learn. My goal was to implement a RISC-V Linux SoC because I love
+I started in 2021 with logic design, motivated to learn.
+My goal was to implement a RISC-V Linux SoC because I love
 Linux. Now, that goal has come true. In the future, I aim to work on advanced
 designs and improvements, step by step.
 
@@ -17,21 +17,22 @@ designs and improvements, step by step.
  </picture>
 </a>
 
-**RISC-V ASIC/FPGA uLinux/MMU Linux/XV6 SoCs:**
-===========================================
+**RISC-V uLinux/Linux/XV6 SoCs**
+================================
 Explore the **KianV SV32 (MMU) RV32IMA Zicntr Zicsr Zifencei SSTC Linux/XV6
-SoC**, featuring full virtual memory support and compatibility with Linux and
-XV6. Whether you're into RISC-V development or SoC design, this project is
-worth checking out. Find it here:
-
-👉 [KianV SV32 RV32IMA Zicntr Zicsr Zifencei SSTC](https://github.com/splinedrive/kianRiscV/tree/master/linux_socs/kianv_mc_rv32ima_sv32)
-
-🚀 **Discover the KianV RISC-V uLinux SoC!** 🚀
-Dive into my RISC-V SoC journey:
-- 🖥️ Explore the **FPGA implementation details**: [KianV FPGA SoC](https://github.com/splinedrive/kianRiscV/blob/master/linux_socs/kianv_harris_mcycle_edition/README.md)
-- 🏭 Check out my **uLinux ASIC created with TinyTapeout**: [KianV ASIC Designs](https://github.com/splinedrive/kianRiscV/tree/master/asic)
-From FPGA to ASIC, it's all here!
-<img src="ulinux_asic_tt05.jpg" alt="Kianv uLinux ASIC Soc TT05"/>
+SoC**, a robust RISC-V design with full virtual memory support, seamlessly
+running Linux and XV6. Whether you're delving into RISC-V development or
+advancing SoC design, this project is a must-see.
+[KianV SV32 RV32IMA SoC](https://github.com/splinedrive/kianRiscV/tree/master/linux_socs/kianv_mc_rv32ima_sv32)
+
+Discover the **KianV RISC-V uLinux SoC**, designed for seamless integration and performance. Perfect for FPGA-based Linux systems.
+[KianV RV32IMA uLinux SoC](https://github.com/splinedrive/kianRiscV/blob/master/linux_socs/kianv_harris_mcycle_edition/README.md)
+
+**Linux ASIC Designs**
+======================
+Dive into my **uLinux-ready ASIC designs**, optimized for RISC-V.
+[KianV ASIC Designs](https://github.com/splinedrive/kianRiscV/tree/master/asic)
+<img src="ulinux_asic_tt05.jpg" alt="Kianv uLinux ASIC Soc TT05" />
 
 ```
  __  __ __               ___ ___ _____   __