fm.qsf

# Copyright (C) 1991-2008 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		fm_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name TOP_LEVEL_ENTITY fm2
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 8.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:30:23  JANUARY 26, 2014"
set_global_assignment -name LAST_QUARTUS_VERSION 8.1
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 672
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name VHDL_FILE fullMult2.vhd
set_global_assignment -name VHDL_FILE fullAdd.vhd
set_global_assignment -name VHDL_FILE fullMult.vhd
set_global_assignment -name VHDL_FILE halfAdd.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE fm4.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE fm32.vwf
set_global_assignment -name VHDL_FILE shortMult.vhd
set_global_assignment -name VHDL_FILE shortMult2.vhd
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE fm32.vwf
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 95%
set_global_assignment -name POWER_USE_INPUT_FILES ON
set_global_assignment -name POWER_USE_PVA OFF
set_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 95%
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE AREA
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top