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PCIe example does not work. #1
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Perhaps U could try this pre-built bitstream first, It is verified on Tang Mega 138K, |
Thanks for providing the pre-build bitstream. I've modified the physical constraint and comment out Here is the modified physical constraint file I've confirmed to work in my environment. But there are another problem about the DMA transfer demo. The demo hangs after around 250 transfer when I run the I'll try the pre-build bitstream and check that the demo runs well. |
Thanks for UR physical constraint file, I will verify it. |
The number shown by this line of I confirmed that my board was recognized as a PCIe device with the pre-build bitstream. I had another TangMega138K user check whether the DMA demo works with both the bitstream I built and the pre-built bitstream. |
Hi. I have too issues with this example.
What would you recommend to check? In gowin ide I see timings error: div_clk is 100Mhz, but timing analysis say it can work only at ~82Mhz. Do you have same and design works? |
Here is reply:
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@ciniml May I ask if it is possible to upload the complete project? program to SRAM and reboot the PCIe host PC (warm boot),the only work. |
Hi.
I'm trying to run the PCIe demo, the bitstream in https://github.com/sipeed/TangMega-138KPro-example/blob/main/pcie/PCIe2.0_dma_demo/pcie_dma_demo.gar , but the board is not recognized as PCIe device at all.
I've tried both
but nothing worked for me.
After some investigation, I've found that the physical constraint in the archived project seems for GOWIN PCIe DVK, not for Tang Mega 138K.
So, could you provide the prebuilt bitstream and correct physical constraint to check my board works correctly?
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