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gui.py This module provides the graphical user interface (GUI) for the Verilog module generator. It utilizes the Tkinter library to create an interactive window where users can specify parameters for generating Verilog code. Key components include: Main Application Window: The primary Tkinter window where users enter details for Verilog module generation. It includes fields for specifying the file name, clock type, reset type, and ports. Dropdown Menus: Options for selecting the clock type (posedge or negedge), reset type (rst or rstn), and machine type (Mealy or Moore). Port Entries: Entry fields for defining input ports, output ports, wire ports, and register ports, formatted as name:size. State Machine Encoding: Radio buttons allowing users to choose between automatic and manual state machine encoding. Create Verilog Module Button: A button that triggers the Verilog module creation process. It collects input from various fields and passes it to the create_verilog_module function for generating the Verilog code. Custom Dialogs: Includes custom dialogs for selecting encoding styles and managing state machine outputs. These dialogs use dropdowns and input fields to collect user preferences and parameters. State Transition Handling: Features prompts for defining state transitions and their conditions, ensuring that all conditions are valid Verilog expressions and providing a visual representation of the state machine using Graphviz. This module integrates various GUI elements to facilitate the creation of Verilog modules, making it user-friendly and efficient for users to design and generate their Verilog code.
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