elfloader: unconditionally set PTE shareability to

Inner Shareable.

We noticed a lot of instability with the Jetson Orin port when running
in UP + HYP mode. Setting the shareability to Inner Shareable (IS)
unconditionally is the fix, however, we're unable to find the exact
line in Arm documentation that explains why this is the case.

Potential theory: there are other agents on the Jetson Orin that
require cache coherency and live in the IS domain. Being more
permissive with memory resolves the prefetching and translation
faults we were getting.

For reference, Arm states "Arm expects operating systems to mark the
majority of DRAM memory as Normal Write-back cacheable, Inner
shareable" (102376_0200_01_en version 2).

Signed-off-by: Andy Bui <andy.bui@nio.io>

elfloader-tool/src/arch-arm/64/mmu.c

@@ -156,9 +156,7 @@ static inline uint64_t make_pte(paddr_t pa, uint8_t mem_attr_index)
     return xn
            | mask_pa(pa)
            | BIT(10) /* access flag */
-#if CONFIG_MAX_NUM_NODES > 1
            | (INNER_SHAREABLE << 8)
-#endif
            | (mem_attr_index << 2)
            | BIT(0); /* valid page/block mapping */
 }