Add feature Smcdeleg #1913
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Add feature Smcdeleg #1913
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missing proxy csr and check for csr privilege in sscsring_reg_csr_t since mireg uses the same class. Add stateen checks for scontext/hcontext Fix for issue: 1893
Ensuring No negation on -2^63(int64_t) is performed during mulh/mulhsu Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com> Update riscv/arith.h Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com>
Pointer masking needs to be reapplied after computing the address of the tail of a misaligned access in case there's a carry-out into the MSBs. Resolves riscv-software-src#1895
…d besti for shamt condition
…sing vector CSRs" This reverts commit a17842c.
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@JJ-Gaisler The commit history looks messed up; several unrelated commits are included in the changelog. @bcstrongx could I ask you to review this PR at some point (ignoring the aforementioned unrelated commits), since you authored the spec? |
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This PR is based on the following PR : #1896
Please see attached test case, the test checks the exception logic related to the extension and that proxy counters work as intended.
spike -m0x80000000:0x10000000,0x20000000:0x1000,0x4000:0x1000,0xB000:0x1000 --isa rv64gh_svinval_zba_zbb_zbc_zbs_zfh_zfa_zbkb_zbkx_zicsr_zifencei_sscofpmf_smstateen_smepmp_zicbom_zicntr_zihpm_svadu_sstc_zicond_smcdeleg_smcsrind_sscsrind -p1 csr_test.txtcsr_test.txt