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Add SPICE entry for VCresitor #1016

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merged 2 commits into from
Oct 23, 2024
Merged

Add SPICE entry for VCresitor #1016

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0904eb3
Add SPICE entry for VCRES; make it ADMS-independent
ra3xdh Oct 23, 2024
bfac9ca
Move VCRES to nonlinear devices
ra3xdh Oct 23, 2024
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34 changes: 33 additions & 1 deletion qucs/components/vcresistor.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16,13 +16,14 @@
***************************************************************************/

#include "vcresistor.h"
#include "node.h"
#include "extsimkernels/spicecompat.h"


vcresistor::vcresistor()
{
Description = QObject::tr("voltage controlled resistor");
Simulator = spicecompat::simQucsator;
Simulator = spicecompat::simAll;

// The resistor shape
Lines.append(new qucs::Line(5, 18, 5, -18, QPen(Qt::darkBlue,2)));
Expand Down Expand Up @@ -67,6 +68,7 @@ vcresistor::vcresistor()
ty = y2+4;
Model = "vcresistor";
Name = "VCR";
SpiceModel = "R";

Props.append(new Property("gain", "1", true,
QObject::tr("resistance gain")));
Expand All @@ -90,3 +92,33 @@ Element* vcresistor::info(QString& Name, char* &BitmapFile, bool getNewOne)
return 0;
}

QString vcresistor::netlist()
{
QString s;
QString EDD_Name = "EDD" + Name;
QString in1 = Ports.at(0)->Connection->Name;
QString in2 = Ports.at(1)->Connection->Name;
QString out1 = Ports.at(2)->Connection->Name;
QString out2 = Ports.at(3)->Connection->Name;
QString gain = getProperty("gain")->Value;
s = QString("EDD:%1 %2 %3 %4 %5 I1=\"%1.I1\" Q1=\"%1.Q1\" I2=\"%1.I2\" Q2=\"%1.Q2\"\n").arg(EDD_Name,in1,in2,out1,out2);
s += QString("Eqn:Eqn%1I1 %1.I1=\"0\" Export=\"no\"\n").arg(EDD_Name);
s += QString("Eqn:Eqn%1Q1 %1.Q1=\"0\" Export=\"no\"\n").arg(EDD_Name);
s += QString("Eqn:Eqn%1I2 %1.I2=\"V2/(1e-20+abs(V1*(%2)))\" Export=\"no\"\n").arg(EDD_Name,gain);
s += QString("Eqn:Eqn%1Q2 %1.Q2=\"0\" Export=\"no\"\n").arg(EDD_Name);
return s;
}

QString vcresistor::spice_netlist(bool isXyce)
{
Q_UNUSED(isXyce);
QString s;
QString gain = spicecompat::normalize_value(getProperty("gain")->Value);
QString in1 = spicecompat::normalize_node_name(Ports.at(0)->Connection->Name);
QString in2 = spicecompat::normalize_node_name(Ports.at(1)->Connection->Name);
QString out1 = spicecompat::normalize_node_name(Ports.at(2)->Connection->Name);
QString out2 = spicecompat::normalize_node_name(Ports.at(3)->Connection->Name);
s = QString("R%1 %2 %3 R='1e-15+abs(V(%4,%5)*(%6))'\n").arg(Name, out1, out2, in1, in2, gain);
return s;
}

3 changes: 3 additions & 0 deletions qucs/components/vcresistor.h
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Expand Up @@ -27,6 +27,9 @@ class vcresistor : public Component {
~vcresistor();
Component* newOne();
static Element* info(QString&, char* &, bool getNewOne=false);
protected:
QString netlist();
QString spice_netlist(bool isXyce);
};

#endif
2 changes: 1 addition & 1 deletion qucs/module.cpp
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Expand Up @@ -422,6 +422,7 @@ void Module::registerModules (void) {

REGISTER_NONLINEAR_1 (OpAmp);
REGISTER_NONLINEAR_1 (EqnDefined);
REGISTER_NONLINEAR_1 (vcresistor);

//if (QucsSettings.DefaultSimulator == spicecompat::simQucsator) {
REGISTER_NONLINEAR_1 (Diac);
Expand Down Expand Up @@ -455,7 +456,6 @@ void Module::registerModules (void) {
REGISTER_VERILOGA_1 (photodiode);
REGISTER_VERILOGA_1 (phototransistor);
REGISTER_VERILOGA_1 (nigbt);
REGISTER_VERILOGA_1 (vcresistor);
//}

// digital components
Expand Down
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