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I am using QBox to run my program on a virtual ARM Cortex-A53 CPU. My program contains the following instruction:
MRS X0, S3_1_C15_C1_0
When this instruction is executed, the program crashes, and the CPU jumps to address 0x200. I have confirmed that the virtual CPU supports both EL2 and EL3.
Questions:
Does QBox fully support the MRS X0, S3_1_C15_C1_0 instruction?
Are there any special configurations or prerequisites required to enable this instruction in QBox?
Any insights or guidance on this issue would be appreciated.
The text was updated successfully, but these errors were encountered:
I am using QBox to run my program on a virtual ARM Cortex-A53 CPU. My program contains the following instruction:
MRS X0, S3_1_C15_C1_0
When this instruction is executed, the program crashes, and the CPU jumps to address 0x200. I have confirmed that the virtual CPU supports both EL2 and EL3.
Questions:
Does QBox fully support the MRS X0, S3_1_C15_C1_0 instruction?
Are there any special configurations or prerequisites required to enable this instruction in QBox?
Any insights or guidance on this issue would be appreciated.
The text was updated successfully, but these errors were encountered: