Added gvsoc script to handle verify step

sw/blas/axpy/src/axpy.h

@@ -43,24 +43,27 @@ static inline void axpy_opt(uint32_t n, double a, double *x, double *y,
     int frac = n / snrt_cluster_compute_core_num();
     int offset = core_idx;
 
-    snrt_ssr_loop_1d(SNRT_SSR_DM_ALL, frac,
-                     snrt_cluster_compute_core_num() * sizeof(double));
-
-    snrt_ssr_read(SNRT_SSR_DM0, SNRT_SSR_1D, x + offset);
-    snrt_ssr_read(SNRT_SSR_DM1, SNRT_SSR_1D, y + offset);
-    snrt_ssr_write(SNRT_SSR_DM2, SNRT_SSR_1D, z + offset);
-
-    snrt_ssr_enable();
-
-    asm volatile(
-        "frep.o %[n_frep], 1, 0, 0 \n"
-        "fmadd.d ft2, %[a], ft0, ft1\n"
-        :
-        : [ n_frep ] "r"(frac - 1), [ a ] "f"(a)
-        : "ft0", "ft1", "ft2", "memory");
-
-    snrt_fpu_fence();
-    snrt_ssr_disable();
+    for (int i=0; i<1; i++)
+    {
+        snrt_ssr_loop_1d(SNRT_SSR_DM_ALL, frac,
+                        snrt_cluster_compute_core_num() * sizeof(double));
+
+        snrt_ssr_read(SNRT_SSR_DM0, SNRT_SSR_1D, x + offset);
+        snrt_ssr_read(SNRT_SSR_DM1, SNRT_SSR_1D, y + offset);
+        snrt_ssr_write(SNRT_SSR_DM2, SNRT_SSR_1D, z + offset);
+
+        snrt_ssr_enable();
+
+        asm volatile(
+            "frep.o %[n_frep], 1, 0, 0 \n"
+            "fmadd.d ft2, %[a], ft0, ft1\n"
+            :
+            : [ n_frep ] "r"(frac - 1), [ a ] "f"(a)
+            : "ft0", "ft1", "ft2", "memory");
+
+        snrt_fpu_fence();
+        snrt_ssr_disable();
+    }
 }
 
 static inline void axpy_job(axpy_args_t *args) {
@@ -113,6 +116,8 @@ static inline void axpy_job(axpy_args_t *args) {
     iterations = args->n_tiles;
     if (DOUBLE_BUFFER) iterations += 2;
 
+    uint32_t cycles;
+
     // Iterate over all tiles
     for (i = 0; i < iterations; i++) {
         if (snrt_is_dm_core()) {
@@ -167,7 +172,7 @@ static inline void axpy_job(axpy_args_t *args) {
             if (!DOUBLE_BUFFER) snrt_cluster_hw_barrier();
 
             if (!DOUBLE_BUFFER || (i > 0 && i < (args->n_tiles + 1))) {
-                snrt_mcycle();
+                uint32_t start_cycle = snrt_mcycle();
 
                 // Compute tile and buffer indices
                 i_compute = DOUBLE_BUFFER ? i - 1 : i;
@@ -178,7 +183,9 @@ static inline void axpy_job(axpy_args_t *args) {
                 fp(frac, args->a, local_x[buff_idx], local_y[buff_idx],
                    local_z[buff_idx]);
 
-                snrt_mcycle();
+                uint32_t end_cycle = snrt_mcycle();
+
+                cycles = end_cycle - start_cycle;
             }
 
             // Additional barrier required when not double buffering
@@ -188,4 +195,7 @@ static inline void axpy_job(axpy_args_t *args) {
         // Synchronize cores after every iteration
         snrt_cluster_hw_barrier();
     }
+
+
+    printf("Cycles %d\n", cycles);
 }

sw/tests/simple.c

@@ -2,4 +2,19 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-int main() { return 0; }
+#include "snrt.h"
+
+uint32_t buffer[32];
+
+int main() {
+    if (snrt_global_core_idx() != 8) return 0;  // only DMA core
+    uint32_t buffer_src[32], buffer_dst[32];
+    for (int i = 0; i < 100; i++)
+          {
+              snrt_mcycle();
+              snrt_dma_start_1d_wideptr(buffer_src, buffer_dst, 1);
+              snrt_dma_wait_all();
+              snrt_mcycle();
+          }
+    return 0;
+}

target/common/gvsoc.mk

@@ -11,7 +11,7 @@ $(BIN_DIR)/$(TARGET).gvsoc:
 	@echo '    GVSOC_TARGET=snitch' >> $@
 	@echo 'fi' >> $@
 	@echo 'gvsoc --target=$${GVSOC_TARGET} --binary $$binary \
-	   --control-script=$${path}/${GVSOC_BUILDDIR}/pulp/pulp/snitch/utils/gvcontrol.py $$2 run' >> $@
+	   --control-script=$${path}/../../util/sim/gvsoc_control.py $$2 run' >> $@
 	@chmod +x $@
 
 .PHONY: clean-gvsoc

util/sim/gvsoc_control.py

@@ -0,0 +1,57 @@
+#!/usr/bin/env python3
+
+import time
+import gvsoc.gvsoc_control
+import threading
+import socket
+import struct
+
+def parse_args(parser, args):
+    parser.add_argument('--ipc', type=str,
+            help="IPC socket files")
+
+def handle_commands(gv, tx_fd, rx_fd):
+
+    axi = gvsoc.gvsoc_control.Router(gv, path='**/chip/soc/narrow_axi')
+
+    gv.run()
+
+    while True:
+        data = rx_fd.read(8)
+        if not data:
+            return
+
+        command = struct.unpack('=Q', data)[0]
+
+        if command == 2:
+            data = rx_fd.read(16)
+            addr, mask32, exp32 = struct.unpack('=QLL', data)
+
+            retval = gv.join()
+            data = struct.pack('=L', retval)
+            tx_fd.write(data)
+
+        elif command == 0:
+            data = rx_fd.read(16)
+            addr, length = struct.unpack('=QQ', data)
+            data = axi.mem_read(addr, length)
+            tx_fd.write(data)
+
+        elif command == 1:
+            data = rx_fd.read(16)
+            addr, length = struct.unpack('=QQ', data)
+            data = rx_fd.read(length)
+            axi.mem_write(addr, data)
+            data = struct.pack('=L', 0)
+            tx_fd.write(data)
+            pass
+
+def target_control(args, gv=None):
+    rx, tx = args.ipc.split(',')
+
+    rx_fd = open(rx, 'rb', buffering=0)
+    tx_fd = open(tx, 'wb', buffering=0)
+
+    handle_commands(gv, tx_fd, rx_fd)
+
+    return 0