From 2e2b98a25027f2c6b6955a5cd83869dcfc4908c8 Mon Sep 17 00:00:00 2001 From: Francesco Conti Date: Fri, 25 Oct 2024 10:26:08 +0200 Subject: [PATCH] Add tiny entry in README + small fix to make checkout-synthesis rule --- Makefile | 2 +- README.md | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index b86021c9..10b6dbd7 100644 --- a/Makefile +++ b/Makefile @@ -36,7 +36,7 @@ checkout: $(PULPISSIMO_UTILS)/bender $(PULPISSIMO_UTILS)/bender checkout .PHONY: checkout-synthesis -checkout-synthesis: +checkout-synthesis: $(PULPISSIMO_UTILS)/bender git clone --recursive git@iis-git.ee.ethz.ch:pulp-restricted/pulpissimo-synthesis target/synthesis $(PULPISSIMO_UTILS)/bender update diff --git a/README.md b/README.md index 09ac3018..2ddb1d81 100644 --- a/README.md +++ b/README.md @@ -246,6 +246,13 @@ If you encounter this bug use the following temporary workaround instead to buil VP_WORKAROUND_NONNULL_BUG=yes make build-pulp-sdk ``` +### Non-free synthesis setup +If you have access to the non-free synthesis setup, you can download requirements +with the command +```bash +make checkout-synthesis +``` + ### Building the RTL simulation platform Note you need Questasim or Xcelium to do an RTL simulation of PULPissimo (verilator support planned, but not finished). Intel Modelsim for Intel FPGAs