From 568a243ebc30a35fab5fc84cff203fcdec142830 Mon Sep 17 00:00:00 2001 From: SatoMew Date: Thu, 30 Jan 2025 11:55:04 +0000 Subject: [PATCH 1/3] Resolve GBC vs. CGB mismash --- constants/hardware_constants.asm | 4 ++-- engine/gfx/palettes.asm | 16 ++++++++-------- home/start.asm | 8 ++++---- ram/wram.asm | 3 ++- 4 files changed, 16 insertions(+), 15 deletions(-) diff --git a/constants/hardware_constants.asm b/constants/hardware_constants.asm index 005a693457..ab684f8821 100644 --- a/constants/hardware_constants.asm +++ b/constants/hardware_constants.asm @@ -1,6 +1,6 @@ -; From http://nocash.emubase.de/pandocs.htm. +; From https://problemkaputt.de/pandocs.htm -DEF GBC EQU $11 +DEF CGB EQU $11 ; MBC1 DEF MBC1SRamEnable EQU $0000 diff --git a/engine/gfx/palettes.asm b/engine/gfx/palettes.asm index 0520207935..f69eeba92f 100644 --- a/engine/gfx/palettes.asm +++ b/engine/gfx/palettes.asm @@ -396,11 +396,11 @@ LoadSGB: ret nc ld a, 1 ld [wOnSGB], a - ld a, [wGBC] + ld a, [wOnCGB] and a - jr z, .notGBC + jr z, .notCGB ret -.notGBC +.notCGB di call PrepareSuperNintendoVRAMTransfer ei @@ -563,21 +563,21 @@ Wait7000: ret SendSGBPackets: - ld a, [wGBC] + ld a, [wOnCGB] and a - jr z, .notGBC + jr z, .notCGB push de - call InitGBCPalettes + call InitCGBPalettes pop hl call EmptyFunc3 ret -.notGBC +.notCGB push de call SendSGBPacket pop hl jp SendSGBPacket -InitGBCPalettes: +InitCGBPalettes: ld a, $80 ; index 0 with auto-increment ldh [rBGPI], a inc hl diff --git a/home/start.asm b/home/start.asm index 764f946827..5e301da242 100644 --- a/home/start.asm +++ b/home/start.asm @@ -1,10 +1,10 @@ _Start:: - cp GBC - jr z, .gbc + cp CGB + jr z, .cgb xor a jr .ok -.gbc +.cgb ld a, FALSE .ok - ld [wGBC], a + ld [wOnCGB], a jp Init diff --git a/ram/wram.asm b/ram/wram.asm index aa36c188d3..e7d35f960d 100644 --- a/ram/wram.asm +++ b/ram/wram.asm @@ -1029,7 +1029,8 @@ wScriptedNPCWalkCounter:: db ds 1 -wGBC:: db +; always 0 since full CGB support was not implemented +wOnCGB:: db ; if running on SGB, it's 1, else it's 0 wOnSGB:: db From b693cad0498f5013d04c20bc2037de10762978fb Mon Sep 17 00:00:00 2001 From: SatoMew Date: Thu, 30 Jan 2025 15:15:58 +0000 Subject: [PATCH 2/3] Update to modern Pan Docs reference --- constants/hardware_constants.asm | 177 +++++++++++++++---------------- 1 file changed, 88 insertions(+), 89 deletions(-) diff --git a/constants/hardware_constants.asm b/constants/hardware_constants.asm index ab684f8821..644d9be841 100644 --- a/constants/hardware_constants.asm +++ b/constants/hardware_constants.asm @@ -1,5 +1,3 @@ -; From https://problemkaputt.de/pandocs.htm - DEF CGB EQU $11 ; MBC1 @@ -27,60 +25,61 @@ DEF START_TRANSFER_EXTERNAL_CLOCK EQU $80 DEF START_TRANSFER_INTERNAL_CLOCK EQU $81 ; Hardware registers -DEF rJOYP EQU $ff00 ; Joypad (R/W) -DEF rSB EQU $ff01 ; Serial transfer data (R/W) -DEF rSC EQU $ff02 ; Serial Transfer Control (R/W) -DEF rSC_ON EQU 7 -DEF rSC_CGB EQU 1 -DEF rSC_CLOCK EQU 0 -DEF rDIV EQU $ff04 ; Divider Register (R/W) -DEF rTIMA EQU $ff05 ; Timer counter (R/W) -DEF rTMA EQU $ff06 ; Timer Modulo (R/W) -DEF rTAC EQU $ff07 ; Timer Control (R/W) -DEF rTAC_ON EQU 2 -DEF rTAC_4096_HZ EQU 0 -DEF rTAC_262144_HZ EQU 1 -DEF rTAC_65536_HZ EQU 2 -DEF rTAC_16384_HZ EQU 3 -DEF rIF EQU $ff0f ; Interrupt Flag (R/W) -DEF rNR10 EQU $ff10 ; Channel 1 Sweep register (R/W) -DEF rNR11 EQU $ff11 ; Channel 1 Sound length/Wave pattern duty (R/W) -DEF rNR12 EQU $ff12 ; Channel 1 Volume Envelope (R/W) -DEF rNR13 EQU $ff13 ; Channel 1 Frequency lo (Write Only) -DEF rNR14 EQU $ff14 ; Channel 1 Frequency hi (R/W) -DEF rNR21 EQU $ff16 ; Channel 2 Sound Length/Wave Pattern Duty (R/W) -DEF rNR22 EQU $ff17 ; Channel 2 Volume Envelope (R/W) -DEF rNR23 EQU $ff18 ; Channel 2 Frequency lo data (W) -DEF rNR24 EQU $ff19 ; Channel 2 Frequency hi data (R/W) -DEF rNR30 EQU $ff1a ; Channel 3 Sound on/off (R/W) -DEF rNR31 EQU $ff1b ; Channel 3 Sound Length -DEF rNR32 EQU $ff1c ; Channel 3 Select output level (R/W) -DEF rNR33 EQU $ff1d ; Channel 3 Frequency's lower data (W) -DEF rNR34 EQU $ff1e ; Channel 3 Frequency's higher data (R/W) -DEF rNR41 EQU $ff20 ; Channel 4 Sound Length (R/W) -DEF rNR42 EQU $ff21 ; Channel 4 Volume Envelope (R/W) -DEF rNR43 EQU $ff22 ; Channel 4 Polynomial Counter (R/W) -DEF rNR44 EQU $ff23 ; Channel 4 Counter/consecutive; Initial (R/W) -DEF rNR50 EQU $ff24 ; Channel control / ON-OFF / Volume (R/W) -DEF rNR51 EQU $ff25 ; Selection of Sound output terminal (R/W) -DEF rNR52 EQU $ff26 ; Sound on/off -DEF rWave_0 EQU $ff30 -DEF rWave_1 EQU $ff31 -DEF rWave_2 EQU $ff32 -DEF rWave_3 EQU $ff33 -DEF rWave_4 EQU $ff34 -DEF rWave_5 EQU $ff35 -DEF rWave_6 EQU $ff36 -DEF rWave_7 EQU $ff37 -DEF rWave_8 EQU $ff38 -DEF rWave_9 EQU $ff39 -DEF rWave_a EQU $ff3a -DEF rWave_b EQU $ff3b -DEF rWave_c EQU $ff3c -DEF rWave_d EQU $ff3d -DEF rWave_e EQU $ff3e -DEF rWave_f EQU $ff3f -DEF rLCDC EQU $ff40 ; LCD Control (R/W) +; Reference: https://gbdev.io/pandocs/Hardware_Reg_List.html +DEF rJOYP EQU $ff00 ; Joypad (R/W) +DEF rSB EQU $ff01 ; Serial transfer data (R/W) +DEF rSC EQU $ff02 ; Serial Transfer Control (R/W) +DEF rSC_ON EQU 7 +DEF rSC_CGB EQU 1 +DEF rSC_CLOCK EQU 0 +DEF rDIV EQU $ff04 ; Divider Register (R/W) +DEF rTIMA EQU $ff05 ; Timer counter (R/W) +DEF rTMA EQU $ff06 ; Timer Modulo (R/W) +DEF rTAC EQU $ff07 ; Timer Control (R/W) +DEF rTAC_ON EQU 2 +DEF rTAC_4096_HZ EQU 0 +DEF rTAC_262144_HZ EQU 1 +DEF rTAC_65536_HZ EQU 2 +DEF rTAC_16384_HZ EQU 3 +DEF rIF EQU $ff0f ; Interrupt Flag (R/W) +DEF rNR10 EQU $ff10 ; Channel 1 Sweep register (R/W) +DEF rNR11 EQU $ff11 ; Channel 1 Sound length/Wave pattern duty (R/W) +DEF rNR12 EQU $ff12 ; Channel 1 Volume Envelope (R/W) +DEF rNR13 EQU $ff13 ; Channel 1 Frequency lo (Write Only) +DEF rNR14 EQU $ff14 ; Channel 1 Frequency hi (R/W) +DEF rNR21 EQU $ff16 ; Channel 2 Sound Length/Wave Pattern Duty (R/W) +DEF rNR22 EQU $ff17 ; Channel 2 Volume Envelope (R/W) +DEF rNR23 EQU $ff18 ; Channel 2 Frequency lo data (W) +DEF rNR24 EQU $ff19 ; Channel 2 Frequency hi data (R/W) +DEF rNR30 EQU $ff1a ; Channel 3 Sound on/off (R/W) +DEF rNR31 EQU $ff1b ; Channel 3 Sound Length +DEF rNR32 EQU $ff1c ; Channel 3 Select output level (R/W) +DEF rNR33 EQU $ff1d ; Channel 3 Frequency's lower data (W) +DEF rNR34 EQU $ff1e ; Channel 3 Frequency's higher data (R/W) +DEF rNR41 EQU $ff20 ; Channel 4 Sound Length (R/W) +DEF rNR42 EQU $ff21 ; Channel 4 Volume Envelope (R/W) +DEF rNR43 EQU $ff22 ; Channel 4 Polynomial Counter (R/W) +DEF rNR44 EQU $ff23 ; Channel 4 Counter/consecutive; Initial (R/W) +DEF rNR50 EQU $ff24 ; Channel control / ON-OFF / Volume (R/W) +DEF rNR51 EQU $ff25 ; Selection of Sound output terminal (R/W) +DEF rNR52 EQU $ff26 ; Sound on/off +DEF rWave_0 EQU $ff30 +DEF rWave_1 EQU $ff31 +DEF rWave_2 EQU $ff32 +DEF rWave_3 EQU $ff33 +DEF rWave_4 EQU $ff34 +DEF rWave_5 EQU $ff35 +DEF rWave_6 EQU $ff36 +DEF rWave_7 EQU $ff37 +DEF rWave_8 EQU $ff38 +DEF rWave_9 EQU $ff39 +DEF rWave_a EQU $ff3a +DEF rWave_b EQU $ff3b +DEF rWave_c EQU $ff3c +DEF rWave_d EQU $ff3d +DEF rWave_e EQU $ff3e +DEF rWave_f EQU $ff3f +DEF rLCDC EQU $ff40 ; LCD Control (R/W) DEF rLCDC_BG_PRIORITY EQU 0 DEF rLCDC_SPRITES_ENABLE EQU 1 DEF rLCDC_SPRITE_SIZE EQU 2 @@ -89,36 +88,36 @@ DEF rLCDC_TILE_DATA EQU 4 DEF rLCDC_WINDOW_ENABLE EQU 5 DEF rLCDC_WINDOW_TILEMAP EQU 6 DEF rLCDC_ENABLE EQU 7 -DEF rSTAT EQU $ff41 ; LCDC Status (R/W) -DEF rSCY EQU $ff42 ; Scroll Y (R/W) -DEF rSCX EQU $ff43 ; Scroll X (R/W) -DEF rLY EQU $ff44 ; LCDC Y-Coordinate (R) -DEF rLYC EQU $ff45 ; LY Compare (R/W) -DEF rDMA EQU $ff46 ; DMA Transfer and Start Address (W) -DEF rBGP EQU $ff47 ; BG Palette Data (R/W) - Non CGB Mode Only -DEF rOBP0 EQU $ff48 ; Object Palette 0 Data (R/W) - Non CGB Mode Only -DEF rOBP1 EQU $ff49 ; Object Palette 1 Data (R/W) - Non CGB Mode Only -DEF rWY EQU $ff4a ; Window Y Position (R/W) -DEF rWX EQU $ff4b ; Window X Position minus 7 (R/W) -DEF rKEY1 EQU $ff4d ; CGB Mode Only - Prepare Speed Switch -DEF rVBK EQU $ff4f ; CGB Mode Only - VRAM Bank -DEF rHDMA1 EQU $ff51 ; CGB Mode Only - New DMA Source, High -DEF rHDMA2 EQU $ff52 ; CGB Mode Only - New DMA Source, Low -DEF rHDMA3 EQU $ff53 ; CGB Mode Only - New DMA Destination, High -DEF rHDMA4 EQU $ff54 ; CGB Mode Only - New DMA Destination, Low -DEF rHDMA5 EQU $ff55 ; CGB Mode Only - New DMA Length/Mode/Start -DEF rRP EQU $ff56 ; CGB Mode Only - Infrared Communications Port -DEF rBGPI EQU $ff68 ; CGB Mode Only - Background Palette Index -DEF rBGPD EQU $ff69 ; CGB Mode Only - Background Palette Data -DEF rOBPI EQU $ff6a ; CGB Mode Only - Sprite Palette Index -DEF rOBPD EQU $ff6b ; CGB Mode Only - Sprite Palette Data -DEF rOPRI EQU $ff6c ; CGB Mode Only - Object Priority Mode -DEF rSVBK EQU $ff70 ; CGB Mode Only - WRAM Bank -DEF rPCM12 EQU $ff76 ; Channels 1 & 2 Amplitude (R) -DEF rPCM34 EQU $ff77 ; Channels 3 & 4 Amplitude (R) -DEF rIE EQU $ffff ; Interrupt Enable (R/W) -DEF rIE_VBLANK EQU 0 -DEF rIE_LCD EQU 1 -DEF rIE_TIMER EQU 2 -DEF rIE_SERIAL EQU 3 -DEF rIE_JOYPAD EQU 4 +DEF rSTAT EQU $ff41 ; LCDC Status (R/W) +DEF rSCY EQU $ff42 ; Scroll Y (R/W) +DEF rSCX EQU $ff43 ; Scroll X (R/W) +DEF rLY EQU $ff44 ; LCDC Y-Coordinate (R) +DEF rLYC EQU $ff45 ; LY Compare (R/W) +DEF rDMA EQU $ff46 ; DMA Transfer and Start Address (W) +DEF rBGP EQU $ff47 ; BG Palette Data (R/W) - Non CGB Mode Only +DEF rOBP0 EQU $ff48 ; Object Palette 0 Data (R/W) - Non CGB Mode Only +DEF rOBP1 EQU $ff49 ; Object Palette 1 Data (R/W) - Non CGB Mode Only +DEF rWY EQU $ff4a ; Window Y Position (R/W) +DEF rWX EQU $ff4b ; Window X Position minus 7 (R/W) +DEF rKEY1 EQU $ff4d ; CGB Mode Only - Prepare Speed Switch +DEF rVBK EQU $ff4f ; CGB Mode Only - VRAM Bank +DEF rHDMA1 EQU $ff51 ; CGB Mode Only - New DMA Source, High +DEF rHDMA2 EQU $ff52 ; CGB Mode Only - New DMA Source, Low +DEF rHDMA3 EQU $ff53 ; CGB Mode Only - New DMA Destination, High +DEF rHDMA4 EQU $ff54 ; CGB Mode Only - New DMA Destination, Low +DEF rHDMA5 EQU $ff55 ; CGB Mode Only - New DMA Length/Mode/Start +DEF rRP EQU $ff56 ; CGB Mode Only - Infrared Communications Port +DEF rBGPI EQU $ff68 ; CGB Mode Only - Background Palette Index +DEF rBGPD EQU $ff69 ; CGB Mode Only - Background Palette Data +DEF rOBPI EQU $ff6a ; CGB Mode Only - Sprite Palette Index +DEF rOBPD EQU $ff6b ; CGB Mode Only - Sprite Palette Data +DEF rOPRI EQU $ff6c ; CGB Mode Only - Object Priority Mode +DEF rSVBK EQU $ff70 ; CGB Mode Only - WRAM Bank +DEF rPCM12 EQU $ff76 ; Channels 1 & 2 Amplitude (R) +DEF rPCM34 EQU $ff77 ; Channels 3 & 4 Amplitude (R) +DEF rIE EQU $ffff ; Interrupt Enable (R/W) +DEF rIE_VBLANK EQU 0 +DEF rIE_LCD EQU 1 +DEF rIE_TIMER EQU 2 +DEF rIE_SERIAL EQU 3 +DEF rIE_JOYPAD EQU 4 From 8df10308ead8ee67798b5e9739d1f18628675384 Mon Sep 17 00:00:00 2001 From: SatoMew Date: Thu, 30 Jan 2025 21:08:20 +0000 Subject: [PATCH 3/3] Rename wOnSGB and wOnCGB, address feedback from review --- constants/hardware_constants.asm | 179 ++++++++++++++++--------------- 1 file changed, 91 insertions(+), 88 deletions(-) diff --git a/constants/hardware_constants.asm b/constants/hardware_constants.asm index 644d9be841..6c5d43c169 100644 --- a/constants/hardware_constants.asm +++ b/constants/hardware_constants.asm @@ -1,3 +1,7 @@ +; Reference documents: +; https://gbdev.io/pandocs/ +; https://github.com/gbdev/hardware.inc + DEF CGB EQU $11 ; MBC1 @@ -25,61 +29,60 @@ DEF START_TRANSFER_EXTERNAL_CLOCK EQU $80 DEF START_TRANSFER_INTERNAL_CLOCK EQU $81 ; Hardware registers -; Reference: https://gbdev.io/pandocs/Hardware_Reg_List.html -DEF rJOYP EQU $ff00 ; Joypad (R/W) -DEF rSB EQU $ff01 ; Serial transfer data (R/W) -DEF rSC EQU $ff02 ; Serial Transfer Control (R/W) -DEF rSC_ON EQU 7 -DEF rSC_CGB EQU 1 -DEF rSC_CLOCK EQU 0 -DEF rDIV EQU $ff04 ; Divider Register (R/W) -DEF rTIMA EQU $ff05 ; Timer counter (R/W) -DEF rTMA EQU $ff06 ; Timer Modulo (R/W) -DEF rTAC EQU $ff07 ; Timer Control (R/W) -DEF rTAC_ON EQU 2 -DEF rTAC_4096_HZ EQU 0 -DEF rTAC_262144_HZ EQU 1 -DEF rTAC_65536_HZ EQU 2 -DEF rTAC_16384_HZ EQU 3 -DEF rIF EQU $ff0f ; Interrupt Flag (R/W) -DEF rNR10 EQU $ff10 ; Channel 1 Sweep register (R/W) -DEF rNR11 EQU $ff11 ; Channel 1 Sound length/Wave pattern duty (R/W) -DEF rNR12 EQU $ff12 ; Channel 1 Volume Envelope (R/W) -DEF rNR13 EQU $ff13 ; Channel 1 Frequency lo (Write Only) -DEF rNR14 EQU $ff14 ; Channel 1 Frequency hi (R/W) -DEF rNR21 EQU $ff16 ; Channel 2 Sound Length/Wave Pattern Duty (R/W) -DEF rNR22 EQU $ff17 ; Channel 2 Volume Envelope (R/W) -DEF rNR23 EQU $ff18 ; Channel 2 Frequency lo data (W) -DEF rNR24 EQU $ff19 ; Channel 2 Frequency hi data (R/W) -DEF rNR30 EQU $ff1a ; Channel 3 Sound on/off (R/W) -DEF rNR31 EQU $ff1b ; Channel 3 Sound Length -DEF rNR32 EQU $ff1c ; Channel 3 Select output level (R/W) -DEF rNR33 EQU $ff1d ; Channel 3 Frequency's lower data (W) -DEF rNR34 EQU $ff1e ; Channel 3 Frequency's higher data (R/W) -DEF rNR41 EQU $ff20 ; Channel 4 Sound Length (R/W) -DEF rNR42 EQU $ff21 ; Channel 4 Volume Envelope (R/W) -DEF rNR43 EQU $ff22 ; Channel 4 Polynomial Counter (R/W) -DEF rNR44 EQU $ff23 ; Channel 4 Counter/consecutive; Initial (R/W) -DEF rNR50 EQU $ff24 ; Channel control / ON-OFF / Volume (R/W) -DEF rNR51 EQU $ff25 ; Selection of Sound output terminal (R/W) -DEF rNR52 EQU $ff26 ; Sound on/off -DEF rWave_0 EQU $ff30 -DEF rWave_1 EQU $ff31 -DEF rWave_2 EQU $ff32 -DEF rWave_3 EQU $ff33 -DEF rWave_4 EQU $ff34 -DEF rWave_5 EQU $ff35 -DEF rWave_6 EQU $ff36 -DEF rWave_7 EQU $ff37 -DEF rWave_8 EQU $ff38 -DEF rWave_9 EQU $ff39 -DEF rWave_a EQU $ff3a -DEF rWave_b EQU $ff3b -DEF rWave_c EQU $ff3c -DEF rWave_d EQU $ff3d -DEF rWave_e EQU $ff3e -DEF rWave_f EQU $ff3f -DEF rLCDC EQU $ff40 ; LCD Control (R/W) +DEF rJOYP EQU $ff00 ; Joypad (R/W) +DEF rSB EQU $ff01 ; Serial transfer data (R/W) +DEF rSC EQU $ff02 ; Serial Transfer Control (R/W) +DEF rSC_ON EQU 7 +DEF rSC_CGB EQU 1 +DEF rSC_CLOCK EQU 0 +DEF rDIV EQU $ff04 ; Divider Register (R/W) +DEF rTIMA EQU $ff05 ; Timer counter (R/W) +DEF rTMA EQU $ff06 ; Timer Modulo (R/W) +DEF rTAC EQU $ff07 ; Timer Control (R/W) +DEF rTAC_ON EQU 2 +DEF rTAC_4096_HZ EQU 0 +DEF rTAC_262144_HZ EQU 1 +DEF rTAC_65536_HZ EQU 2 +DEF rTAC_16384_HZ EQU 3 +DEF rIF EQU $ff0f ; Interrupt Flag (R/W) +DEF rNR10 EQU $ff10 ; Channel 1 Sweep register (R/W) +DEF rNR11 EQU $ff11 ; Channel 1 Sound length/Wave pattern duty (R/W) +DEF rNR12 EQU $ff12 ; Channel 1 Volume Envelope (R/W) +DEF rNR13 EQU $ff13 ; Channel 1 Frequency lo (Write Only) +DEF rNR14 EQU $ff14 ; Channel 1 Frequency hi (R/W) +DEF rNR21 EQU $ff16 ; Channel 2 Sound Length/Wave Pattern Duty (R/W) +DEF rNR22 EQU $ff17 ; Channel 2 Volume Envelope (R/W) +DEF rNR23 EQU $ff18 ; Channel 2 Frequency lo data (W) +DEF rNR24 EQU $ff19 ; Channel 2 Frequency hi data (R/W) +DEF rNR30 EQU $ff1a ; Channel 3 Sound on/off (R/W) +DEF rNR31 EQU $ff1b ; Channel 3 Sound Length +DEF rNR32 EQU $ff1c ; Channel 3 Select output level (R/W) +DEF rNR33 EQU $ff1d ; Channel 3 Frequency's lower data (W) +DEF rNR34 EQU $ff1e ; Channel 3 Frequency's higher data (R/W) +DEF rNR41 EQU $ff20 ; Channel 4 Sound Length (R/W) +DEF rNR42 EQU $ff21 ; Channel 4 Volume Envelope (R/W) +DEF rNR43 EQU $ff22 ; Channel 4 Polynomial Counter (R/W) +DEF rNR44 EQU $ff23 ; Channel 4 Counter/consecutive; Initial (R/W) +DEF rNR50 EQU $ff24 ; Channel control / ON-OFF / Volume (R/W) +DEF rNR51 EQU $ff25 ; Selection of Sound output terminal (R/W) +DEF rNR52 EQU $ff26 ; Sound on/off +DEF rWave_0 EQU $ff30 +DEF rWave_1 EQU $ff31 +DEF rWave_2 EQU $ff32 +DEF rWave_3 EQU $ff33 +DEF rWave_4 EQU $ff34 +DEF rWave_5 EQU $ff35 +DEF rWave_6 EQU $ff36 +DEF rWave_7 EQU $ff37 +DEF rWave_8 EQU $ff38 +DEF rWave_9 EQU $ff39 +DEF rWave_a EQU $ff3a +DEF rWave_b EQU $ff3b +DEF rWave_c EQU $ff3c +DEF rWave_d EQU $ff3d +DEF rWave_e EQU $ff3e +DEF rWave_f EQU $ff3f +DEF rLCDC EQU $ff40 ; LCD Control (R/W) DEF rLCDC_BG_PRIORITY EQU 0 DEF rLCDC_SPRITES_ENABLE EQU 1 DEF rLCDC_SPRITE_SIZE EQU 2 @@ -88,36 +91,36 @@ DEF rLCDC_TILE_DATA EQU 4 DEF rLCDC_WINDOW_ENABLE EQU 5 DEF rLCDC_WINDOW_TILEMAP EQU 6 DEF rLCDC_ENABLE EQU 7 -DEF rSTAT EQU $ff41 ; LCDC Status (R/W) -DEF rSCY EQU $ff42 ; Scroll Y (R/W) -DEF rSCX EQU $ff43 ; Scroll X (R/W) -DEF rLY EQU $ff44 ; LCDC Y-Coordinate (R) -DEF rLYC EQU $ff45 ; LY Compare (R/W) -DEF rDMA EQU $ff46 ; DMA Transfer and Start Address (W) -DEF rBGP EQU $ff47 ; BG Palette Data (R/W) - Non CGB Mode Only -DEF rOBP0 EQU $ff48 ; Object Palette 0 Data (R/W) - Non CGB Mode Only -DEF rOBP1 EQU $ff49 ; Object Palette 1 Data (R/W) - Non CGB Mode Only -DEF rWY EQU $ff4a ; Window Y Position (R/W) -DEF rWX EQU $ff4b ; Window X Position minus 7 (R/W) -DEF rKEY1 EQU $ff4d ; CGB Mode Only - Prepare Speed Switch -DEF rVBK EQU $ff4f ; CGB Mode Only - VRAM Bank -DEF rHDMA1 EQU $ff51 ; CGB Mode Only - New DMA Source, High -DEF rHDMA2 EQU $ff52 ; CGB Mode Only - New DMA Source, Low -DEF rHDMA3 EQU $ff53 ; CGB Mode Only - New DMA Destination, High -DEF rHDMA4 EQU $ff54 ; CGB Mode Only - New DMA Destination, Low -DEF rHDMA5 EQU $ff55 ; CGB Mode Only - New DMA Length/Mode/Start -DEF rRP EQU $ff56 ; CGB Mode Only - Infrared Communications Port -DEF rBGPI EQU $ff68 ; CGB Mode Only - Background Palette Index -DEF rBGPD EQU $ff69 ; CGB Mode Only - Background Palette Data -DEF rOBPI EQU $ff6a ; CGB Mode Only - Sprite Palette Index -DEF rOBPD EQU $ff6b ; CGB Mode Only - Sprite Palette Data -DEF rOPRI EQU $ff6c ; CGB Mode Only - Object Priority Mode -DEF rSVBK EQU $ff70 ; CGB Mode Only - WRAM Bank -DEF rPCM12 EQU $ff76 ; Channels 1 & 2 Amplitude (R) -DEF rPCM34 EQU $ff77 ; Channels 3 & 4 Amplitude (R) -DEF rIE EQU $ffff ; Interrupt Enable (R/W) -DEF rIE_VBLANK EQU 0 -DEF rIE_LCD EQU 1 -DEF rIE_TIMER EQU 2 -DEF rIE_SERIAL EQU 3 -DEF rIE_JOYPAD EQU 4 +DEF rSTAT EQU $ff41 ; LCDC Status (R/W) +DEF rSCY EQU $ff42 ; Scroll Y (R/W) +DEF rSCX EQU $ff43 ; Scroll X (R/W) +DEF rLY EQU $ff44 ; LCDC Y-Coordinate (R) +DEF rLYC EQU $ff45 ; LY Compare (R/W) +DEF rDMA EQU $ff46 ; DMA Transfer and Start Address (W) +DEF rBGP EQU $ff47 ; BG Palette Data (R/W) - Non CGB Mode Only +DEF rOBP0 EQU $ff48 ; Object Palette 0 Data (R/W) - Non CGB Mode Only +DEF rOBP1 EQU $ff49 ; Object Palette 1 Data (R/W) - Non CGB Mode Only +DEF rWY EQU $ff4a ; Window Y Position (R/W) +DEF rWX EQU $ff4b ; Window X Position minus 7 (R/W) +DEF rKEY1 EQU $ff4d ; CGB Mode Only - Prepare Speed Switch +DEF rVBK EQU $ff4f ; CGB Mode Only - VRAM Bank +DEF rHDMA1 EQU $ff51 ; CGB Mode Only - New DMA Source, High +DEF rHDMA2 EQU $ff52 ; CGB Mode Only - New DMA Source, Low +DEF rHDMA3 EQU $ff53 ; CGB Mode Only - New DMA Destination, High +DEF rHDMA4 EQU $ff54 ; CGB Mode Only - New DMA Destination, Low +DEF rHDMA5 EQU $ff55 ; CGB Mode Only - New DMA Length/Mode/Start +DEF rRP EQU $ff56 ; CGB Mode Only - Infrared Communications Port +DEF rBGPI EQU $ff68 ; CGB Mode Only - Background Palette Index +DEF rBGPD EQU $ff69 ; CGB Mode Only - Background Palette Data +DEF rOBPI EQU $ff6a ; CGB Mode Only - Sprite Palette Index +DEF rOBPD EQU $ff6b ; CGB Mode Only - Sprite Palette Data +DEF rOPRI EQU $ff6c ; CGB Mode Only - Object Priority Mode +DEF rSVBK EQU $ff70 ; CGB Mode Only - WRAM Bank +DEF rPCM12 EQU $ff76 ; Channels 1 & 2 Amplitude (R) +DEF rPCM34 EQU $ff77 ; Channels 3 & 4 Amplitude (R) +DEF rIE EQU $ffff ; Interrupt Enable (R/W) +DEF rIE_VBLANK EQU 0 +DEF rIE_LCD EQU 1 +DEF rIE_TIMER EQU 2 +DEF rIE_SERIAL EQU 3 +DEF rIE_JOYPAD EQU 4