From a15b8cbe3eea800ab20586b45b31d52e7d1bfc1f Mon Sep 17 00:00:00 2001 From: "ayraa.ai" <141430616+geeky33@users.noreply.github.com> Date: Tue, 28 Jan 2025 22:00:28 +0530 Subject: [PATCH] Updated jit_eltwise_emitters.cpp --- .../plugin/aarch64/jit_eltwise_emitters.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.cpp b/src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.cpp index ae5145bcdc351c..381d1ae7eddcd7 100644 --- a/src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.cpp +++ b/src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.cpp @@ -290,14 +290,14 @@ void jit_equal_emitter::register_table_entries() { } /// NOTEQUAL /// -jit_not_equal_emitter::jit_not_equal_emitter(dnnl::impl::cpu::aarch64::jit_generator *host, +jit_not_equal_emitter::jit_not_equal_emitter(dnnl::impl::cpu::aarch64::jit_generator* host, dnnl::impl::cpu::aarch64::cpu_isa_t host_isa, const std::shared_ptr& node) : jit_emitter(host, host_isa, get_arithmetic_binary_exec_precision(node)) { prepare_table(); } -jit_not_equal_emitter::jit_not_equal_emitter(dnnl::impl::cpu::aarch64::jit_generator *host, +jit_not_equal_emitter::jit_not_equal_emitter(dnnl::impl::cpu::aarch64::jit_generator* host, dnnl::impl::cpu::aarch64::cpu_isa_t host_isa, const ov::element::Type exec_prc) : jit_emitter(host, host_isa, exec_prc) { @@ -308,7 +308,7 @@ size_t jit_not_equal_emitter::get_inputs_count() const { return 2; } -size_t jit_not_equal_emitter::get_aux_vecs_count() const { +size_t jit_not_equal_emitter::get_aux_vecs_count() const { return 1; } @@ -330,18 +330,18 @@ void jit_not_equal_emitter::emit_impl(const std::vector& in_vec_idxs, } } template -void jit_not_equal_emitter::emit_isa(const std::vector &in_vec_idxs, - const std::vector &out_vec_idxs) const { +void jit_not_equal_emitter::emit_isa(const std::vector& in_vec_idxs, + const std::vector& out_vec_idxs) const { OV_CPU_JIT_EMITTER_ASSERT(exec_prc_ == ov::element::f32, "unsupported precision: " + exec_prc_.to_string()); - + using TReg = typename dnnl::impl::cpu::aarch64::cpu_isa_traits::TReg; const TReg src1 = TReg(in_vec_idxs[0]); const TReg src2 = TReg(in_vec_idxs[1]); const TReg dst = TReg(out_vec_idxs[0]); const TReg aux = TReg(aux_vec_idxs[0]); - + h->fcmeq(dst.s, src1.s, src2.s); - + h->not_(dst.b16, dst.b16); h->ld1r(aux.s, table_val2("one")); h->and_(dst.b16, dst.b16, aux.b16);