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Adopt OpenRISC patch to recent changes
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@wallento
wallento committed Mar 20, 2016
1 parent 1413e9a commit b7dfedc
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Showing 4 changed files with 55 additions and 59 deletions.
71 changes: 35 additions & 36 deletions gcc/config/or1k/or1k.c
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Original file line number Diff line number Diff line change
Expand Up @@ -26,13 +26,20 @@
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "backend.h"
#include "target.h"
#include "rtl.h"
#include "tree.h"
#include "df.h"
#include "tm.h"
#include "tm_p.h"
#include "stringpool.h"
#include "optabs.h"
#include "hash-set.h"
#include "emit-rtl.h"
#include "recog.h"
#include "inchash.h"
#include "symtab.h"
#include "tree.h"
#include "stringpool.h"
#include "stor-layout.h"
#include "calls.h"
#include "varasm.h"
Expand All @@ -48,24 +55,19 @@
#include "reload.h"
#include "function.h"
#include "explow.h"
#include "emit-rtl.h"
#include "expr.h"
#include "toplev.h"
#include "recog.h"
#include "ggc.h"
#include "except.h"
#include "tm_p.h"
#include "target.h"
#include "target-def.h"
#include "debug.h"
#include "langhooks.h"
#include "predict.h"
#include "basic-block.h"
#include "df.h"
#include "optabs.h"
#include "dwarf2.h"
#include "ansidecl.h"
#include "builtins.h"
#include "sbitmap.h"

/* ========================================================================== */
/* Local macros */
Expand Down Expand Up @@ -379,7 +381,7 @@ or1k_expand_int_compare (enum rtx_code code,
/* This is very simple, but making the interface the same as in the
FP case makes the rest of the code easier. */
tmp = gen_rtx_COMPARE (cmpmode, op0, op1);
emit_insn (gen_rtx_SET (VOIDmode, flags, tmp));
emit_insn (gen_rtx_SET (flags, tmp));

/* Return the test that should be put into the flags user, i.e.
the bcc, scc, or cmov instruction. */
Expand Down Expand Up @@ -434,14 +436,14 @@ or1k_expand_cmpxchg_qihi (rtx bval, rtx retval, rtx mem, rtx oldval, rtx newval,

mask_const = gen_rtx_CONST_INT (VOIDmode,
mode == QImode ? 0xff : 0xffff);
emit_insn (gen_rtx_SET (VOIDmode, mask, mask_const));
emit_insn (gen_rtx_SET (mask, mask_const));

/* align address and retrieve the offset. */
emit_insn (gen_rtx_SET (VOIDmode, addr,
emit_insn (gen_rtx_SET (addr,
gen_rtx_AND (Pmode, addr1, GEN_INT (-4))));
emit_insn (gen_rtx_SET (VOIDmode, off,
emit_insn (gen_rtx_SET (off,
gen_rtx_AND (SImode, addr1, GEN_INT (3))));
emit_insn (gen_rtx_SET (VOIDmode, off,
emit_insn (gen_rtx_SET (off,
gen_rtx_XOR (SImode, off,
GEN_INT (GET_MODE (mem) == QImode
? 3 : 2))));
Expand All @@ -450,7 +452,7 @@ or1k_expand_cmpxchg_qihi (rtx bval, rtx retval, rtx mem, rtx oldval, rtx newval,

/* shift all arguments to be aligned to where the data we want
* to operate on is located. */
emit_insn (gen_rtx_SET (VOIDmode, shifter,
emit_insn (gen_rtx_SET (shifter,
gen_rtx_ASHIFT (SImode, off, GEN_INT (3))));

emit_insn (gen_ashlsi3 (shifted_oldval, oldval, shifter));
Expand Down Expand Up @@ -490,14 +492,14 @@ or1k_expand_fetch_op_qihi (rtx oldval, rtx mem, rtx operand, rtx newval,

mask_const = gen_rtx_CONST_INT (VOIDmode,
mode == QImode ? 0xff : 0xffff);
emit_insn (gen_rtx_SET (VOIDmode, mask, mask_const));
emit_insn (gen_rtx_SET (mask, mask_const));

/* align address and retrieve the offset. */
emit_insn (gen_rtx_SET (VOIDmode, addr,
emit_insn (gen_rtx_SET (addr,
gen_rtx_AND (Pmode, addr1, GEN_INT (-4))));
emit_insn (gen_rtx_SET (VOIDmode, off,
emit_insn (gen_rtx_SET (off,
gen_rtx_AND (SImode, addr1, GEN_INT (3))));
emit_insn (gen_rtx_SET (VOIDmode, off,
emit_insn (gen_rtx_SET (off,
gen_rtx_XOR (SImode, off,
GEN_INT (GET_MODE (mem) == QImode
? 3 : 2))));
Expand All @@ -506,7 +508,7 @@ or1k_expand_fetch_op_qihi (rtx oldval, rtx mem, rtx operand, rtx newval,

/* shift all arguments to be aligned to where the data we want
* to operate on is located. */
emit_insn (gen_rtx_SET (VOIDmode, shifter,
emit_insn (gen_rtx_SET (shifter,
gen_rtx_ASHIFT (SImode, off, GEN_INT (3))));

emit_insn (gen_ashlsi3 (shifted_operand, operand, shifter));
Expand Down Expand Up @@ -565,7 +567,7 @@ or1k_emit_int_cmove (rtx dest,


static void
or1k_print_operand_address (FILE *stream, rtx addr)
or1k_print_operand_address (FILE *stream, machine_mode /* mode */, rtx addr)
{
rtx offset;

Expand Down Expand Up @@ -595,7 +597,7 @@ or1k_print_operand_address (FILE *stream, rtx addr)
offset = XEXP (addr, 0);
addr = XEXP (addr, 1);
}
output_address (offset);
output_address (GET_MODE(addr), offset);
fprintf (stream, "(%s)", reg_names[REGNO (addr)]);
break;

Expand Down Expand Up @@ -999,7 +1001,7 @@ or1k_emit_binary (enum rtx_code code,
rtx op0,
rtx op1)
{
emit_insn (gen_rtx_SET (VOIDmode, target,
emit_insn (gen_rtx_SET (target,
gen_rtx_fmt_ee (code, GET_MODE (target), op0, op1)));

} /* or1k_emit_binary () */
Expand Down Expand Up @@ -1102,8 +1104,7 @@ or1k_expand_prologue (void)
GEN_INT (-frame_info.gpr_frame)));
if (frame_info.save_fp_p)
{
emit_frame_insn (gen_rtx_SET (Pmode,
stack_disp_mem (frame_info.fp_save_offset),
emit_frame_insn (gen_rtx_SET (stack_disp_mem (frame_info.fp_save_offset),
hard_frame_pointer_rtx));

emit_frame_insn
Expand All @@ -1112,7 +1113,7 @@ or1k_expand_prologue (void)
if (frame_info.save_lr_p)
{
emit_frame_insn
(gen_rtx_SET (Pmode, stack_disp_mem (frame_info.lr_save_offset),
(gen_rtx_SET (stack_disp_mem (frame_info.lr_save_offset),
gen_rtx_REG (Pmode, LINK_REGNUM)));
}
if (frame_info.gpr_size)
Expand All @@ -1134,8 +1135,7 @@ or1k_expand_prologue (void)
!= frame_info.fp_save_offset));

emit_frame_insn
(gen_rtx_SET (Pmode,
stack_disp_mem (frame_info.gpr_offset + offset),
(gen_rtx_SET (stack_disp_mem (frame_info.gpr_offset + offset),
gen_rtx_REG (Pmode, regno)));
offset = offset + UNITS_PER_WORD;
}
Expand Down Expand Up @@ -1194,7 +1194,7 @@ or1k_expand_epilogue (void)
{
emit_insn (gen_frame_dealloc_fp ());
emit_insn
(gen_rtx_SET (Pmode, hard_frame_pointer_rtx,
(gen_rtx_SET (hard_frame_pointer_rtx,
stack_disp_mem (frame_info.fp_save_offset)));
}
else
Expand All @@ -1217,7 +1217,7 @@ or1k_expand_epilogue (void)
if (frame_info.save_lr_p && !crtl->calls_eh_return)
{
emit_insn
(gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, LINK_REGNUM),
(gen_rtx_SET (gen_rtx_REG (Pmode, LINK_REGNUM),
stack_disp_mem (frame_info.lr_save_offset)));
}

Expand All @@ -1233,7 +1233,7 @@ or1k_expand_epilogue (void)

if (regno != FIRST_PSEUDO_REGISTER)
emit_insn
(gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, regno),
(gen_rtx_SET (gen_rtx_REG (Pmode, regno),
stack_disp_mem (frame_info.gpr_offset + offset)));
offset = offset + UNITS_PER_WORD;
}
Expand Down Expand Up @@ -1414,7 +1414,7 @@ or1k_expand_conditional_branch (rtx *operands,
tmp,
gen_rtx_LABEL_REF (VOIDmode, operands[3]),
pc_rtx);
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
return;

case SFmode:
Expand All @@ -1423,7 +1423,7 @@ or1k_expand_conditional_branch (rtx *operands,
tmp,
gen_rtx_LABEL_REF (VOIDmode, operands[3]),
pc_rtx);
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
emit_jump_insn (gen_rtx_SET (pc_rtx, tmp));
return;

default:
Expand Down Expand Up @@ -1554,12 +1554,11 @@ or1k_emit_set_const32 (rtx op0,
/* Emit them as real moves instead of a HIGH/LO_SUM,
this way CSE can see everything and reuse intermediate
values if it wants. */
emit_insn (gen_rtx_SET (VOIDmode, temp,
emit_insn (gen_rtx_SET (temp,
GEN_INT (INTVAL (op1)
& ~(HOST_WIDE_INT) 0xffff)));

emit_insn (gen_rtx_SET (VOIDmode,
op0,
emit_insn (gen_rtx_SET (op0,
gen_rtx_IOR (mode, temp,
GEN_INT (INTVAL (op1) & 0xffff))));
}
Expand Down
7 changes: 2 additions & 5 deletions gcc/config/or1k/or1k.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -166,7 +166,7 @@ Boston, MA 02111-1307, USA. */

/* Define if operations between registers always perform the operation
on the full register even if a narrower mode is specified. */
#define WORD_REGISTER_OPERATIONS /* CHECK */
#define WORD_REGISTER_OPERATIONS 1


/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
Expand Down Expand Up @@ -344,9 +344,6 @@ Boston, MA 02111-1307, USA. */
is passed to a function. */
/*#define STRUCT_VALUE_REGNUM 0*/

/* Pass address of result struct to callee as "invisible" first argument */
#define STRUCT_VALUE 0

/* -----------------------[ PHX start ]-------------------------------- */

/* Define the classes of registers for register constraints in the
Expand Down Expand Up @@ -1153,7 +1150,7 @@ enum reg_class
else if (GET_CODE (x) == REG) \
fprintf (stream, "%s", reg_names[REGNO (x)]); \
else if (GET_CODE (x) == MEM) \
output_address (XEXP (x, 0)); \
output_address (GET_MODE(x), XEXP (x, 0)); \
else \
output_addr_const (stream, x); \
}
Expand Down
4 changes: 2 additions & 2 deletions gcc/config/or1k/or1k.md
View file
Original file line number Diff line number Diff line change
Expand Up @@ -192,7 +192,7 @@
{
rtx reg = gen_reg_rtx (SImode);

emit_insn (gen_rtx_SET (SImode, reg,
emit_insn (gen_rtx_SET (reg,
gen_rtx_ZERO_EXTEND (SImode,
operands[1])));

Expand Down Expand Up @@ -238,7 +238,7 @@
{
rtx reg = gen_reg_rtx (SImode);

emit_insn (gen_rtx_SET (SImode, reg,
emit_insn (gen_rtx_SET (reg,
gen_rtx_ZERO_EXTEND (SImode,
operands[1])));
operands[1] = gen_lowpart (HImode, reg);
Expand Down
32 changes: 16 additions & 16 deletions gcc/config/or1k/or1k.opt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,71 +25,71 @@ enum or1k_delay or1k_delay_selected = OR1K_DELAY_DEFAULT

mdelay
Target RejectNegative Negative(mno-delay) Var(or1k_delay_selected, OR1K_DELAY_ON)
Assume branches and jumps have a delay slot
Assume branches and jumps have a delay slot.

mno-delay
Target RejectNegative Negative(mcompat-delay) Var(or1k_delay_selected, OR1K_DELAY_OFF)
Assume branches and jumps do not have a delay slot
Assume branches and jumps do not have a delay slot.

mcompat-delay
Target RejectNegative Negative(mdelay) Var(or1k_delay_selected, OR1K_DELAY_COMPAT)
Assume branches and jumps have a delay slot, but fill them with nops
Assume branches and jumps have a delay slot, but fill them with nops.

mhard-float
Target RejectNegative Mask(HARD_FLOAT)
Use hardware floating point
Use hardware floating point.

msoft-float
Target RejectNegative InverseMask(HARD_FLOAT)
Do not use hardware floating point
Do not use hardware floating point.

mdouble-float
Target Report RejectNegative Mask(DOUBLE_FLOAT)
Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations.

mhard-div
Target RejectNegative Mask(HARD_DIV)
Use hardware division
Use hardware division.

msoft-div
Target RejectNegative InverseMask(HARD_DIV)
Do not use hardware division
Do not use hardware division.

mhard-mul
Target RejectNegative Mask(HARD_MUL)
Use hardware multiplication
Use hardware multiplication.

msoft-mul
Target RejectNegative InverseMask(HARD_MUL)
Do not use hardware multiplication
Do not use hardware multiplication.

msext
Target Mask(MASK_SEXT)
Use sign-extending instructions
Use sign-extending instructions.

mcmov
Target Mask(MASK_CMOV)
Use conditional move instructions
Use conditional move instructions.

mror
Target Mask(MASK_ROR)
Emit ROR instructions
Emit ROR instructions.

mboard=
Target RejectNegative Joined
Link with libgloss configuration suitable for this board
Link with libgloss configuration suitable for this board.

mnewlib
Target Report RejectNegative
Compile for the Linux/Gnu/newlib based toolchain
Compile for the Linux/Gnu/newlib based toolchain.

;; provide struct padding as in previous releases.
;; Note that this will only affect STRUCTURE_SIZE_BOUNDARY, in particular
;; make 2 byte structs 4-byte alignned and sized.
;; We still use ROUND_TYPE_ALIGN to increase alignment of larger structs.
mpadstruct
Target Report RejectNegative Mask(PADSTRUCT)
Make structs a multiple of 4 bytes (warning: ABI altered)
Make structs a multiple of 4 bytes (warning: ABI altered).

mredzone=
Target RejectNegative Joined UInteger Var(or1k_redzone) Init(128)
Expand Down

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