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release: 0.4.0
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lightgun support!
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@ericlewis
ericlewis committed Oct 6, 2022
1 parent 06868b3 commit e7e7e21
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Showing 9 changed files with 28 additions and 28 deletions.
Binary file modified dist/Cores/ericlewis.Genesis/bitstream.rbf_r
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2 changes: 1 addition & 1 deletion dist/Cores/ericlewis.Genesis/core.json
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Expand Up @@ -7,7 +7,7 @@
"description": "Sega Genesis, known as the Mega Drive outside North America, is a 16-bit fourth-generation home video game console developed and sold by Sega.",
"author": "ericlewis",
"url": "https://github.com/ericlewis/openfpga-genesis",
"version": "0.3.2",
"version": "0.4.0",
"date_release": "2022-10-06"
},
"framework": {
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8 changes: 4 additions & 4 deletions src/fpga/ap_core.qsf
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Expand Up @@ -779,10 +779,10 @@ set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION ALWAYS
set_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS ON
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT LOW
# set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF
# set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
# set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON
set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS OFF
set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING OFF
set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON
# set_global_assignment -name SYNTH_GATED_CLOCK_CONVERSION ON
# set_global_assignment -name ROUTER_REGISTER_DUPLICATION ON
set_global_assignment -name ROUTER_REGISTER_DUPLICATION ON
set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
6 changes: 3 additions & 3 deletions src/fpga/apf/build_id.mif
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Expand Up @@ -9,8 +9,8 @@ DATA_RADIX = HEX;
CONTENT
BEGIN

0E0 : 20221005;
0E1 : 00210835;
0E2 : 17355e54;
0E0 : 20221006;
0E1 : 00064247;
0E2 : e24bf66a;

END;
4 changes: 2 additions & 2 deletions src/fpga/core/core_constraints.sdc
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Expand Up @@ -31,5 +31,5 @@ set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[0].
set_multicycle_path -from {ic|system|data*} -to [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -start -setup 2
set_multicycle_path -from {ic|system|data*} -to [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -start -hold 1

set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -to {ic|system|data*} -setup 2
set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -to {ic|system|data*} -hold 1
set_multicycle_path -from [get_clocks { ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -to {ic|system|data*} -setup 4
set_multicycle_path -from [get_clocks { ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -to {ic|system|data*} -hold 3
36 changes: 18 additions & 18 deletions src/fpga/output_files/ap_core.jdi
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@@ -1,13 +1,13 @@
<sld_project_info>
<project>
<hash md5_digest_80b="1ba765df1fc514e591aa"/>
<hash md5_digest_80b="8a3c2c46652dd77e20a2"/>
</project>
<file_info>
<file device="5CEBA4F23C8" path="ap_core.sof" usercode="0xFFFFFFFF"/>
</file_info>
<hub_info hub_ir_width="8" ir_width="8" node_addr_width="1" node_count="1"/>
<node_info>
<node hpath="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|sld_mod_ram_rom:mgl_prim2" instance_id="0" mfg_id="110" node_id="3" sld_node_info="0x10186E00" version="2">
<node hpath="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|sld_mod_ram_rom:mgl_prim2" instance_id="0" mfg_id="110" node_id="3" sld_node_info="0x10186E00" version="2">
<parameters>
<parameter name="SLD_NODE_INFO" type="dec" value="270036480"/>
<parameter name="SLD_AUTO_INSTANCE_INDEX" type="string" value="yes"/>
Expand All @@ -27,22 +27,22 @@
<parameter name="node_name" type="unknown" value="1296387328"/>
</parameters>
<inputs>
<port name="data_read[0]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[0]"/>
<port name="data_read[1]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[1]"/>
<port name="data_read[2]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[2]"/>
<port name="data_read[3]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[3]"/>
<port name="data_read[4]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[4]"/>
<port name="data_read[5]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[5]"/>
<port name="data_read[6]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[6]"/>
<port name="data_read[7]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[7]"/>
<port name="data_read[8]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[8]"/>
<port name="data_read[9]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[9]"/>
<port name="data_read[10]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[10]"/>
<port name="data_read[11]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[11]"/>
<port name="data_read[12]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[12]"/>
<port name="data_read[13]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[13]"/>
<port name="data_read[14]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[14]"/>
<port name="data_read[15]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_r624:auto_generated|altsyncram_fpv2:altsyncram1|q_b[15]"/>
<port name="data_read[0]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[0]"/>
<port name="data_read[1]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[1]"/>
<port name="data_read[2]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[2]"/>
<port name="data_read[3]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[3]"/>
<port name="data_read[4]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[4]"/>
<port name="data_read[5]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[5]"/>
<port name="data_read[6]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[6]"/>
<port name="data_read[7]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[7]"/>
<port name="data_read[8]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[8]"/>
<port name="data_read[9]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[9]"/>
<port name="data_read[10]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[10]"/>
<port name="data_read[11]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[11]"/>
<port name="data_read[12]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[12]"/>
<port name="data_read[13]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[13]"/>
<port name="data_read[14]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[14]"/>
<port name="data_read[15]" source="core_top:ic|system:system|SVP:svp|spram:IRAM|spram_sz:spram_sz|altsyncram:altsyncram_component|altsyncram_i624:auto_generated|altsyncram_6pv2:altsyncram1|q_b[15]"/>
<port name="jtag.bp.ic_system_svp_IRAM_spram_sz_altsyncram_component_auto_generated_mgl_prim2_raw_tck" source="jtag.bp.ic_system_svp_IRAM_spram_sz_altsyncram_component_auto_generated_mgl_prim2_raw_tck"/>
<port name="jtag.bp.ic_system_svp_IRAM_spram_sz_altsyncram_component_auto_generated_mgl_prim2_tdi" source="jtag.bp.ic_system_svp_IRAM_spram_sz_altsyncram_component_auto_generated_mgl_prim2_tdi"/>
<port name="jtag.bp.ic_system_svp_IRAM_spram_sz_altsyncram_component_auto_generated_mgl_prim2_usr1" source="jtag.bp.ic_system_svp_IRAM_spram_sz_altsyncram_component_auto_generated_mgl_prim2_usr1"/>
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Binary file modified src/fpga/output_files/ap_core.sof
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Binary file modified src/fpga/output_files/bitstream.rbf_r
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