release: 0.3.2

opengateware · Oct 6, 2022 · 8b7c50e · 8b7c50e
1 parent 0a53e97
commit 8b7c50e
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Showing 7 changed files with 11 additions and 5 deletions.
diff --git a/dist/Cores/ericlewis.Genesis/bitstream.rbf_r b/dist/Cores/ericlewis.Genesis/bitstream.rbf_r
diff --git a/dist/Cores/ericlewis.Genesis/core.json b/dist/Cores/ericlewis.Genesis/core.json
@@ -7,8 +7,8 @@
             "description": "Sega Genesis, known as the Mega Drive outside North America, is a 16-bit fourth-generation home video game console developed and sold by Sega.",
             "author": "ericlewis",
             "url": "https://github.com/ericlewis/openfpga-genesis",
-            "version": "0.3.1",
-            "date_release": "2022-10-04"
+            "version": "0.3.2",
+            "date_release": "2022-10-06"
         },
         "framework": {
             "target_product": "Analogue Pocket",

diff --git a/src/fpga/apf/build_id.mif b/src/fpga/apf/build_id.mif
@@ -10,7 +10,7 @@ CONTENT
 BEGIN
 
    0E0 : 20221005;
-   0E1 : 00143057;
-   0E2 : a6abc622;
+   0E1 : 00210835;
+   0E2 : 17355e54;
 
 END;
diff --git a/src/fpga/core/core_constraints.sdc b/src/fpga/core/core_constraints.sdc
@@ -26,4 +26,10 @@ set_multicycle_path -from {ic|system|data*} -to [get_clocks {ic|mp1|mf_pllbase_i
 set_multicycle_path -from {ic|system|data*} -to [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[0].*|divclk}] -start -hold 1
 
 set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[0].*|divclk}] -to {ic|system|data*} -setup 2
-set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[0].*|divclk}] -to {ic|system|data*} -hold 1
+set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[0].*|divclk}] -to {ic|system|data*} -hold 1
+
+set_multicycle_path -from {ic|system|data*} -to [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -start -setup 2
+set_multicycle_path -from {ic|system|data*} -to [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -start -hold 1
+
+set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -to {ic|system|data*} -setup 2
+set_multicycle_path -from [get_clocks {ic|mp1|mf_pllbase_inst|altera_pll_i|*[1].*|divclk}] -to {ic|system|data*} -hold 1
diff --git a/src/fpga/output_files/ap_core.rbf b/src/fpga/output_files/ap_core.rbf
diff --git a/src/fpga/output_files/ap_core.sof b/src/fpga/output_files/ap_core.sof
diff --git a/src/fpga/output_files/bitstream.rbf_r b/src/fpga/output_files/bitstream.rbf_r