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Relay_Project.production.sdb
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[p GLOBOPT AUTOSTATIC IEEE_FLT IEEE_DBL LFSROK EMI_WORD ]
[d version 1.1 ]
[d edition pro ]
[d chip 18F4620 ]
[d frameptr 4065 ]
"21 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/7_Segment/ecu_seven_segment.c
[e E3028 . `uc
SEGMENT_COMMON_ANODE 0
SEGMENT_COMMON_CATHODE 1
]
"55
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"21 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/Button/ecu_button.c
[e E3028 . `uc
BUTTON_PRESSED 0
BUTTON_RELEASED 1
]
[e E3032 . `uc
BUTTON_ACTIVE_HIGH 0
BUTTON_ACTIVE_LOW 1
]
"45
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"123 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/Chr_LCD/ecu_chr_lcd.c
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"52 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/DC_Motor/ecu_dc_motor.c
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"82 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/KeyPad/ecu_keypad.c
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"30 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/LED/ecu_led.c
[e E2972 . `uc
GPIO_DIRECTION_OUTPUT 0
GPIO_DIRECTION_INPUT 1
]
"53
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"30 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/Relay/ecu_relay.c
[e E2972 . `uc
GPIO_DIRECTION_OUTPUT 0
GPIO_DIRECTION_INPUT 1
]
"53
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"22 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/ecu_layer_init.c
[e E2986 . `uc
PORTA_INDEX 0
PORTB_INDEX 1
PORTC_INDEX 2
PORTD_INDEX 3
PORTE_INDEX 4
]
[e E2976 . `uc
GPIO_PIN0 0
GPIO_PIN1 1
GPIO_PIN2 2
GPIO_PIN3 3
GPIO_PIN4 4
GPIO_PIN5 5
GPIO_PIN6 6
GPIO_PIN7 7
]
[e E2972 . `uc
GPIO_DIRECTION_OUTPUT 0
GPIO_DIRECTION_INPUT 1
]
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"43 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/ADC/hal_adc.c
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
[e E3047 . `uc
ADC_0_TAD 0
ADC_2_TAD 1
ADC_4_TAD 2
ADC_6_TAD 3
ADC_8_TAD 4
ADC_12_TAD 5
ADC_16_TAD 6
ADC_20_TAD 7
]
[e E3057 . `uc
ADC_CONVERSION_CLOCK_FOSC_DIV_2 0
ADC_CONVERSION_CLOCK_FOSC_DIV_8 1
ADC_CONVERSION_CLOCK_FOSC_DIV_32 2
ADC_CONVERSION_CLOCK_FOSC_DIV_FRC 3
ADC_CONVERSION_CLOCK_FOSC_DIV_4 4
ADC_CONVERSION_CLOCK_FOSC_DIV_16 5
ADC_CONVERSION_CLOCK_FOSC_DIV_64 6
]
[e E3032 . `uc
ADC_CHANNEL_AN0 0
ADC_CHANNEL_AN1 1
ADC_CHANNEL_AN2 2
ADC_CHANNEL_AN3 3
ADC_CHANNEL_AN4 4
ADC_CHANNEL_AN5 5
ADC_CHANNEL_AN6 6
ADC_CHANNEL_AN7 7
ADC_CHANNEL_AN8 8
ADC_CHANNEL_AN9 9
ADC_CHANNEL_AN10 10
ADC_CHANNEL_AN11 11
ADC_CHANNEL_AN12 12
]
"73 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/CCP/hal_ccp.c
[e E3037 . `uc
CCP1_INST 0
CCP2_INST 1
]
[e E3032 . `uc
CCP_CAPTURE_MODE_CFG 0
CCP_COMPARE_MODE_CFG 1
CCP_PWM_MODE_CFG 2
]
[e E3041 . `uc
CCP1_CCP2_TIMER3 0
CCP1_TIMER1_CCP2_TIMER3 1
CCP1_CCP2_TIMER1 2
]
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
"49 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/GPIO/hal_gpio.c
[e E2972 . `uc
GPIO_DIRECTION_OUTPUT 0
GPIO_DIRECTION_INPUT 1
]
"88
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"192
[e E2986 . `uc
PORTA_INDEX 0
PORTB_INDEX 1
PORTC_INDEX 2
PORTD_INDEX 3
PORTE_INDEX 4
]
"165 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Interrupt/mcal_external_interrupt.c
[e E3034 . `uc
INTERRUPT_FALLING_EDGE 0
INTERRUPT_RISING_EDGE 1
]
[e E3038 . `uc
INTERRUPT_EXTERNAL_INT0 0
INTERRUPT_EXTERNAL_INT1 1
INTERRUPT_EXTERNAL_INT2 2
]
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
"377
[e E2976 . `uc
GPIO_PIN0 0
GPIO_PIN1 1
GPIO_PIN2 2
GPIO_PIN3 3
GPIO_PIN4 4
GPIO_PIN5 5
GPIO_PIN6 6
GPIO_PIN7 7
]
"67 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Interrupt/mcal_interrupt_manager.c
[e E2968 . `uc
GPIO_LOW 0
GPIO_HIGH 1
]
"52 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer0/hal_timer0.c
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
[e E3032 . `uc
TIMER0_PRRESCALER_DIV_BY_2 0
TIMER0_PRRESCALER_DIV_BY_4 1
TIMER0_PRRESCALER_DIV_BY_8 2
TIMER0_PRRESCALER_DIV_BY_16 3
TIMER0_PRRESCALER_DIV_BY_32 4
TIMER0_PRRESCALER_DIV_BY_64 5
TIMER0_PRRESCALER_DIV_BY_128 6
TIMER0_PRRESCALER_DIV_BY_256 7
]
"40 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer1/hal_timer1.c
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
"34 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer2/hal_timer2.c
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
"40 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer3/hal_timer3.c
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
"57 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/USART/hal_usart.c
[e E3032 . `uc
BAUDRATE_ASYNCHRONOUS_MODE_8BIT_LOW_SPEED 0
BAUDRATE_ASYNCHRONOUS_MODE_8BIT_HIGH_SPEED 1
BAUDRATE_ASYNCHRONOUS_MODE_16BIT_LOW_SPEED 2
BAUDRATE_ASYNCHRONOUS_MODE_16BIT_HIGH_SPEED 3
BAUDRATE_SYNCHRONOUS_MODE_8BIT 4
BAUDRATE_SYNCHRONOUS_MODE_16BIT 5
]
[e E3028 . `uc
INTERRUPT_LOW_PRIORITY 0
INTERRUPT_HIGH_PRIORITY 1
]
"14 D:\Embedded Systems Projects\Git Projects\Relay_Project\application.c
[e E2986 . `uc
PORTA_INDEX 0
PORTB_INDEX 1
PORTC_INDEX 2
PORTD_INDEX 3
PORTE_INDEX 4
]
[e E2976 . `uc
GPIO_PIN0 0
GPIO_PIN1 1
GPIO_PIN2 2
GPIO_PIN3 3
GPIO_PIN4 4
GPIO_PIN5 5
GPIO_PIN6 6
GPIO_PIN7 7
]
"30
[v _main main `(i 1 e 2 0 ]
"51
[v _application_intialize application_intialize `(v 1 e 1 0 ]
"4 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\fleq.c
[v ___fleq __fleq `(b 1 e 0 0 ]
"62 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\float.c
[v ___ftpack __ftpack `(f 1 e 4 0 ]
"43 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\fltol.c
[v ___fltol __fltol `(l 1 e 4 0 ]
"86 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\ftadd.c
[v ___ftadd __ftadd `(f 1 e 4 0 ]
"54 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\ftdiv.c
[v ___ftdiv __ftdiv `(f 1 e 4 0 ]
"62 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\ftmul.c
[v ___ftmul __ftmul `(f 1 e 4 0 ]
"19 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\ftsub.c
[v ___ftsub __ftsub `(f 1 e 4 0 ]
"4 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\memset.c
[v _memset memset `(*.2v 1 e 2 0 ]
"9 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\nf_sprintf.c
[v _sprintf sprintf `(i 1 e 2 0 ]
"10 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\sprcadd.c
[v ___fladd __fladd `(d 1 e 4 0 ]
"245
[v ___flsub __flsub `(d 1 e 4 0 ]
"11 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\sprcdiv.c
[v ___fldiv __fldiv `(d 1 e 4 0 ]
"8 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\sprcmul.c
[v ___flmul __flmul `(d 1 e 4 0 ]
"15 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\Umul32.c
[v ___lmul __lmul `(ul 1 e 4 0 ]
"91 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\Umul64.c
[v ___omul __omul `(uo 1 e 8 0 ]
"10 C:\Program Files\Microchip\xc8\v2.41\pic\sources\c99\common\xxtofl.c
[v ___xxtofl __xxtofl `(d 1 e 4 0 ]
"73 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/Chr_LCD/ecu_chr_lcd.c
[v _lcd_4bit_intialize lcd_4bit_intialize `(uc 1 e 1 0 ]
"114
[v _lcd_4bit_send_command lcd_4bit_send_command `(uc 1 e 1 0 ]
"140
[v _lcd_4bit_send_char_data lcd_4bit_send_char_data `(uc 1 e 1 0 ]
"168
[v _lcd_4bit_send_char_data_pos lcd_4bit_send_char_data_pos `(uc 1 e 1 0 ]
"275
[v _lcd_8bit_intialize lcd_8bit_intialize `(uc 1 e 1 0 ]
"316
[v _lcd_8bit_send_command lcd_8bit_send_command `(uc 1 e 1 0 ]
"345
[v _lcd_8bit_send_char_data lcd_8bit_send_char_data `(uc 1 e 1 0 ]
"375
[v _lcd_8bit_send_char_data_pos lcd_8bit_send_char_data_pos `(uc 1 e 1 0 ]
"398
[v _lcd_8bit_send_string lcd_8bit_send_string `(uc 1 e 1 0 ]
"557
[v _lcd_send_4bits lcd_send_4bits `(uc 1 s 1 lcd_send_4bits ]
"574
[v _lcd_4bit_send_enable_signal lcd_4bit_send_enable_signal `(uc 1 s 1 lcd_4bit_send_enable_signal ]
"590
[v _lcd_8bit_send_enable_signal lcd_8bit_send_enable_signal `(uc 1 s 1 lcd_8bit_send_enable_signal ]
"608
[v _lcd_8bit_set_cursor lcd_8bit_set_cursor `(uc 1 s 1 lcd_8bit_set_cursor ]
"636
[v _lcd_4bit_set_cursor lcd_4bit_set_cursor `(uc 1 s 1 lcd_4bit_set_cursor ]
"21 D:\Embedded Systems Projects\Git Projects\Relay_Project\ECU_Layer/Relay/ecu_relay.c
[v _relay_initialize relay_initialize `(uc 1 e 1 0 ]
"43
[v _relay_turn_on relay_turn_on `(uc 1 e 1 0 ]
"65
[v _relay_turn_off relay_turn_off `(uc 1 e 1 0 ]
"123 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/ADC/hal_adc.c
[v _ADC_SelectChannel ADC_SelectChannel `(uc 1 e 1 0 ]
"147
[v _ADC_StartConversion ADC_StartConversion `(uc 1 e 1 0 ]
"193
[v _ADC_GetConversionResult ADC_GetConversionResult `(uc 1 e 1 0 ]
"278
[v _adc_input_channel_port_config adc_input_channel_port_config `T(v 1 s 1 adc_input_channel_port_config ]
"302
[v _select_result_format select_result_format `T(v 1 s 1 select_result_format ]
"322
[v _configure_voltage_reference configure_voltage_reference `T(v 1 s 1 configure_voltage_reference ]
"341
[v _ADC_ISR ADC_ISR `(v 1 e 1 0 ]
"388 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/CCP/hal_ccp.c
[v _CCP1_ISR CCP1_ISR `(v 1 e 1 0 ]
"401
[v _CCP2_ISR CCP2_ISR `(v 1 e 1 0 ]
"449
[v _CCP_Interrupt_Config CCP_Interrupt_Config `(v 1 s 1 CCP_Interrupt_Config ]
"508
[v _CCP_Mode_Timer_Selection CCP_Mode_Timer_Selection `(v 1 s 1 CCP_Mode_Timer_Selection ]
"539
[v _CCP_Capture_Mode_Config CCP_Capture_Mode_Config `(uc 1 s 1 CCP_Capture_Mode_Config ]
"604
[v _CCP_Compare_Mode_Config CCP_Compare_Mode_Config `(uc 1 s 1 CCP_Compare_Mode_Config ]
"31 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/GPIO/hal_gpio.c
[v _gpio_pin_direction_intialize gpio_pin_direction_intialize `(uc 1 e 1 0 ]
"88
[v _gpio_pin_write_logic gpio_pin_write_logic `(uc 1 e 1 0 ]
"121
[v _gpio_pin_read_logic gpio_pin_read_logic `(uc 1 e 1 0 ]
"144
[v _gpio_pin_toggle_logic gpio_pin_toggle_logic `(uc 1 e 1 0 ]
"167
[v _gpio_pin_intialize gpio_pin_intialize `(uc 1 e 1 0 ]
"357 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/I2C/hal_i2c.c
[v _MSSP_I2C_ISR MSSP_I2C_ISR `(v 1 e 1 0 ]
"372
[v _MSSP_I2C_BC_ISR MSSP_I2C_BC_ISR `(v 1 e 1 0 ]
"387
[v _MSSP_I2C_Mode_GPIO_CFG MSSP_I2C_Mode_GPIO_CFG `T(v 1 s 1 MSSP_I2C_Mode_GPIO_CFG ]
"397
[v _MSSP_I2C_Master_Mode_Clock_Configurations MSSP_I2C_Master_Mode_Clock_Configurations `T(v 1 s 1 MSSP_I2C_Master_Mode_Clock_Configurations ]
"407
[v _MSSP_I2C_Slave_Mode_Configurations MSSP_I2C_Slave_Mode_Configurations `T(v 1 s 1 MSSP_I2C_Slave_Mode_Configurations ]
"416
[v _MSSP_I2C_Interrupt_Configurations MSSP_I2C_Interrupt_Configurations `T(v 1 s 1 MSSP_I2C_Interrupt_Configurations ]
"450
[v _MSSP_I2C_Bus_Collision_Interrupt_Configurations MSSP_I2C_Bus_Collision_Interrupt_Configurations `T(v 1 s 1 MSSP_I2C_Bus_Collision_Interrupt_Configurations ]
"193 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Interrupt/mcal_external_interrupt.c
[v _INT0_ISR INT0_ISR `(v 1 e 1 0 ]
"203
[v _INT1_ISR INT1_ISR `(v 1 e 1 0 ]
"213
[v _INT2_ISR INT2_ISR `(v 1 e 1 0 ]
"224
[v _RB4_ISR RB4_ISR `(v 1 e 1 0 ]
"244
[v _RB5_ISR RB5_ISR `(v 1 e 1 0 ]
"264
[v _RB6_ISR RB6_ISR `(v 1 e 1 0 ]
"284
[v _RB7_ISR RB7_ISR `(v 1 e 1 0 ]
"416
[v _Interrupt_INTx_Enable Interrupt_INTx_Enable `(uc 1 s 1 Interrupt_INTx_Enable ]
"476
[v _Interrupt_INTx_Disable Interrupt_INTx_Disable `(uc 1 s 1 Interrupt_INTx_Disable ]
"550
[v _Interrupt_INTx_Edge_Init Interrupt_INTx_Edge_Init `(uc 1 s 1 Interrupt_INTx_Edge_Init ]
"592
[v _Interrupt_INTx_Pin_Init Interrupt_INTx_Pin_Init `(uc 1 s 1 Interrupt_INTx_Pin_Init ]
"610
[v _Interrupt_INTx_Clear_Flag Interrupt_INTx_Clear_Flag `(uc 1 s 1 Interrupt_INTx_Clear_Flag ]
"645
[v _INT0_SetInterruptHandler INT0_SetInterruptHandler `(uc 1 s 1 INT0_SetInterruptHandler ]
"666
[v _INT1_SetInterruptHandler INT1_SetInterruptHandler `(uc 1 s 1 INT1_SetInterruptHandler ]
"687
[v _INT2_SetInterruptHandler INT2_SetInterruptHandler `(uc 1 s 1 INT2_SetInterruptHandler ]
"709
[v _Interrupt_INTx_SetInterruptHandler Interrupt_INTx_SetInterruptHandler `(uc 1 s 1 Interrupt_INTx_SetInterruptHandler ]
"46 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Interrupt/mcal_interrupt_manager.c
[v _InterruptManager InterruptManager `IIH(v 1 e 1 0 ]
"186 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer0/hal_timer0.c
[v _TMR0_ISR TMR0_ISR `(v 1 e 1 0 ]
"202
[v _Timer0_Prescaler_Config Timer0_Prescaler_Config `T(v 1 s 1 Timer0_Prescaler_Config ]
"221
[v _Timer0_Mode_Selection Timer0_Mode_Selection `T(v 1 s 1 Timer0_Mode_Selection ]
"247
[v _Timer0_Reigster_Size_Config Timer0_Reigster_Size_Config `T(v 1 s 1 Timer0_Reigster_Size_Config ]
"172 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer1/hal_timer1.c
[v _TMR1_ISR TMR1_ISR `(v 1 e 1 0 ]
"188
[v _Timer1_Mode_Selection Timer1_Mode_Selection `T(v 1 s 1 Timer1_Mode_Selection ]
"162 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer2/hal_timer2.c
[v _TMR2_ISR TMR2_ISR `(v 1 e 1 0 ]
"172 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/Timer3/hal_timer3.c
[v _TMR3_ISR TMR3_ISR `(v 1 e 1 0 ]
"188
[v _Timer3_Mode_Selection Timer3_Mode_Selection `T(v 1 s 1 Timer3_Mode_Selection ]
"167 D:\Embedded Systems Projects\Git Projects\Relay_Project\MCAL_Layer/USART/hal_usart.c
[v _USART_Asynchronous_WriteByte_Blocking USART_Asynchronous_WriteByte_Blocking `(uc 1 e 1 0 ]
"229
[v _USART_Baud_Rate_Calculation USART_Baud_Rate_Calculation `(v 1 s 1 USART_Baud_Rate_Calculation ]
"284
[v _USART_ASYNCRONOUS_TX_Init USART_ASYNCRONOUS_TX_Init `(v 1 s 1 USART_ASYNCRONOUS_TX_Init ]
"345
[v _USART_ASYNCRONOUS_RX_Init USART_ASYNCRONOUS_RX_Init `(v 1 s 1 USART_ASYNCRONOUS_RX_Init ]
"409
[v _USART_TX_ISR USART_TX_ISR `(v 1 e 1 0 ]
"423
[v _USART_RX_ISR USART_RX_ISR `(v 1 e 1 0 ]
[s S557 . 1 `uc 1 relay_port 1 0 :4:0
`uc 1 relay_pin 1 0 :3:4
`uc 1 relay_status 1 0 :1:7
]
"14 D:\Embedded Systems Projects\Git Projects\Relay_Project\application.c
[v _relay_1 relay_1 `S557 1 e 1 0 ]
"21
[v _relay_2 relay_2 `S557 1 e 1 0 ]
[s S2076 . 1 `uc 1 TRISC0 1 0 :1:0
`uc 1 TRISC1 1 0 :1:1
`uc 1 TRISC2 1 0 :1:2
`uc 1 TRISC3 1 0 :1:3
`uc 1 TRISC4 1 0 :1:4
`uc 1 TRISC5 1 0 :1:5
`uc 1 TRISC6 1 0 :1:6
`uc 1 TRISC7 1 0 :1:7
]
"1856 C:\Program Files\Microchip\xc8\v2.41\pic\include/proc/pic18f4620.h
[s S2085 . 1 `uc 1 RC0 1 0 :1:0
`uc 1 RC1 1 0 :1:1
`uc 1 RC2 1 0 :1:2
`uc 1 RC3 1 0 :1:3
`uc 1 RC4 1 0 :1:4
`uc 1 RC5 1 0 :1:5
`uc 1 RC6 1 0 :1:6
`uc 1 RC7 1 0 :1:7
]
[u S2094 . 1 `S2076 1 . 1 0 `S2085 1 . 1 0 ]
[v _TRISCbits TRISCbits `VES2094 1 e 1 @3988 ]
[s S1262 . 1 `uc 1 CCP2IE 1 0 :1:0
`uc 1 TMR3IE 1 0 :1:1
`uc 1 HLVDIE 1 0 :1:2
`uc 1 BCLIE 1 0 :1:3
`uc 1 EEIE 1 0 :1:4
`uc 1 . 1 0 :1:5
`uc 1 CMIE 1 0 :1:6
`uc 1 OSCFIE 1 0 :1:7
]
"2749
[s S1271 . 1 `uc 1 . 1 0 :2:0
`uc 1 LVDIE 1 0 :1:2
]
[u S1274 . 1 `S1262 1 . 1 0 `S1271 1 . 1 0 ]
[v _PIE2bits PIE2bits `VES1274 1 e 1 @4000 ]
[s S1320 . 1 `uc 1 CCP2IF 1 0 :1:0
`uc 1 TMR3IF 1 0 :1:1
`uc 1 HLVDIF 1 0 :1:2
`uc 1 BCLIF 1 0 :1:3
`uc 1 EEIF 1 0 :1:4
`uc 1 . 1 0 :1:5
`uc 1 CMIF 1 0 :1:6
`uc 1 OSCFIF 1 0 :1:7
]
"2815
[s S1329 . 1 `uc 1 . 1 0 :2:0
`uc 1 LVDIF 1 0 :1:2
]
[u S1332 . 1 `S1320 1 . 1 0 `S1329 1 . 1 0 ]
[v _PIR2bits PIR2bits `VES1332 1 e 1 @4001 ]
[s S3618 . 1 `uc 1 RX9D 1 0 :1:0
`uc 1 OERR 1 0 :1:1
`uc 1 FERR 1 0 :1:2
`uc 1 ADDEN 1 0 :1:3
`uc 1 CREN 1 0 :1:4
`uc 1 SREN 1 0 :1:5
`uc 1 RX9 1 0 :1:6
`uc 1 SPEN 1 0 :1:7
]
"3061
[s S3627 . 1 `uc 1 . 1 0 :3:0
`uc 1 ADEN 1 0 :1:3
]
[s S3630 . 1 `uc 1 . 1 0 :5:0
`uc 1 SRENA 1 0 :1:5
]
[s S3633 . 1 `uc 1 . 1 0 :6:0
`uc 1 RC8_9 1 0 :1:6
]
[s S3636 . 1 `uc 1 . 1 0 :6:0
`uc 1 RC9 1 0 :1:6
]
[s S3639 . 1 `uc 1 RCD8 1 0 :1:0
]
[u S3641 . 1 `S3618 1 . 1 0 `S3627 1 . 1 0 `S3630 1 . 1 0 `S3633 1 . 1 0 `S3636 1 . 1 0 `S3639 1 . 1 0 ]
[v _RCSTAbits RCSTAbits `VES3641 1 e 1 @4011 ]
[s S3727 . 1 `uc 1 TX9D 1 0 :1:0
`uc 1 TRMT 1 0 :1:1
`uc 1 BRGH 1 0 :1:2
`uc 1 SENDB 1 0 :1:3
`uc 1 SYNC 1 0 :1:4
`uc 1 TXEN 1 0 :1:5
`uc 1 TX9 1 0 :1:6
`uc 1 CSRC 1 0 :1:7
]
"3269
[s S3736 . 1 `uc 1 TX9D1 1 0 :1:0
`uc 1 TRMT1 1 0 :1:1
`uc 1 BRGH1 1 0 :1:2
`uc 1 SENDB1 1 0 :1:3
`uc 1 SYNC1 1 0 :1:4
`uc 1 TXEN1 1 0 :1:5
`uc 1 TX91 1 0 :1:6
`uc 1 CSRC1 1 0 :1:7
]
[s S3745 . 1 `uc 1 . 1 0 :6:0
`uc 1 TX8_9 1 0 :1:6
]
[s S3748 . 1 `uc 1 TXD8 1 0 :1:0
]
[u S3750 . 1 `S3727 1 . 1 0 `S3736 1 . 1 0 `S3745 1 . 1 0 `S3748 1 . 1 0 ]
[v _TXSTAbits TXSTAbits `VES3750 1 e 1 @4012 ]
"3486
[v _TXREG TXREG `VEuc 1 e 1 @4013 ]
"3498
[v _RCREG RCREG `VEuc 1 e 1 @4014 ]
"3510
[v _SPBRG SPBRG `VEuc 1 e 1 @4015 ]
"3522
[v _SPBRGH SPBRGH `VEuc 1 e 1 @4016 ]
[s S1376 . 1 `uc 1 . 1 0 :2:0
`uc 1 NOT_T3SYNC 1 0 :1:2
]
"3566
[s S1379 . 1 `uc 1 TMR3ON 1 0 :1:0
`uc 1 TMR3CS 1 0 :1:1
`uc 1 nT3SYNC 1 0 :1:2
`uc 1 T3CCP1 1 0 :1:3
`uc 1 T3CKPS 1 0 :2:4
`uc 1 T3CCP2 1 0 :1:6
`uc 1 RD16 1 0 :1:7
]
[s S1387 . 1 `uc 1 . 1 0 :2:0
`uc 1 T3SYNC 1 0 :1:2
`uc 1 . 1 0 :1:3
`uc 1 T3CKPS0 1 0 :1:4
`uc 1 T3CKPS1 1 0 :1:5
]
[s S1393 . 1 `uc 1 . 1 0 :3:0
`uc 1 SOSCEN3 1 0 :1:3
`uc 1 . 1 0 :3:4
`uc 1 RD163 1 0 :1:7
]
[s S1398 . 1 `uc 1 . 1 0 :7:0
`uc 1 T3RD16 1 0 :1:7
]
[u S1401 . 1 `S1376 1 . 1 0 `S1379 1 . 1 0 `S1387 1 . 1 0 `S1393 1 . 1 0 `S1398 1 . 1 0 ]
[v _T3CONbits T3CONbits `VES1401 1 e 1 @4017 ]
"3648
[v _TMR3L TMR3L `VEuc 1 e 1 @4018 ]
"3655
[v _TMR3H TMR3H `VEuc 1 e 1 @4019 ]
[s S3797 . 1 `uc 1 ABDEN 1 0 :1:0
`uc 1 WUE 1 0 :1:1
`uc 1 . 1 0 :1:2
`uc 1 BRG16 1 0 :1:3
`uc 1 TXCKP 1 0 :1:4
`uc 1 RXDTP 1 0 :1:5
`uc 1 RCIDL 1 0 :1:6
`uc 1 ABDOVF 1 0 :1:7
]
"4015
[s S3806 . 1 `uc 1 . 1 0 :4:0
`uc 1 SCKP 1 0 :1:4
`uc 1 RXCKP 1 0 :1:5
`uc 1 RCMT 1 0 :1:6
]
[s S3811 . 1 `uc 1 . 1 0 :1:0
`uc 1 W4E 1 0 :1:1
]
[u S3814 . 1 `S3797 1 . 1 0 `S3806 1 . 1 0 `S3811 1 . 1 0 ]
[v _BAUDCONbits BAUDCONbits `VES3814 1 e 1 @4024 ]
[s S1191 . 1 `uc 1 CCP2M 1 0 :4:0
`uc 1 DC2B 1 0 :2:4
]
"4179
[s S1194 . 1 `uc 1 CCP2M0 1 0 :1:0
`uc 1 CCP2M1 1 0 :1:1
`uc 1 CCP2M2 1 0 :1:2
`uc 1 CCP2M3 1 0 :1:3
`uc 1 CCP2Y 1 0 :1:4
`uc 1 CCP2X 1 0 :1:5
]
[s S1201 . 1 `uc 1 . 1 0 :4:0
`uc 1 DC2B0 1 0 :1:4
`uc 1 DC2B1 1 0 :1:5
]
[u S1205 . 1 `S1191 1 . 1 0 `S1194 1 . 1 0 `S1201 1 . 1 0 ]
[v _CCP2CONbits CCP2CONbits `VES1205 1 e 1 @4026 ]
"4241
[v _CCPR2L CCPR2L `VEuc 1 e 1 @4027 ]
"4248
[v _CCPR2H CCPR2H `VEuc 1 e 1 @4028 ]
[s S1152 . 1 `uc 1 CCP1M 1 0 :4:0
`uc 1 DC1B 1 0 :2:4
`uc 1 P1M 1 0 :2:6
]
"4282
[s S1156 . 1 `uc 1 CCP1M0 1 0 :1:0
`uc 1 CCP1M1 1 0 :1:1
`uc 1 CCP1M2 1 0 :1:2
`uc 1 CCP1M3 1 0 :1:3
`uc 1 CCP1Y 1 0 :1:4
`uc 1 CCP1X 1 0 :1:5
`uc 1 P1M0 1 0 :1:6
`uc 1 P1M1 1 0 :1:7
]
[s S1165 . 1 `uc 1 . 1 0 :4:0
`uc 1 DC1B0 1 0 :1:4
`uc 1 DC1B1 1 0 :1:5
]
[u S1169 . 1 `S1152 1 . 1 0 `S1156 1 . 1 0 `S1165 1 . 1 0 ]
[v _CCP1CONbits CCP1CONbits `VES1169 1 e 1 @4029 ]
"4359
[v _CCPR1L CCPR1L `VEuc 1 e 1 @4030 ]
"4366
[v _CCPR1H CCPR1H `VEuc 1 e 1 @4031 ]
[s S1834 . 1 `uc 1 SEN 1 0 :1:0
`uc 1 RSEN 1 0 :1:1
`uc 1 PEN 1 0 :1:2
`uc 1 RCEN 1 0 :1:3
`uc 1 ACKEN 1 0 :1:4
`uc 1 ACKDT 1 0 :1:5
`uc 1 ACKSTAT 1 0 :1:6
`uc 1 GCEN 1 0 :1:7
]
"4686
[u S1843 . 1 `S1834 1 . 1 0 ]
[v _SSPCON2bits SSPCON2bits `VES1843 1 e 1 @4037 ]
[s S1802 . 1 `uc 1 SSPM 1 0 :4:0
`uc 1 CKP 1 0 :1:4
`uc 1 SSPEN 1 0 :1:5
`uc 1 SSPOV 1 0 :1:6
`uc 1 WCOL 1 0 :1:7
]
"4751
[s S1808 . 1 `uc 1 SSPM0 1 0 :1:0
`uc 1 SSPM1 1 0 :1:1
`uc 1 SSPM2 1 0 :1:2
`uc 1 SSPM3 1 0 :1:3
]
[u S1813 . 1 `S1802 1 . 1 0 `S1808 1 . 1 0 ]
[v _SSPCON1bits SSPCON1bits `VES1813 1 e 1 @4038 ]
[s S1867 . 1 `uc 1 . 1 0 :2:0
`uc 1 R_NOT_W 1 0 :1:2
]
"4877
[s S1870 . 1 `uc 1 . 1 0 :5:0
`uc 1 D_NOT_A 1 0 :1:5
]
[s S1873 . 1 `uc 1 BF 1 0 :1:0
`uc 1 UA 1 0 :1:1
`uc 1 R_nW 1 0 :1:2
`uc 1 S 1 0 :1:3
`uc 1 P 1 0 :1:4
`uc 1 D_nA 1 0 :1:5
`uc 1 CKE 1 0 :1:6
`uc 1 SMP 1 0 :1:7
]
[s S1882 . 1 `uc 1 . 1 0 :2:0
`uc 1 R 1 0 :1:2
`uc 1 . 1 0 :2:3
`uc 1 D 1 0 :1:5
]
[s S1887 . 1 `uc 1 . 1 0 :2:0
`uc 1 W 1 0 :1:2
`uc 1 . 1 0 :2:3
`uc 1 A 1 0 :1:5
]
[s S1892 . 1 `uc 1 . 1 0 :2:0
`uc 1 nW 1 0 :1:2
`uc 1 . 1 0 :2:3
`uc 1 nA 1 0 :1:5
]
[s S1897 . 1 `uc 1 . 1 0 :2:0
`uc 1 R_W 1 0 :1:2
`uc 1 . 1 0 :2:3
`uc 1 D_A 1 0 :1:5
]
[s S1902 . 1 `uc 1 . 1 0 :2:0
`uc 1 NOT_WRITE 1 0 :1:2
]
[s S1905 . 1 `uc 1 . 1 0 :5:0
`uc 1 NOT_ADDRESS 1 0 :1:5
]
[s S1908 . 1 `uc 1 . 1 0 :2:0
`uc 1 nWRITE 1 0 :1:2
`uc 1 . 1 0 :2:3
`uc 1 nADDRESS 1 0 :1:5
]
[s S1913 . 1 `uc 1 . 1 0 :2:0
`uc 1 RW 1 0 :1:2
`uc 1 START 1 0 :1:3
`uc 1 STOP 1 0 :1:4
`uc 1 DA 1 0 :1:5
]
[s S1919 . 1 `uc 1 . 1 0 :2:0
`uc 1 NOT_W 1 0 :1:2
`uc 1 . 1 0 :2:3
`uc 1 NOT_A 1 0 :1:5
]
[u S1924 . 1 `S1867 1 . 1 0 `S1870 1 . 1 0 `S1873 1 . 1 0 `S1882 1 . 1 0 `S1887 1 . 1 0 `S1892 1 . 1 0 `S1897 1 . 1 0 `S1902 1 . 1 0 `S1905 1 . 1 0 `S1908 1 . 1 0 `S1913 1 . 1 0 `S1919 1 . 1 0 ]
[v _SSPSTATbits SSPSTATbits `VES1924 1 e 1 @4039 ]
"5022
[v _SSPADD SSPADD `VEuc 1 e 1 @4040 ]
"5029
[v _SSPBUF SSPBUF `VEuc 1 e 1 @4041 ]
[s S3290 . 1 `uc 1 T2CKPS 1 0 :2:0
`uc 1 TMR2ON 1 0 :1:2
`uc 1 TOUTPS 1 0 :4:3
]
"5057
[s S3294 . 1 `uc 1 T2CKPS0 1 0 :1:0
`uc 1 T2CKPS1 1 0 :1:1
`uc 1 . 1 0 :1:2
`uc 1 T2OUTPS0 1 0 :1:3
`uc 1 T2OUTPS1 1 0 :1:4
`uc 1 T2OUTPS2 1 0 :1:5
`uc 1 T2OUTPS3 1 0 :1:6
]
[u S3302 . 1 `S3290 1 . 1 0 `S3294 1 . 1 0 ]
[v _T2CONbits T2CONbits `VES3302 1 e 1 @4042 ]
"5217
[v _TMR2 TMR2 `VEuc 1 e 1 @4044 ]
[s S3104 . 1 `uc 1 . 1 0 :2:0
`uc 1 NOT_T1SYNC 1 0 :1:2
]
"5257
[s S3107 . 1 `uc 1 TMR1ON 1 0 :1:0
`uc 1 TMR1CS 1 0 :1:1
`uc 1 nT1SYNC 1 0 :1:2
`uc 1 T1OSCEN 1 0 :1:3
`uc 1 T1CKPS 1 0 :2:4
`uc 1 T1RUN 1 0 :1:6
`uc 1 RD16 1 0 :1:7
]
[s S3115 . 1 `uc 1 . 1 0 :2:0
`uc 1 T1SYNC 1 0 :1:2
`uc 1 . 1 0 :1:3
`uc 1 T1CKPS0 1 0 :1:4
`uc 1 T1CKPS1 1 0 :1:5
]
[s S3121 . 1 `uc 1 . 1 0 :3:0
`uc 1 SOSCEN 1 0 :1:3
`uc 1 . 1 0 :3:4
`uc 1 T1RD16 1 0 :1:7
]
[u S3126 . 1 `S3104 1 . 1 0 `S3107 1 . 1 0 `S3115 1 . 1 0 `S3121 1 . 1 0 ]
[v _T1CONbits T1CONbits `VES3126 1 e 1 @4045 ]
"5334
[v _TMR1L TMR1L `VEuc 1 e 1 @4046 ]
"5341
[v _TMR1H TMR1H `VEuc 1 e 1 @4047 ]
[s S2939 . 1 `uc 1 T0PS 1 0 :3:0
`uc 1 PSA 1 0 :1:3
`uc 1 T0SE 1 0 :1:4
`uc 1 T0CS 1 0 :1:5
`uc 1 T08BIT 1 0 :1:6
`uc 1 TMR0ON 1 0 :1:7
]
"5878
[s S2946 . 1 `uc 1 T0PS0 1 0 :1:0
`uc 1 T0PS1 1 0 :1:1
`uc 1 T0PS2 1 0 :1:2
`uc 1 . 1 0 :3:3
`uc 1 T016BIT 1 0 :1:6
]
[u S2952 . 1 `S2939 1 . 1 0 `S2946 1 . 1 0 ]
[v _T0CONbits T0CONbits `VES2952 1 e 1 @4053 ]
"5940
[v _TMR0L TMR0L `VEuc 1 e 1 @4054 ]
"5947
[v _TMR0H TMR0H `VEuc 1 e 1 @4055 ]
[s S2709 . 1 `uc 1 RB0 1 0 :1:0
`uc 1 RB1 1 0 :1:1
`uc 1 RB2 1 0 :1:2
`uc 1 RB3 1 0 :1:3
`uc 1 RB4 1 0 :1:4
`uc 1 RB5 1 0 :1:5
`uc 1 RB6 1 0 :1:6
`uc 1 RB7 1 0 :1:7
]
"230 C:\Program Files\Microchip\xc8\v2.41\pic\include\proc/pic18f4620.h
[s S2718 . 1 `uc 1 INT0 1 0 :1:0
`uc 1 INT1 1 0 :1:1
`uc 1 INT2 1 0 :1:2
`uc 1 CCP2 1 0 :1:3
`uc 1 KBI0 1 0 :1:4
`uc 1 KBI1 1 0 :1:5
`uc 1 KBI2 1 0 :1:6
`uc 1 KBI3 1 0 :1:7
]
[s S2727 . 1 `uc 1 AN12 1 0 :1:0
`uc 1 AN10 1 0 :1:1
`uc 1 AN8 1 0 :1:2
`uc 1 AN9 1 0 :1:3
`uc 1 AN11 1 0 :1:4
`uc 1 PGM 1 0 :1:5
`uc 1 PGC 1 0 :1:6
`uc 1 PGD 1 0 :1:7
]
[s S2736 . 1 `uc 1 . 1 0 :3:0
`uc 1 CCP2_PA2 1 0 :1:3
]
[u S2739 . 1 `S2709 1 . 1 0 `S2718 1 . 1 0 `S2727 1 . 1 0 `S2736 1 . 1 0 ]
[v _PORTBbits PORTBbits `VES2739 1 e 1 @3969 ]
"1380
[v _TRISA TRISA `VEuc 1 e 1 @3986 ]
"1602
[v _TRISB TRISB `VEuc 1 e 1 @3987 ]
"2268
[v _TRISE TRISE `VEuc 1 e 1 @3990 ]
[s S834 . 1 `uc 1 TMR1IE 1 0 :1:0
`uc 1 TMR2IE 1 0 :1:1
`uc 1 CCP1IE 1 0 :1:2
`uc 1 SSPIE 1 0 :1:3
`uc 1 TXIE 1 0 :1:4
`uc 1 RCIE 1 0 :1:5
`uc 1 ADIE 1 0 :1:6
`uc 1 PSPIE 1 0 :1:7
]
"2519
[s S843 . 1 `uc 1 . 1 0 :4:0
`uc 1 TX1IE 1 0 :1:4
`uc 1 RC1IE 1 0 :1:5
]
[u S847 . 1 `S834 1 . 1 0 `S843 1 . 1 0 ]
[v _PIE1bits PIE1bits `VES847 1 e 1 @3997 ]
[s S864 . 1 `uc 1 TMR1IF 1 0 :1:0
`uc 1 TMR2IF 1 0 :1:1
`uc 1 CCP1IF 1 0 :1:2
`uc 1 SSPIF 1 0 :1:3
`uc 1 TXIF 1 0 :1:4
`uc 1 RCIF 1 0 :1:5
`uc 1 ADIF 1 0 :1:6
`uc 1 PSPIF 1 0 :1:7
]
"2596
[s S873 . 1 `uc 1 . 1 0 :4:0
`uc 1 TX1IF 1 0 :1:4
`uc 1 RC1IF 1 0 :1:5
]
[u S877 . 1 `S864 1 . 1 0 `S873 1 . 1 0 ]
[v _PIR1bits PIR1bits `VES877 1 e 1 @3998 ]
[s S1629 . 1 `uc 1 RD 1 0 :1:0
`uc 1 WR 1 0 :1:1
`uc 1 WREN 1 0 :1:2
`uc 1 WRERR 1 0 :1:3
`uc 1 FREE 1 0 :1:4
`uc 1 . 1 0 :1:5
`uc 1 CFGS 1 0 :1:6
`uc 1 EEPGD 1 0 :1:7
]
"2947
[s S1638 . 1 `uc 1 . 1 0 :6:0
`uc 1 EEFS 1 0 :1:6
]
[u S1641 . 1 `S1629 1 . 1 0 `S1638 1 . 1 0 ]
[v _EECON1bits EECON1bits `VES1641 1 e 1 @4006 ]
"2992
[v _EECON2 EECON2 `VEuc 1 e 1 @4007 ]
"2999
[v _EEDATA EEDATA `VEuc 1 e 1 @4008 ]
"3006
[v _EEADR EEADR `VEuc 1 e 1 @4009 ]
"3013
[v _EEADRH EEADRH `VEuc 1 e 1 @4010 ]
[s S800 . 1 `uc 1 ADCS 1 0 :3:0
`uc 1 ACQT 1 0 :3:3
`uc 1 . 1 0 :1:6
`uc 1 ADFM 1 0 :1:7
]
"4394
[s S805 . 1 `uc 1 ADCS0 1 0 :1:0
`uc 1 ADCS1 1 0 :1:1
`uc 1 ADCS2 1 0 :1:2
`uc 1 ACQT0 1 0 :1:3
`uc 1 ACQT1 1 0 :1:4
`uc 1 ACQT2 1 0 :1:5
]
[u S812 . 1 `S800 1 . 1 0 `S805 1 . 1 0 ]
[v _ADCON2bits ADCON2bits `VES812 1 e 1 @4032 ]
[s S960 . 1 `uc 1 PCFG 1 0 :4:0
`uc 1 VCFG 1 0 :2:4
]
"4469
[s S963 . 1 `uc 1 PCFG0 1 0 :1:0
`uc 1 PCFG1 1 0 :1:1
`uc 1 PCFG2 1 0 :1:2
`uc 1 PCFG3 1 0 :1:3
`uc 1 VCFG0 1 0 :1:4
`uc 1 VCFG1 1 0 :1:5
]
[s S970 . 1 `uc 1 . 1 0 :3:0
`uc 1 CHSN3 1 0 :1:3
`uc 1 VCFG01 1 0 :1:4
`uc 1 VCFG11 1 0 :1:5
]
[u S975 . 1 `S960 1 . 1 0 `S963 1 . 1 0 `S970 1 . 1 0 ]
[v _ADCON1bits ADCON1bits `VES975 1 e 1 @4033 ]
[s S732 . 1 `uc 1 . 1 0 :1:0
`uc 1 GO_NOT_DONE 1 0 :1:1
]
"4573
[s S735 . 1 `uc 1 ADON 1 0 :1:0
`uc 1 GO_nDONE 1 0 :1:1
`uc 1 CHS 1 0 :4:2
]
[s S739 . 1 `uc 1 . 1 0 :1:0
`uc 1 GO 1 0 :1:1
`uc 1 CHS0 1 0 :1:2
`uc 1 CHS1 1 0 :1:3
`uc 1 CHS2 1 0 :1:4
`uc 1 CHS3 1 0 :1:5
]
[s S746 . 1 `uc 1 . 1 0 :1:0
`uc 1 DONE 1 0 :1:1
]
[s S749 . 1 `uc 1 . 1 0 :1:0
`uc 1 NOT_DONE 1 0 :1:1
]
[s S752 . 1 `uc 1 . 1 0 :1:0
`uc 1 nDONE 1 0 :1:1
]
[s S755 . 1 `uc 1 . 1 0 :1:0
`uc 1 GO_DONE 1 0 :1:1
]
[s S758 . 1 `uc 1 . 1 0 :1:0
`uc 1 GODONE 1 0 :1:1
]
[u S761 . 1 `S732 1 . 1 0 `S735 1 . 1 0 `S739 1 . 1 0 `S746 1 . 1 0 `S749 1 . 1 0 `S752 1 . 1 0 `S755 1 . 1 0 `S758 1 . 1 0 ]
[v _ADCON0bits ADCON0bits `VES761 1 e 1 @4034 ]
"4655
[v _ADRESL ADRESL `VEuc 1 e 1 @4035 ]
"4662
[v _ADRESH ADRESH `VEuc 1 e 1 @4036 ]
[s S2385 . 1 `uc 1 INT1IF 1 0 :1:0
`uc 1 INT2IF 1 0 :1:1
`uc 1 . 1 0 :1:2
`uc 1 INT1IE 1 0 :1:3
`uc 1 INT2IE 1 0 :1:4
`uc 1 . 1 0 :1:5
`uc 1 INT1IP 1 0 :1:6
`uc 1 INT2IP 1 0 :1:7
]
"6239
[s S2394 . 1 `uc 1 INT1F 1 0 :1:0
`uc 1 INT2F 1 0 :1:1
`uc 1 . 1 0 :1:2
`uc 1 INT1E 1 0 :1:3
`uc 1 INT2E 1 0 :1:4
`uc 1 . 1 0 :1:5
`uc 1 INT1P 1 0 :1:6
`uc 1 INT2P 1 0 :1:7
]
[u S2403 . 1 `S2385 1 . 1 0 `S2394 1 . 1 0 ]
[v _INTCON3bits INTCON3bits `VES2403 1 e 1 @4080 ]
[s S2452 . 1 `uc 1 . 1 0 :7:0
`uc 1 NOT_RBPU 1 0 :1:7
]