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FPGA Bitonic Sort

Project to synthesize bitonic sort circuit using Vivado HLS

Requirement

  • Vivado HLS 2019.2

Usage

Build

make -C hls/
make -C proj/

Open hls project

make -C proj/ open

Clean

make -C hls/ clean
make -C proj/ clean

File hieralchy

├── cpp_model  # Used to verify the algorithm
├── hls        # cpp files for Vivado HLS
└── proj       # script files for Vivado HLS project

Reference