Skip to content

Commit

Permalink
QemuQ35Pkg/SmmAccess: Drop S3 and Lock Box support
Browse files Browse the repository at this point in the history
Main change is to compensate for the single MMRAM range used now that
the S3 resume area is removed from MMRAM. A single range is now used
to cover all of TSEG.

Signed-off-by: Michael Kubacki <Michael.kubacki@microsoft.com>
  • Loading branch information
makubacki committed Sep 24, 2024
1 parent b22b4e7 commit 2fad849
Show file tree
Hide file tree
Showing 4 changed files with 12 additions and 59 deletions.
27 changes: 2 additions & 25 deletions Platforms/QemuQ35Pkg/SmmAccess/SmmAccessPei.c
Original file line number Diff line number Diff line change
Expand Up @@ -2,10 +2,8 @@
A PEIM with the following responsibilities:
- verify & configure the Q35 TSEG in the entry point,
- provide SMRAM access by producing PEI_SMM_ACCESS_PPI,
- set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and expose
it via the gEfiAcpiVariableGuid GUID HOB.
- verify & configure the Q35 TSEG in the entry point
- provide SMRAM access by producing PEI_SMM_ACCESS_PPI
This PEIM runs from RAM, so we can write to variables with static storage
duration.
Expand All @@ -17,7 +15,6 @@
**/

#include <Guid/AcpiS3Context.h>
#include <Guid/MmramMemoryReserve.h> // MU_CHANGE: Added support for Standalone MM mode
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
Expand Down Expand Up @@ -248,7 +245,6 @@ SmmAccessPeiEntryPoint (
EFI_STATUS Status;
UINTN SmramMapSize;
EFI_SMRAM_DESCRIPTOR SmramMap[DescIdxCount];
VOID *GuidHob;

//
// This module should only be included if SMRAM support is required.
Expand Down Expand Up @@ -403,31 +399,12 @@ SmmAccessPeiEntryPoint (
}
DEBUG_CODE_END ();

GuidHob = BuildGuidHob (
&gEfiAcpiVariableGuid,
sizeof SmramMap[DescIdxSmmS3ResumeState]
);
if (GuidHob == NULL) {
return EFI_OUT_OF_RESOURCES;
}

CopyMem (
GuidHob,
&SmramMap[DescIdxSmmS3ResumeState],
sizeof SmramMap[DescIdxSmmS3ResumeState]
);

//
// SmramAccessLock() depends on "mQ35SmramAtDefaultSmbase"; init the latter
// just before exposing the former via PEI_SMM_ACCESS_PPI.Lock().
//
InitQ35SmramAtDefaultSmbase ();

//
// We're done. The next step should succeed, but even if it fails, we can't
// roll back the above BuildGuidHob() allocation, because PEI doesn't support
// releasing memory.
//
return PeiServicesInstallPpi (mPpiList);

WrongConfig:
Expand Down
6 changes: 2 additions & 4 deletions Platforms/QemuQ35Pkg/SmmAccess/SmmAccessPei.inf
Original file line number Diff line number Diff line change
@@ -1,10 +1,8 @@
## @file
# A PEIM with the following responsibilities:
#
# - provide SMRAM access by producing PEI_SMM_ACCESS_PPI,
# - verify & configure the Q35 TSEG in the entry point,
# - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and expose
# it via the gEfiAcpiVariableGuid GUIDed HOB.
# - provide SMRAM access by producing PEI_SMM_ACCESS_PPI
# - verify & configure the Q35 TSEG in the entry point
#
# Copyright (C) 2013, 2015, Red Hat, Inc.
#
Expand Down
24 changes: 4 additions & 20 deletions Platforms/QemuQ35Pkg/SmmAccess/SmramInternal.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,6 @@
**/

#include <Guid/AcpiS3Context.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
Expand Down Expand Up @@ -196,18 +195,6 @@ SmramAccessGetCapabilities (
(LockState ? EFI_SMRAM_LOCKED : 0) |
EFI_CACHEABLE;

//
// The first region hosts an SMM_S3_RESUME_STATE object. It is located at the
// start of TSEG. We round up the size to whole pages, and we report it as
// EFI_ALLOCATED, so that the SMM_CORE stays away from it.
//
SmramMap[DescIdxSmmS3ResumeState].PhysicalStart = TsegMemoryBase;
SmramMap[DescIdxSmmS3ResumeState].CpuStart = TsegMemoryBase;
SmramMap[DescIdxSmmS3ResumeState].PhysicalSize =
EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE)));
SmramMap[DescIdxSmmS3ResumeState].RegionState =
CommonRegionState | EFI_ALLOCATED;

//
// Get the TSEG size bits from the ESMRAMC register.
//
Expand All @@ -217,16 +204,13 @@ SmramAccessGetCapabilities (
//
// The second region is the main one, following the first.
//
SmramMap[DescIdxMain].PhysicalStart =
SmramMap[DescIdxSmmS3ResumeState].PhysicalStart +
SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart;
SmramMap[DescIdxMain].PhysicalSize =
SmramMap[DescIdxMain].PhysicalStart = TsegMemoryBase;
SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart;
SmramMap[DescIdxMain].PhysicalSize =
(TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :
TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :
TsegSizeBits == MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB :
mQ35TsegMbytes * SIZE_1MB) -
SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
mQ35TsegMbytes * SIZE_1MB);
SmramMap[DescIdxMain].RegionState = CommonRegionState;

return EFI_SUCCESS;
Expand Down
14 changes: 4 additions & 10 deletions Platforms/QemuQ35Pkg/SmmAccess/SmramInternal.h
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
Functions and types shared by the SMM accessor PEI and DXE modules.
Copyright (C) 2015, Red Hat, Inc.
Copyright (c) Microsoft Corporation
SPDX-License-Identifier: BSD-2-Clause-Patent
Expand All @@ -14,18 +15,11 @@
#include <Pi/PiMultiPhase.h>

//
// We'll have two SMRAM ranges.
//
// The first is a tiny one that hosts an SMM_S3_RESUME_STATE object, to be
// filled in by the CPU SMM driver during normal boot, for the PEI instance of
// the LockBox library (which will rely on the object during S3 resume).
//
// The other SMRAM range is the main one, for the SMM core and the SMM drivers.
// A single MMRAM range is used for both the MM core and MM drivers.
//
typedef enum {
DescIdxSmmS3ResumeState = 0,
DescIdxMain = 1,
DescIdxCount = 2
DescIdxMain = 0,
DescIdxCount = 1
} DESCRIPTOR_INDEX;

//
Expand Down

0 comments on commit 2fad849

Please sign in to comment.