diff --git a/.vscode/settings.json b/.vscode/settings.json
index c0077d3e..8e8238cc 100644
--- a/.vscode/settings.json
+++ b/.vscode/settings.json
@@ -86,7 +86,9 @@
"coroutine": "cpp",
"resumable": "cpp",
"future": "cpp",
- "codecvt": "cpp"
+ "codecvt": "cpp",
+ "complex": "cpp",
+ "queue": "cpp"
},
"docwriter.style": "Doxygen"
}
\ No newline at end of file
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 823a11a1..d1882d50 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -18,7 +18,7 @@ endif()
project(MCUViewer)
-set(MCUVIEWER_VERSION 1.0.1)
+set(MCUVIEWER_VERSION 1.1.0)
set(CMAKE_CXX_STANDARD 20)
set(CMAKE_EXPORT_COMPILE_COMMANDS 1)
@@ -77,7 +77,7 @@ if(UNIX)
find_package(libusb REQUIRED)
find_package(glfw3 REQUIRED)
set(STLINK_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/third_party/stlink/lib/linux/libstlink.a)
- set(JLINK_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/third_party/jlink/lib/linux/libjlinkarm.so.7)
+ set(JLINK_LINUX ${CMAKE_CURRENT_SOURCE_DIR}/third_party/jlink/lib/linux/libjlinkarm.so.8)
set(INSTALL_PATH /usr/local/MCUViewer)
set(LIB_INSTALL_PATH /usr/local/lib)
set(DESKTOP_FILE_PATH /usr/share/applications)
@@ -117,9 +117,8 @@ set(PROJECT_SOURCES
${CMAKE_CURRENT_SOURCE_DIR}/src/Gui/GuiSwoPlots.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/Gui/GuiSwoControl.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/Gui/GuiAbout.cpp
- ${CMAKE_CURRENT_SOURCE_DIR}/src/Gui/GuiImportVariables.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/Gui/GuiAcqusition.cpp
- ${CMAKE_CURRENT_SOURCE_DIR}/src/MemoryReader/MemoryReader.cpp
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/Gui/GuiHelper.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/MemoryReader/StlinkDebugProbe.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/MemoryReader/JlinkDebugProbe.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/Plot/Plot.cpp
@@ -129,14 +128,15 @@ set(PROJECT_SOURCES
${CMAKE_CURRENT_SOURCE_DIR}/src/FileHandler/NFDFileHandler.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/ImguiPlugins/ImguiPlugins.cpp
${CMAKE_CURRENT_SOURCE_DIR}/third_party/stlink/inc/spdlogWrapper.cpp
- ${CMAKE_CURRENT_SOURCE_DIR}/src/PlotHandler/PlotHandlerBase.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/PlotHandler/PlotHandler.cpp
- ${CMAKE_CURRENT_SOURCE_DIR}/src/PlotHandler/TracePlotHandler.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/TraceReader/TraceReader.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/TraceReader/StlinkTraceProbe.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/TraceReader/JlinkTraceProbe.cpp
${CMAKE_CURRENT_SOURCE_DIR}/src/GdbParser/GdbParser.cpp
- ${CMAKE_CURRENT_SOURCE_DIR}/src/CSVStreamer/CSVStreamer.cpp)
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/CSVStreamer/CSVStreamer.cpp
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/VariableHandler/VariableHandler.cpp
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/DataHandler/ViewerDataHandler.cpp
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/DataHandler/TraceDataHandler.cpp)
set(IMGUI_SOURCES
${CMAKE_CURRENT_SOURCE_DIR}/third_party/imgui/imgui.cpp
@@ -201,7 +201,10 @@ target_include_directories(${EXECUTABLE} PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/src/RingBuffer
${CMAKE_CURRENT_SOURCE_DIR}/src/Statistics
${CMAKE_CURRENT_SOURCE_DIR}/src/GdbParser
- ${CMAKE_CURRENT_SOURCE_DIR}/src/CSVStreamer)
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/PlotGroupHandler
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/CSVStreamer
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/VariableHandler
+ ${CMAKE_CURRENT_SOURCE_DIR}/src/DataHandler)
target_include_directories(${EXECUTABLE} SYSTEM PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/third_party/stlink/inc/
diff --git a/README.md b/README.md
index a2fa6bc1..11f38089 100644
--- a/README.md
+++ b/README.md
@@ -35,7 +35,7 @@ TraceViewer is not influenced by optimizations, which means it is a great tool t
All dependencies should be installed and you should be ready to go.
Stlink users:
-- in case your STLink is not detected, please copy the `/launch/udevrules/` folder contents to your `/etc/udev/rules.d/` directory.
+- in case your STLink is not detected, please copy the `launch/install/Unix/udevrules/` folder contents to your `/etc/udev/rules.d/` directory.
### Windows:
1. Download and run the MCUViewer installer from the releases page (right hand side menu of the main repo page).
diff --git a/example/STMViewer_test/.cproject b/example/MCUViewer_test/.cproject
similarity index 60%
rename from example/STMViewer_test/.cproject
rename to example/MCUViewer_test/.cproject
index c5ff2616..01d3b92f 100644
--- a/example/STMViewer_test/.cproject
+++ b/example/MCUViewer_test/.cproject
@@ -1,8 +1,8 @@
-
-
+
+
@@ -14,54 +14,53 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
@@ -110,72 +109,72 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
-
-
-
-
+
+
+
+
+
-
-
+
-
+
-
-
-
-
+
+
+
+
+
-
-
+
-
+
-
-
-
-
+
+
+
+
-
-
-
-
-
-
-
-
+
+
+
+
+
+
+
+
@@ -189,32 +188,23 @@
-
+
-
-
+
-
+
-
+
-
+
-
-
-
-
-
-
-
-
-
+
\ No newline at end of file
diff --git a/example/STMViewer_test/.mxproject b/example/MCUViewer_test/.mxproject
similarity index 100%
rename from example/STMViewer_test/.mxproject
rename to example/MCUViewer_test/.mxproject
index 9551cb1d..81a93b02 100644
--- a/example/STMViewer_test/.mxproject
+++ b/example/MCUViewer_test/.mxproject
@@ -1,11 +1,3 @@
-[PreviousLibFiles]
-LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_def.h;Drivers\STM32G4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ramfunc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ramfunc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_def.h;Drivers\STM32G4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ramfunc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Core\Src\main.c;Core\Src\stm32g4xx_it.c;Core\Src\stm32g4xx_hal_msp.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ramfunc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Core\Src\system_stm32g4xx.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ramfunc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Core\Src\system_stm32g4xx.c;;;
-HeaderPath=Drivers\STM32G4xx_HAL_Driver\Inc;Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32G4xx\Include;Drivers\CMSIS\Include;Core\Inc;
-CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32G474xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
[PreviousGenFiles]
AdvancedFolderStructure=true
HeaderFileListSize=4
@@ -24,3 +16,11 @@ SourceFolderListSize=1
SourcePath#0=..\Core\Src
SourceFiles=;
+[PreviousLibFiles]
+LibFiles=Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_def.h;Drivers\STM32G4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ramfunc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ramfunc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_tim_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_tim.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_dmamux.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_def.h;Drivers\STM32G4xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_rcc_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_bus.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_rcc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_system.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_utils.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_crs.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_flash_ramfunc.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_gpio_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_exti.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_dma_ex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_pwr.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_hal_cortex.h;Drivers\STM32G4xx_HAL_Driver\Inc\stm32g4xx_ll_cortex.h;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g474xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Include\system_stm32g4xx.h;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_armclang_ltm.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv81mml.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm35p.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core\Src\main.c;Core\Src\stm32g4xx_it.c;Core\Src\stm32g4xx_hal_msp.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ramfunc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Core\Src\system_stm32g4xx.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_utils.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_tim_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_tim.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_ll_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_flash_ramfunc.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_exti.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c;Drivers\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c;Drivers\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c;Core\Src\system_stm32g4xx.c;;;
+HeaderPath=Drivers\STM32G4xx_HAL_Driver\Inc;Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32G4xx\Include;Drivers\CMSIS\Include;Core\Inc;
+CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32G474xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
diff --git a/example/STMViewer_test/.project b/example/MCUViewer_test/.project
similarity index 100%
rename from example/STMViewer_test/.project
rename to example/MCUViewer_test/.project
diff --git a/example/STMViewer_test/.settings/language.settings.xml b/example/MCUViewer_test/.settings/language.settings.xml
similarity index 84%
rename from example/STMViewer_test/.settings/language.settings.xml
rename to example/MCUViewer_test/.settings/language.settings.xml
index 6ed46a79..bb15eea2 100644
--- a/example/STMViewer_test/.settings/language.settings.xml
+++ b/example/MCUViewer_test/.settings/language.settings.xml
@@ -1,22 +1,22 @@
-
+
-
+
-
+
-
+
diff --git a/example/MCUViewer_test/.settings/stm32cubeide.project.prefs b/example/MCUViewer_test/.settings/stm32cubeide.project.prefs
new file mode 100644
index 00000000..2d4fe951
--- /dev/null
+++ b/example/MCUViewer_test/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,5 @@
+635E684B79701B039C64EA45C3F84D30=9AB01335C7D9AD93FC9CCF6DC64E7459
+66BE74F758C12D739921AEA421D593D3=0
+8DF89ED150041C4CBC7CB9A9CAA90856=4055E183FFA96263B32827A7F84797DE
+DC22A860405A8BF2F2C095E5B6529F12=4055E183FFA96263B32827A7F84797DE
+eclipse.preferences.version=1
diff --git a/example/STMViewer_test/Core/App/main.cpp b/example/MCUViewer_test/Core/App/main.cpp
similarity index 58%
rename from example/STMViewer_test/Core/App/main.cpp
rename to example/MCUViewer_test/Core/App/main.cpp
index 19489207..fe46c4d9 100644
--- a/example/STMViewer_test/Core/App/main.cpp
+++ b/example/MCUViewer_test/Core/App/main.cpp
@@ -9,11 +9,24 @@
#include "stm32g4xx_ll_gpio.h"
#include "testClass.hpp"
#include "testClass2.hpp"
+#include
TestClass test;
TemplateTest templateTest;
volatile float sinTest = 0.0f;
volatile float cosTest = 0.0f;
+volatile float LissajousX = 0.0f;
+volatile float LissajousY1 = 0.0f;
+volatile float LissajousY2 = 0.0f;
+volatile float LissajousY3 = 0.0f;
+
+volatile float roseX = 0.0f;
+volatile float roseY = 0.0f;
+
+volatile float smallRoseX = 0.0f;
+volatile float smallRoseY = 0.0f;
+
+volatile float petalsNumber = 8.0f;
void maincpp()
{
@@ -35,7 +48,17 @@ void maincpp()
{
sinTest = test.getSin(x);
cosTest = test.getCos(x);
- x += 0.001f;
+ LissajousX = test.getLissajousX(x);
+ LissajousY1 = test.getLissajousY1(x);
+ LissajousY2 = test.getLissajousY2(x);
+ LissajousY3 = test.getLissajousY3(x);
+
+ float r = cosf(petalsNumber / 2.0f * x);
+ roseX = r * cosf(x);
+ roseY = r * sinf(x);
+ smallRoseY = 0.4f * r * sinf(x);
+
+ x += 0.01f;
if (x > 6.28f)
{
diff --git a/example/STMViewer_test/Core/App/main.hpp b/example/MCUViewer_test/Core/App/main.hpp
similarity index 100%
rename from example/STMViewer_test/Core/App/main.hpp
rename to example/MCUViewer_test/Core/App/main.hpp
diff --git a/example/STMViewer_test/Core/App/testClass.cpp b/example/MCUViewer_test/Core/App/testClass.cpp
similarity index 66%
rename from example/STMViewer_test/Core/App/testClass.cpp
rename to example/MCUViewer_test/Core/App/testClass.cpp
index c2f64b2c..0ab1243b 100644
--- a/example/STMViewer_test/Core/App/testClass.cpp
+++ b/example/MCUViewer_test/Core/App/testClass.cpp
@@ -19,9 +19,29 @@ float TestClass::getCos(float x)
return cosf(x);
}
+float TestClass::getLissajousX(float x)
+{
+ return sinf(x);
+}
+
+float TestClass::getLissajousY1(float x)
+{
+ return sinf(4.0f * x);
+}
+
+float TestClass::getLissajousY2(float x)
+{
+ return sinf(7.0f * x);
+}
+
+float TestClass::getLissajousY3(float x)
+{
+ return sinf(15.0f * x);
+}
+
void TestClass::spin()
{
- x += 0.0001f;
+ x += 0.02f;
if(x > 2.0f*M_PI)
{
diff --git a/example/STMViewer_test/Core/App/testClass.hpp b/example/MCUViewer_test/Core/App/testClass.hpp
similarity index 84%
rename from example/STMViewer_test/Core/App/testClass.hpp
rename to example/MCUViewer_test/Core/App/testClass.hpp
index 1634a57e..0f524180 100644
--- a/example/STMViewer_test/Core/App/testClass.hpp
+++ b/example/MCUViewer_test/Core/App/testClass.hpp
@@ -16,6 +16,10 @@ class TestClass
float getSin(float x);
float getCos(float x);
+ float getLissajousX(float x);
+ float getLissajousY1(float x);
+ float getLissajousY2(float x);
+ float getLissajousY3(float x);
void spin();
struct __attribute__((packed, aligned(1))) StructA
@@ -34,7 +38,7 @@ class TestClass
private:
volatile float triangle = 0.0f;
- volatile float triangleFrequency = 1.0f;
+ volatile float triangleFrequency = 0.01f;
volatile float a,b,c;
volatile float x, dir = 1.0f;
volatile int8_t tri = 0;
diff --git a/example/STMViewer_test/Core/App/testClass2.hpp b/example/MCUViewer_test/Core/App/testClass2.hpp
similarity index 100%
rename from example/STMViewer_test/Core/App/testClass2.hpp
rename to example/MCUViewer_test/Core/App/testClass2.hpp
diff --git a/example/STMViewer_test/Core/Inc/main.h b/example/MCUViewer_test/Core/Inc/main.h
similarity index 98%
rename from example/STMViewer_test/Core/Inc/main.h
rename to example/MCUViewer_test/Core/Inc/main.h
index fba8c0cd..29654154 100644
--- a/example/STMViewer_test/Core/Inc/main.h
+++ b/example/MCUViewer_test/Core/Inc/main.h
@@ -7,7 +7,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2023 STMicroelectronics.
+ * Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
diff --git a/example/STMViewer_test/Core/Inc/stm32_assert.h b/example/MCUViewer_test/Core/Inc/stm32_assert.h
similarity index 100%
rename from example/STMViewer_test/Core/Inc/stm32_assert.h
rename to example/MCUViewer_test/Core/Inc/stm32_assert.h
diff --git a/example/STMViewer_test/Core/Inc/stm32g4xx_hal_conf.h b/example/MCUViewer_test/Core/Inc/stm32g4xx_hal_conf.h
similarity index 100%
rename from example/STMViewer_test/Core/Inc/stm32g4xx_hal_conf.h
rename to example/MCUViewer_test/Core/Inc/stm32g4xx_hal_conf.h
diff --git a/example/STMViewer_test/Core/Inc/stm32g4xx_it.h b/example/MCUViewer_test/Core/Inc/stm32g4xx_it.h
similarity index 97%
rename from example/STMViewer_test/Core/Inc/stm32g4xx_it.h
rename to example/MCUViewer_test/Core/Inc/stm32g4xx_it.h
index 94f68d02..8a52d212 100644
--- a/example/STMViewer_test/Core/Inc/stm32g4xx_it.h
+++ b/example/MCUViewer_test/Core/Inc/stm32g4xx_it.h
@@ -6,7 +6,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2023 STMicroelectronics.
+ * Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
diff --git a/example/STMViewer_test/Core/Src/main.c b/example/MCUViewer_test/Core/Src/main.c
similarity index 99%
rename from example/STMViewer_test/Core/Src/main.c
rename to example/MCUViewer_test/Core/Src/main.c
index 2484c654..8b5c0c81 100644
--- a/example/STMViewer_test/Core/Src/main.c
+++ b/example/MCUViewer_test/Core/Src/main.c
@@ -6,7 +6,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2023 STMicroelectronics.
+ * Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
@@ -21,6 +21,7 @@
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
+
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
diff --git a/example/STMViewer_test/Core/Src/stm32g4xx_hal_msp.c b/example/MCUViewer_test/Core/Src/stm32g4xx_hal_msp.c
similarity index 97%
rename from example/STMViewer_test/Core/Src/stm32g4xx_hal_msp.c
rename to example/MCUViewer_test/Core/Src/stm32g4xx_hal_msp.c
index 2699db3a..b64f5bf1 100644
--- a/example/STMViewer_test/Core/Src/stm32g4xx_hal_msp.c
+++ b/example/MCUViewer_test/Core/Src/stm32g4xx_hal_msp.c
@@ -7,7 +7,7 @@
******************************************************************************
* @attention
*
- * Copyright (c) 2023 STMicroelectronics.
+ * Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
diff --git a/example/STMViewer_test/Core/Src/stm32g4xx_it.c b/example/MCUViewer_test/Core/Src/stm32g4xx_it.c
similarity index 100%
rename from example/STMViewer_test/Core/Src/stm32g4xx_it.c
rename to example/MCUViewer_test/Core/Src/stm32g4xx_it.c
diff --git a/example/STMViewer_test/Core/Src/syscalls.c b/example/MCUViewer_test/Core/Src/syscalls.c
similarity index 100%
rename from example/STMViewer_test/Core/Src/syscalls.c
rename to example/MCUViewer_test/Core/Src/syscalls.c
diff --git a/example/STMViewer_test/Core/Src/sysmem.c b/example/MCUViewer_test/Core/Src/sysmem.c
similarity index 100%
rename from example/STMViewer_test/Core/Src/sysmem.c
rename to example/MCUViewer_test/Core/Src/sysmem.c
diff --git a/example/STMViewer_test/Core/Src/system_stm32g4xx.c b/example/MCUViewer_test/Core/Src/system_stm32g4xx.c
similarity index 100%
rename from example/STMViewer_test/Core/Src/system_stm32g4xx.c
rename to example/MCUViewer_test/Core/Src/system_stm32g4xx.c
diff --git a/example/STMViewer_test/Core/Startup/startup_stm32g474ccux.s b/example/MCUViewer_test/Core/Startup/startup_stm32g474ccux.s
similarity index 99%
rename from example/STMViewer_test/Core/Startup/startup_stm32g474ccux.s
rename to example/MCUViewer_test/Core/Startup/startup_stm32g474ccux.s
index a6add31b..e7a2c61f 100644
--- a/example/STMViewer_test/Core/Startup/startup_stm32g474ccux.s
+++ b/example/MCUViewer_test/Core/Startup/startup_stm32g474ccux.s
@@ -62,6 +62,9 @@ Reset_Handler:
ldr r0, =_estack
mov sp, r0 /* set stack pointer */
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
ldr r1, =_edata
@@ -93,8 +96,6 @@ LoopFillZerobss:
cmp r2, r4
bcc FillZerobss
-/* Call the clock system intitialization function.*/
- bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
@@ -127,7 +128,6 @@ Infinite_Loop:
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
- .size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
@@ -250,6 +250,8 @@ g_pfnVectors:
.word CORDIC_IRQHandler
.word FMAC_IRQHandler
+ .size g_pfnVectors, .-g_pfnVectors
+
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
diff --git a/example/STMViewer_test/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h b/example/MCUViewer_test/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h
similarity index 99%
rename from example/STMViewer_test/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h
rename to example/MCUViewer_test/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h
index e32fb9e6..1899d0a5 100644
--- a/example/STMViewer_test/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h
+++ b/example/MCUViewer_test/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h
@@ -804,8 +804,7 @@ typedef struct
typedef struct
{
- __IO uint32_t GCR; /*!< SAI global configuration register, Address offset: 0x00 */
- uint32_t RESERVED[16]; /*!< Reserved, Address offset: 0x04 to 0x40 */
+ uint32_t RESERVED[17]; /*!< Reserved, Address offset: 0x00 to 0x40 */
__IO uint32_t PDMCR; /*!< SAI PDM control register, Address offset: 0x44 */
__IO uint32_t PDMDLY; /*!< SAI PDM delay register, Address offset: 0x48 */
} SAI_TypeDef;
@@ -1026,7 +1025,7 @@ typedef struct
{
__IO uint32_t MCR; /*!< HRTIM Master Timer control register, Address offset: 0x00 */
__IO uint32_t MISR; /*!< HRTIM Master Timer interrupt status register, Address offset: 0x04 */
- __IO uint32_t MICR; /*!< HRTIM Master Timer interupt clear register, Address offset: 0x08 */
+ __IO uint32_t MICR; /*!< HRTIM Master Timer interrupt clear register, Address offset: 0x08 */
__IO uint32_t MDIER; /*!< HRTIM Master Timer DMA/interrupt enable register Address offset: 0x0C */
__IO uint32_t MCNTR; /*!< HRTIM Master Timer counter register, Address offset: 0x10 */
__IO uint32_t MPER; /*!< HRTIM Master Timer period register, Address offset: 0x14 */
@@ -1515,7 +1514,7 @@ typedef struct {
/******************************************************************************/
/*
- * @brief Specific device feature definitions (not present on all devices in the STM32G4 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32G4 series)
*/
#define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */
@@ -1661,7 +1660,7 @@ typedef struct {
#define ADC_CFGR_AUTDLY ADC_CFGR_AUTDLY_Msk /*!< ADC low power auto wait */
#define ADC_CFGR_ALIGN_Pos (15U)
#define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00008000 */
-#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */
+#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */
#define ADC_CFGR_DISCEN_Pos (16U)
#define ADC_CFGR_DISCEN_Msk (0x1UL << ADC_CFGR_DISCEN_Pos) /*!< 0x00010000 */
#define ADC_CFGR_DISCEN ADC_CFGR_DISCEN_Msk /*!< ADC group regular sequencer discontinuous mode */
@@ -4513,7 +4512,7 @@ typedef struct {
/***************** Bit definition for FDCAN_ENDN register *******************/
#define FDCAN_ENDN_ETV_Pos (0U)
#define FDCAN_ENDN_ETV_Msk (0xFFFFFFFFUL << FDCAN_ENDN_ETV_Pos) /*!< 0xFFFFFFFF */
-#define FDCAN_ENDN_ETV FDCAN_ENDN_ETV_Msk /*!> 1)
-#define FLASH_PAGE_NB 128U
+#define FLASH_PAGE_NB ((FLASH_SIZE == 0x00080000U) ? 128U : \
+ ((FLASH_SIZE == 0x00040000U) ? 64U : 32U))
#define FLASH_PAGE_SIZE_128_BITS 0x1000U /* 4 KB */
#else
#define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFFU)) ? (0x80UL << 10U) : \
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h
similarity index 99%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h
index 5ee980c3..c8f07735 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h
@@ -1042,7 +1042,7 @@ typedef struct
#define __HAL_RCC_RTCAPB_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN);
-#define __HAL_RCC_WWDG_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDG2EN)
+#define __HAL_RCC_WWDG_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN)
#define __HAL_RCC_SPI2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN)
@@ -3107,7 +3107,7 @@ typedef struct
* @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled
* @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source
- * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee
+ * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_PLLCLK Main PLL clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h
similarity index 99%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h
index b2e8c254..6cebf277 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h
@@ -515,7 +515,7 @@ typedef struct
/** @defgroup RCCEx_CRS_HSI48CalibrationDefault RCCEx CRS HSI48CalibrationDefault
* @{
*/
-#define RCC_CRS_HSI48CALIBRATION_DEFAULT 0x00000020U /*!< The default value is 32, which corresponds to the middle of the trimming interval.
+#define RCC_CRS_HSI48CALIBRATION_DEFAULT 0x00000040U /*!< The default value is 64, which corresponds to the middle of the trimming interval.
The trimming step is around 67 kHz between two consecutive TRIM steps. A higher TRIM value
corresponds to a higher output frequency */
/**
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h
similarity index 95%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h
index 3f46616e..034b6ad4 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h
@@ -416,29 +416,28 @@ typedef struct
*/
typedef enum
{
- HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */
- , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */
- , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */
- , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */
- , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */
- , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */
- , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */
- , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */
- , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */
- , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */
- , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */
- , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */
- , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */
- , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */
+ HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */
+ , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */
+ , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */
+ , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */
+ , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */
+ , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */
+ , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */
+ , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */
+ , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */
+ , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */
+ , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */
+ , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */
+ , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */
+ , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */
, HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU /*!< TIM Period Elapsed Callback ID */
, HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */
, HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */
, HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */
-
, HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */
, HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */
, HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */
- , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */
+ , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */
, HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U /*!< TIM PWM Pulse Finished half complete Callback ID */
, HAL_TIM_ERROR_CB_ID = 0x17U /*!< TIM Error Callback ID */
, HAL_TIM_COMMUTATION_CB_ID = 0x18U /*!< TIM Commutation Callback ID */
@@ -781,6 +780,15 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
* @}
*/
+/** @defgroup TIM_CC_DMA_Request CCx DMA request selection
+ * @{
+ */
+#define TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when capture or compare match event occurs */
+#define TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when update event occurs */
+/**
+ * @}
+ */
+
/** @defgroup TIM_Flag_definition TIM Flag Definition
* @{
*/
@@ -825,16 +833,16 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
/** @defgroup TIM_Clock_Source TIM Clock Source
* @{
*/
-#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
#define TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 /*!< Internal clock source */
+#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
+#define TIM_CLOCKSOURCE_ETRMODE2 TIM_SMCR_ETPS_1 /*!< External clock source mode 2 */
+#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
+#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
+#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
#define TIM_CLOCKSOURCE_ITR0 TIM_TS_ITR0 /*!< External clock source mode 1 (ITR0) */
#define TIM_CLOCKSOURCE_ITR1 TIM_TS_ITR1 /*!< External clock source mode 1 (ITR1) */
#define TIM_CLOCKSOURCE_ITR2 TIM_TS_ITR2 /*!< External clock source mode 1 (ITR2) */
#define TIM_CLOCKSOURCE_ITR3 TIM_TS_ITR3 /*!< External clock source mode 1 (ITR3) */
-#define TIM_CLOCKSOURCE_TI1ED TIM_TS_TI1F_ED /*!< External clock source mode 1 (TTI1FP1 + edge detect.) */
-#define TIM_CLOCKSOURCE_TI1 TIM_TS_TI1FP1 /*!< External clock source mode 1 (TTI1FP1) */
-#define TIM_CLOCKSOURCE_TI2 TIM_TS_TI2FP2 /*!< External clock source mode 1 (TTI2FP2) */
-#define TIM_CLOCKSOURCE_ETRMODE1 TIM_TS_ETRF /*!< External clock source mode 1 (ETRF) */
#if defined (TIM5)
#define TIM_CLOCKSOURCE_ITR4 TIM_TS_ITR4 /*!< External clock source mode 1 (ITR4) */
#endif /* TIM5 */
@@ -1073,8 +1081,8 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
#define TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) /*!< Retrigerrable OPM mode 2 */
#define TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) /*!< Combined PWM mode 1 */
#define TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) /*!< Combined PWM mode 2 */
-#define TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) /*!< Asymmetric PWM mode 1 */
-#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_CCMR1_OC1M /*!< Asymmetric PWM mode 2 */
+#define TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) /*!< Asymmetric PWM mode 1 */
+#define TIM_OCMODE_ASYMMETRIC_PWM2 TIM_CCMR1_OC1M /*!< Asymmetric PWM mode 2 */
#define TIM_OCMODE_PULSE_ON_COMPARE (TIM_CCMR2_OC3M_3 | TIM_CCMR2_OC3M_1) /*!< Pulse on compare (CH3&CH4 only) */
#define TIM_OCMODE_DIRECTION_OUTPUT (TIM_CCMR2_OC3M_3 | TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0) /*!< Direction output (CH3&CH4 only) */
/**
@@ -1088,10 +1096,6 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
#define TIM_TS_ITR1 TIM_SMCR_TS_0 /*!< Internal Trigger 1 (ITR1) */
#define TIM_TS_ITR2 TIM_SMCR_TS_1 /*!< Internal Trigger 2 (ITR2) */
#define TIM_TS_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) /*!< Internal Trigger 3 (ITR3) */
-#define TIM_TS_TI1F_ED TIM_SMCR_TS_2 /*!< TI1 Edge Detector (TI1F_ED) */
-#define TIM_TS_TI1FP1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2) /*!< Filtered Timer Input 1 (TI1FP1) */
-#define TIM_TS_TI2FP2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2) /*!< Filtered Timer Input 2 (TI2FP2) */
-#define TIM_TS_ETRF (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2) /*!< Filtered External Trigger input (ETRF) */
#if defined (TIM5)
#define TIM_TS_ITR4 TIM_SMCR_TS_3 /*!< Internal Trigger 4 (ITR9) */
#endif /* TIM5 */
@@ -1104,7 +1108,11 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
#endif /* TIM20 */
#define TIM_TS_ITR10 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3) /*!< Internal Trigger 10 (ITR10) */
#define TIM_TS_ITR11 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2 | TIM_SMCR_TS_3) /*!< Internal Trigger 11 (ITR11) */
-#define TIM_TS_NONE 0xFFFFFFFFU /*!< No trigger selected */
+#define TIM_TS_TI1F_ED TIM_SMCR_TS_2 /*!< TI1 Edge Detector (TI1F_ED) */
+#define TIM_TS_TI1FP1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2) /*!< Filtered Timer Input 1 (TI1FP1) */
+#define TIM_TS_TI2FP2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2) /*!< Filtered Timer Input 2 (TI2FP2) */
+#define TIM_TS_ETRF (TIM_SMCR_TS_0 | TIM_SMCR_TS_1 | TIM_SMCR_TS_2) /*!< Filtered External Trigger input (ETRF) */
+#define TIM_TS_NONE 0x0000FFFFU /*!< No trigger selected */
/**
* @}
*/
@@ -1825,6 +1833,17 @@ mode.
TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
}while(0)
+/** @brief Select the Capture/compare DMA request source.
+ * @param __HANDLE__ specifies the TIM Handle.
+ * @param __CCDMA__ specifies Capture/compare DMA request source
+ * This parameter can be one of the following values:
+ * @arg TIM_CCDMAREQUEST_CC: CCx DMA request generated on Capture/Compare event
+ * @arg TIM_CCDMAREQUEST_UPDATE: CCx DMA request generated on Update event
+ * @retval None
+ */
+#define __HAL_TIM_SELECT_CCDMAREQUEST(__HANDLE__, __CCDMA__) \
+ MODIFY_REG((__HANDLE__)->Instance->CR2, TIM_CR2_CCDS, (__CCDMA__))
+
/**
* @}
*/
@@ -1903,7 +1922,7 @@ mode.
((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
#define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \
- ((__MODE__) == TIM_UIFREMAP_ENALE))
+ ((__MODE__) == TIM_UIFREMAP_ENABLE))
#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \
((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \
@@ -1943,6 +1962,10 @@ mode.
((__PRESCALER__) == TIM_ICPSC_DIV4) || \
((__PRESCALER__) == TIM_ICPSC_DIV8))
+#define IS_TIM_CCX_CHANNEL(__INSTANCE__, __CHANNEL__) (IS_TIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) && \
+ ((__CHANNEL__) != (TIM_CHANNEL_5)) && \
+ ((__CHANNEL__) != (TIM_CHANNEL_6)))
+
#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \
((__MODE__) == TIM_OPMODE_REPETITIVE))
@@ -1969,6 +1992,10 @@ mode.
#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2))
+#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? \
+ (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : \
+ ((__PERIOD__) > 0U))
+
#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2) || \
((__CHANNEL__) == TIM_CHANNEL_3) || \
@@ -1976,15 +2003,15 @@ mode.
#if defined(TIM5) && defined(TIM20)
#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -1995,15 +2022,15 @@ mode.
((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))
#elif defined(TIM5)
#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -2012,15 +2039,15 @@ mode.
((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))
#elif defined(TIM20)
#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -2029,15 +2056,15 @@ mode.
((__CLOCK__) == TIM_CLOCKSOURCE_ITR11))
#else
#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -2081,7 +2108,6 @@ mode.
#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL)
-
#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
((__STATE__) == TIM_BREAK_DISABLE))
@@ -2150,8 +2176,8 @@ mode.
((__MODE__) == TIM_OCMODE_PWM2) || \
((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \
((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \
- ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
- ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2))
+ ((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM1) || \
+ ((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM2))
#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \
((__MODE__) == TIM_OCMODE_ACTIVE) || \
@@ -2164,59 +2190,6 @@ mode.
((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || \
((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE))
-#if defined (TIM5) && defined(TIM20)
-
-#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_ITR4) || \
- ((__SELECTION__) == TIM_TS_ITR5) || \
- ((__SELECTION__) == TIM_TS_ITR6) || \
- ((__SELECTION__) == TIM_TS_ITR7) || \
- ((__SELECTION__) == TIM_TS_ITR8) || \
- ((__SELECTION__) == TIM_TS_ITR9) || \
- ((__SELECTION__) == TIM_TS_ITR10)|| \
- ((__SELECTION__) == TIM_TS_ITR11)|| \
- ((__SELECTION__) == TIM_TS_NONE))
-#elif defined (TIM5)
-#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_ITR4) || \
- ((__SELECTION__) == TIM_TS_ITR5) || \
- ((__SELECTION__) == TIM_TS_ITR6) || \
- ((__SELECTION__) == TIM_TS_ITR7) || \
- ((__SELECTION__) == TIM_TS_ITR8) || \
- ((__SELECTION__) == TIM_TS_ITR10)|| \
- ((__SELECTION__) == TIM_TS_ITR11)|| \
- ((__SELECTION__) == TIM_TS_NONE))
-#elif defined (TIM20)
-#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_ITR5) || \
- ((__SELECTION__) == TIM_TS_ITR6) || \
- ((__SELECTION__) == TIM_TS_ITR7) || \
- ((__SELECTION__) == TIM_TS_ITR8) || \
- ((__SELECTION__) == TIM_TS_ITR9) || \
- ((__SELECTION__) == TIM_TS_ITR11)|| \
- ((__SELECTION__) == TIM_TS_NONE))
-#else
-#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_ITR5) || \
- ((__SELECTION__) == TIM_TS_ITR6) || \
- ((__SELECTION__) == TIM_TS_ITR7) || \
- ((__SELECTION__) == TIM_TS_ITR8) || \
- ((__SELECTION__) == TIM_TS_ITR11)|| \
- ((__SELECTION__) == TIM_TS_NONE))
-#endif /* TIM5 && TIM20 */
-
#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \
((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \
((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \
@@ -2381,7 +2354,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
/**
* @}
@@ -2403,7 +2376,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length);
HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
@@ -2425,7 +2399,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length);
HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
@@ -2477,7 +2452,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
* @{
*/
/* Timer Encoder functions ****************************************************/
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig);
+HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
@@ -2510,21 +2485,26 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
* @{
*/
/* Control functions *********************************************************/
-HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel);
+HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig,
+ uint32_t Channel);
+HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig,
+ uint32_t Channel);
+HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig,
+ uint32_t Channel);
HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig,
uint32_t OutputChannel, uint32_t InputChannel);
-HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef *sClearInputConfig,
+HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
+ const TIM_ClearInputConfigTypeDef *sClearInputConfig,
uint32_t Channel);
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig);
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig);
HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
+HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
+HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength);
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
+ uint32_t BurstLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
@@ -2534,7 +2514,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3
uint32_t BurstLength, uint32_t DataLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
+uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
*/
@@ -2571,17 +2551,17 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
* @{
*/
/* Peripheral State functions ************************************************/
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim);
/* Peripheral Channel state functions ************************************************/
-HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim);
-HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, uint32_t Channel);
-HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim);
+HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim);
+HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel);
+HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim);
/**
* @}
*/
@@ -2595,9 +2575,9 @@ HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim);
/** @defgroup TIM_Private_Functions TIM Private Functions
* @{
*/
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure);
void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
+void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h
similarity index 91%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h
index 4fdd4300..339387f5 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h
@@ -104,153 +104,153 @@ typedef struct
/** @defgroup TIMEx_Remap TIM Extended Remapping
* @{
*/
-#define TIM_TIM1_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM1_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM1_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM1_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM1_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM1_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM1_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM1_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM1_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM1_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM1_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM1_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM1_ETR_ADC1_AWD1 TIM1_AF1_ETRSEL_3 /* !< ADC1 analog watchdog 1 */
-#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ADC1 analog watchdog 2 */
-#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ADC1 analog watchdog 3 */
+#define TIM_TIM1_ETR_ADC1_AWD1 TIM1_AF1_ETRSEL_3 /*!< ADC1 analog watchdog 1 */
+#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ADC1 analog watchdog 2 */
+#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< ADC1 analog watchdog 3 */
#if defined (ADC4)
-#define TIM_TIM1_ETR_ADC4_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC4 analog watchdog 1 */
-#define TIM_TIM1_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC4 analog watchdog 2 */
-#define TIM_TIM1_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC4 analog watchdog 3 */
+#define TIM_TIM1_ETR_ADC4_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ADC4 analog watchdog 1 */
+#define TIM_TIM1_ETR_ADC4_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< ADC4 analog watchdog 2 */
+#define TIM_TIM1_ETR_ADC4_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ADC4 analog watchdog 3 */
#endif /* ADC4 */
-#define TIM_TIM2_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM2_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM2_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM2_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM2_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM2_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM2_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM2_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM2_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM2_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM2_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM2_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM2_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM2_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM2_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)/* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM2_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)/*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM2_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM3 ETR */
-#define TIM_TIM2_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM4 ETR */
+#define TIM_TIM2_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /*!< ETR input is connected to TIM3 ETR */
+#define TIM_TIM2_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to TIM4 ETR */
#if defined (TIM5)
-#define TIM_TIM2_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to TIM5 ETR */
+#define TIM_TIM2_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to TIM5 ETR */
#endif /* TIM5 */
-#define TIM_TIM2_ETR_LSE (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to LSE */
+#define TIM_TIM2_ETR_LSE (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to LSE */
-#define TIM_TIM3_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM3_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM3_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM3_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM3_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM3_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM3_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM3_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM3_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM3_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM3_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM3_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM3_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM3_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM3_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM3_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM3_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM2 ETR */
-#define TIM_TIM3_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM4 ETR */
-#define TIM_TIM3_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC2 analog watchdog 1 */
-#define TIM_TIM3_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC2 analog watchdog 2 */
-#define TIM_TIM3_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC2 analog watchdog 3 */
-
-#define TIM_TIM4_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM4_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM4_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM4_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM4_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM3_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< ETR input is connected to TIM2 ETR */
+#define TIM_TIM3_ETR_TIM4_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to TIM4 ETR */
+#define TIM_TIM3_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ADC2 analog watchdog 1 */
+#define TIM_TIM3_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< ADC2 analog watchdog 2 */
+#define TIM_TIM3_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ADC2 analog watchdog 3 */
+
+#define TIM_TIM4_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM4_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM4_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM4_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM4_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM4_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM4_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM4_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM4_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM4_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM4_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM4_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM3 ETR */
+#define TIM_TIM4_ETR_TIM3_ETR TIM1_AF1_ETRSEL_3 /*!< ETR input is connected to TIM3 ETR */
#if defined (TIM5)
-#define TIM_TIM4_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM5 ETR */
+#define TIM_TIM4_ETR_TIM5_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to TIM5 ETR */
#endif /* TIM5 */
#if defined (TIM5)
-#define TIM_TIM5_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM5_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM5_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM5_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM5_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM5_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM5_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM5_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM5_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM5_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM5_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM5_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM5_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM5_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM5_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM5_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM5_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /* !< ETR input is connected to TIM2 ETR */
-#define TIM_TIM5_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to TIM3 ETR */
+#define TIM_TIM5_ETR_TIM2_ETR TIM1_AF1_ETRSEL_3 /*!< ETR input is connected to TIM2 ETR */
+#define TIM_TIM5_ETR_TIM3_ETR (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to TIM3 ETR */
#endif /* TIM5 */
-#define TIM_TIM8_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM8_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM8_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM8_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM8_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM8_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM8_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM8_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM8_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM8_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM8_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM8_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM8_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM8_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM8_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM8_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM8_ETR_ADC2_AWD1 TIM1_AF1_ETRSEL_3 /* !< ADC2 analog watchdog 1 */
-#define TIM_TIM8_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ADC2 analog watchdog 2 */
-#define TIM_TIM8_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ADC2 analog watchdog 3 */
+#define TIM_TIM8_ETR_ADC2_AWD1 TIM1_AF1_ETRSEL_3 /*!< ADC2 analog watchdog 1 */
+#define TIM_TIM8_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ADC2 analog watchdog 2 */
+#define TIM_TIM8_ETR_ADC2_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< ADC2 analog watchdog 3 */
#if defined (ADC3)
-#define TIM_TIM8_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC3 analog watchdog 1 */
-#define TIM_TIM8_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC3 analog watchdog 2 */
-#define TIM_TIM8_ETR_ADC3_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC3 analog watchdog 3 */
+#define TIM_TIM8_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ADC3 analog watchdog 1 */
+#define TIM_TIM8_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< ADC3 analog watchdog 2 */
+#define TIM_TIM8_ETR_ADC3_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ADC3 analog watchdog 3 */
#endif /* ADC3 */
#if defined (TIM20)
-#define TIM_TIM20_ETR_GPIO 0x00000000U /* !< ETR input is connected to GPIO */
-#define TIM_TIM20_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< ETR input is connected to COMP1_OUT */
-#define TIM_TIM20_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< ETR input is connected to COMP2_OUT */
-#define TIM_TIM20_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP3_OUT */
-#define TIM_TIM20_ETR_COMP4 TIM1_AF1_ETRSEL_2 /* !< ETR input is connected to COMP4_OUT */
+#define TIM_TIM20_ETR_GPIO 0x00000000U /*!< ETR input is connected to GPIO */
+#define TIM_TIM20_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< ETR input is connected to COMP1_OUT */
+#define TIM_TIM20_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< ETR input is connected to COMP2_OUT */
+#define TIM_TIM20_ETR_COMP3 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP3_OUT */
+#define TIM_TIM20_ETR_COMP4 TIM1_AF1_ETRSEL_2 /*!< ETR input is connected to COMP4_OUT */
#if defined(COMP5)
-#define TIM_TIM20_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP5_OUT */
+#define TIM_TIM20_ETR_COMP5 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP5_OUT */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_TIM20_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< ETR input is connected to COMP6_OUT */
+#define TIM_TIM20_ETR_COMP6 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< ETR input is connected to COMP6_OUT */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_TIM20_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ETR input is connected to COMP7_OUT */
+#define TIM_TIM20_ETR_COMP7 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ETR input is connected to COMP7_OUT */
#endif /* COMP7 */
-#define TIM_TIM20_ETR_ADC3_AWD1 TIM1_AF1_ETRSEL_3 /* !< ADC3 analog watchdog 1 */
-#define TIM_TIM20_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /* !< ADC3 analog watchdog 2 */
-#define TIM_TIM20_ETR_ADC3_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /* !< ADC3 analog watchdog 3 */
+#define TIM_TIM20_ETR_ADC3_AWD1 TIM1_AF1_ETRSEL_3 /*!< ADC3 analog watchdog 1 */
+#define TIM_TIM20_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_0) /*!< ADC3 analog watchdog 2 */
+#define TIM_TIM20_ETR_ADC3_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1) /*!< ADC3 analog watchdog 3 */
#if defined (ADC5)
-#define TIM_TIM20_ETR_ADC5_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< ADC5 analog watchdog 1 */
-#define TIM_TIM20_ETR_ADC5_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /* !< ADC5 analog watchdog 2 */
-#define TIM_TIM20_ETR_ADC5_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< ADC5 analog watchdog 3 */
+#define TIM_TIM20_ETR_ADC5_AWD1 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< ADC5 analog watchdog 1 */
+#define TIM_TIM20_ETR_ADC5_AWD2 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2) /*!< ADC5 analog watchdog 2 */
+#define TIM_TIM20_ETR_ADC5_AWD3 (TIM1_AF1_ETRSEL_3 | TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< ADC5 analog watchdog 3 */
#endif /* ADC5 */
#endif /* TIM20 */
/**
@@ -269,19 +269,19 @@ typedef struct
/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
* @{
*/
-#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
-#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
-#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
-#define TIM_BREAKINPUTSOURCE_COMP3 0x00000008U /* !< The COMP3 output is connected to the break input */
-#define TIM_BREAKINPUTSOURCE_COMP4 0x00000010U /* !< The COMP4 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /*!< An external source (GPIO) is connected to the BKIN pin */
+#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /*!< The COMP1 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /*!< The COMP2 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_COMP3 0x00000008U /*!< The COMP3 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_COMP4 0x00000010U /*!< The COMP4 output is connected to the break input */
#if defined(COMP5)
-#define TIM_BREAKINPUTSOURCE_COMP5 0x00000020U /* !< The COMP5 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_COMP5 0x00000020U /*!< The COMP5 output is connected to the break input */
#endif /* COMP5 */
#if defined(COMP6)
-#define TIM_BREAKINPUTSOURCE_COMP6 0x00000040U /* !< The COMP6 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_COMP6 0x00000040U /*!< The COMP6 output is connected to the break input */
#endif /* COMP6 */
#if defined(COMP7)
-#define TIM_BREAKINPUTSOURCE_COMP7 0x00000080U /* !< The COMP7 output is connected to the break input */
+#define TIM_BREAKINPUTSOURCE_COMP7 0x00000080U /*!< The COMP7 output is connected to the break input */
#endif /* COMP7 */
/**
* @}
@@ -715,14 +715,14 @@ typedef struct
#define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \
((((INSTANCE) == TIM1) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -733,14 +733,14 @@ typedef struct
|| \
(((INSTANCE) == TIM2) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -752,14 +752,14 @@ typedef struct
|| \
(((INSTANCE) == TIM3) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -770,15 +770,15 @@ typedef struct
|| \
(((INSTANCE) == TIM4) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -788,15 +788,15 @@ typedef struct
|| \
(((INSTANCE) == TIM5) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -806,15 +806,15 @@ typedef struct
|| \
(((INSTANCE) == TIM8) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -824,13 +824,13 @@ typedef struct
|| \
(((INSTANCE) == TIM15) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -840,15 +840,15 @@ typedef struct
|| \
(((INSTANCE) == TIM20) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -858,13 +858,13 @@ typedef struct
#define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \
((((INSTANCE) == TIM1) && \
- (((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -874,13 +874,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR10))) \
|| \
(((INSTANCE) == TIM2) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -891,13 +891,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR11))) \
|| \
(((INSTANCE) == TIM3) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -907,14 +907,14 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR10))) \
|| \
(((INSTANCE) == TIM4) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR4) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -923,14 +923,14 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR10))) \
|| \
(((INSTANCE) == TIM5) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -939,14 +939,14 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR10))) \
|| \
(((INSTANCE) == TIM8) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -955,13 +955,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR10))) \
|| \
(((INSTANCE) == TIM15) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ ((__SELECTION__) == TIM_TS_TI1FP1) || \
+ ((__SELECTION__) == TIM_TS_TI2FP2) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
((__SELECTION__) == TIM_TS_ITR1) || \
((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -970,14 +970,14 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR10))) \
|| \
(((INSTANCE) == TIM20) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -1095,14 +1095,14 @@ typedef struct
#define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \
((((INSTANCE) == TIM1) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -1111,14 +1111,14 @@ typedef struct
|| \
(((INSTANCE) == TIM2) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -1128,14 +1128,14 @@ typedef struct
|| \
(((INSTANCE) == TIM3) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -1144,14 +1144,14 @@ typedef struct
|| \
(((INSTANCE) == TIM4) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
@@ -1160,15 +1160,15 @@ typedef struct
|| \
(((INSTANCE) == TIM5) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1176,15 +1176,15 @@ typedef struct
|| \
(((INSTANCE) == TIM8) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1192,13 +1192,13 @@ typedef struct
|| \
(((INSTANCE) == TIM15) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR4) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1206,13 +1206,13 @@ typedef struct
#define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \
((((INSTANCE) == TIM1) && \
- (((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -1220,13 +1220,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM2) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -1235,13 +1235,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR11))) \
|| \
(((INSTANCE) == TIM3) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -1249,13 +1249,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM4) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
@@ -1263,41 +1263,41 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM5) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM8) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM15) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ ((__SELECTION__) == TIM_TS_TI1FP1) || \
+ ((__SELECTION__) == TIM_TS_TI2FP2) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
((__SELECTION__) == TIM_TS_ITR1) || \
((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1385,14 +1385,14 @@ typedef struct
#define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \
((((INSTANCE) == TIM1) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1401,14 +1401,14 @@ typedef struct
|| \
(((INSTANCE) == TIM2) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1418,14 +1418,14 @@ typedef struct
|| \
(((INSTANCE) == TIM3) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1434,14 +1434,14 @@ typedef struct
|| \
(((INSTANCE) == TIM4) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1450,15 +1450,15 @@ typedef struct
|| \
(((INSTANCE) == TIM8) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \
@@ -1466,13 +1466,13 @@ typedef struct
|| \
(((INSTANCE) == TIM15) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR8) || \
@@ -1480,15 +1480,15 @@ typedef struct
|| \
(((INSTANCE) == TIM20) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1496,13 +1496,13 @@ typedef struct
#define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \
((((INSTANCE) == TIM1) && \
- (((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1510,13 +1510,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR9))) \
|| \
(((INSTANCE) == TIM2) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1525,13 +1525,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR11))) \
|| \
(((INSTANCE) == TIM3) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1539,13 +1539,13 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR9))) \
|| \
(((INSTANCE) == TIM4) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1553,41 +1553,41 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR9))) \
|| \
(((INSTANCE) == TIM8) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8) || \
((__SELECTION__) == TIM_TS_ITR9))) \
|| \
(((INSTANCE) == TIM15) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ ((__SELECTION__) == TIM_TS_TI1FP1) || \
+ ((__SELECTION__) == TIM_TS_TI2FP2) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
((__SELECTION__) == TIM_TS_ITR1) || \
((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8) || \
((__SELECTION__) == TIM_TS_ITR9))) \
|| \
(((INSTANCE) == TIM20) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1675,14 +1675,14 @@ typedef struct
#define IS_TIM_CLOCKSOURCE_INSTANCE(INSTANCE, __CLOCK__) \
((((INSTANCE) == TIM1) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1691,13 +1691,13 @@ typedef struct
(((INSTANCE) == TIM2) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1706,14 +1706,14 @@ typedef struct
|| \
(((INSTANCE) == TIM3) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1722,13 +1722,13 @@ typedef struct
(((INSTANCE) == TIM4) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
@@ -1737,53 +1737,53 @@ typedef struct
(((INSTANCE) == TIM8) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR6) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))) \
|| \
(((INSTANCE) == TIM15) && \
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
+ ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
- ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR5) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR7) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR8))))
#define IS_TIM_TRIGGER_INSTANCE(INSTANCE, __SELECTION__) \
((((INSTANCE) == TIM1) && \
- (((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM2) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
@@ -1791,52 +1791,52 @@ typedef struct
((__SELECTION__) == TIM_TS_ITR11))) \
|| \
(((INSTANCE) == TIM3) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM4) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM8) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
- ((__SELECTION__) == TIM_TS_ITR1) || \
- ((__SELECTION__) == TIM_TS_ITR2) || \
- ((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
+ ((__SELECTION__) == TIM_TS_ITR1) || \
+ ((__SELECTION__) == TIM_TS_ITR2) || \
+ ((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))) \
|| \
(((INSTANCE) == TIM15) && \
- (((__SELECTION__) == TIM_TS_ITR0) || \
+ (((__SELECTION__) == TIM_TS_TI1F_ED) || \
+ ((__SELECTION__) == TIM_TS_TI1FP1) || \
+ ((__SELECTION__) == TIM_TS_TI2FP2) || \
+ ((__SELECTION__) == TIM_TS_ITR0) || \
((__SELECTION__) == TIM_TS_ITR1) || \
((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR3) || \
- ((__SELECTION__) == TIM_TS_TI1F_ED) || \
- ((__SELECTION__) == TIM_TS_TI1FP1) || \
- ((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8))))
@@ -1904,6 +1904,7 @@ typedef struct
((__SELECTION__) == TIM_TS_NONE))))
#endif /* TIM5 && TIM20 */
+
#define IS_TIM_OC_CHANNEL_MODE(__MODE__, __CHANNEL__) \
(IS_TIM_OC_MODE(__MODE__) \
&& ((((__MODE__) == TIM_OCMODE_DIRECTION_OUTPUT) || ((__MODE__) == TIM_OCMODE_PULSE_ON_COMPARE)) \
@@ -1942,7 +1943,6 @@ typedef struct
#define IS_TIM_ENCODERINDEX_DIRECTION(__DIRECTION__) (((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP_DOWN) || \
((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_UP) || \
((__DIRECTION__) == TIM_ENCODERINDEX_DIRECTION_DOWN))
-
/**
* @}
*/
@@ -1958,7 +1958,7 @@ typedef struct
* @{
*/
/* Timer Hall Sensor functions **********************************************/
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
+HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
@@ -1991,7 +1991,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chann
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
@@ -2010,7 +2011,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
+HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @}
@@ -2044,17 +2046,17 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- TIM_MasterConfigTypeDef *sMasterConfig);
+ const TIM_MasterConfigTypeDef *sMasterConfig);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
- TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
+ const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
- TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
+ const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
-HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
+HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput);
HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIMEx_OC_ConfigPulseOnCompare(TIM_HandleTypeDef *htim, uint32_t PulseWidthPrescaler,
@@ -2100,8 +2102,8 @@ void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim);
* @{
*/
/* Extended Peripheral State functions ***************************************/
-HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
-HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN);
+HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim);
+HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN);
/**
* @}
*/
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h
similarity index 95%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h
index 4c3c71d6..9fef6c14 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h
@@ -360,19 +360,19 @@ typedef struct
/** @defgroup RCC_LL_EC_I2Cx_CLKSOURCE Peripheral I2C clock source selection
* @{
*/
-#define LL_RCC_I2C1_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C1SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C1 clock source */
-#define LL_RCC_I2C1_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL_0 >> RCC_CCIPR_I2C1SEL_Pos)) /*!< SYSCLK clock used as I2C1 clock source */
-#define LL_RCC_I2C1_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL_1 >> RCC_CCIPR_I2C1SEL_Pos)) /*!< HSI clock used as I2C1 clock source */
-#define LL_RCC_I2C2_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C2SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C2 clock source */
-#define LL_RCC_I2C2_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL_0 >> RCC_CCIPR_I2C2SEL_Pos)) /*!< SYSCLK clock used as I2C2 clock source */
-#define LL_RCC_I2C2_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL_1 >> RCC_CCIPR_I2C2SEL_Pos)) /*!< HSI clock used as I2C2 clock source */
-#define LL_RCC_I2C3_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C3SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C3 clock source */
-#define LL_RCC_I2C3_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_0 >> RCC_CCIPR_I2C3SEL_Pos)) /*!< SYSCLK clock used as I2C3 clock source */
-#define LL_RCC_I2C3_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_1 >> RCC_CCIPR_I2C3SEL_Pos)) /*!< HSI clock used as I2C3 clock source */
+#define LL_RCC_I2C1_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C1 clock source */
+#define LL_RCC_I2C1_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL_0 >> RCC_CCIPR_I2C1SEL_Pos)) /*!< SYSCLK clock used as I2C1 clock source */
+#define LL_RCC_I2C1_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL_1 >> RCC_CCIPR_I2C1SEL_Pos)) /*!< HSI clock used as I2C1 clock source */
+#define LL_RCC_I2C2_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C2 clock source */
+#define LL_RCC_I2C2_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL_0 >> RCC_CCIPR_I2C2SEL_Pos)) /*!< SYSCLK clock used as I2C2 clock source */
+#define LL_RCC_I2C2_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL_1 >> RCC_CCIPR_I2C2SEL_Pos)) /*!< HSI clock used as I2C2 clock source */
+#define LL_RCC_I2C3_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C3 clock source */
+#define LL_RCC_I2C3_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_0 >> RCC_CCIPR_I2C3SEL_Pos)) /*!< SYSCLK clock used as I2C3 clock source */
+#define LL_RCC_I2C3_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_1 >> RCC_CCIPR_I2C3SEL_Pos)) /*!< HSI clock used as I2C3 clock source */
#if defined(RCC_CCIPR2_I2C4SEL)
-#define LL_RCC_I2C4_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C4SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C4 clock source */
-#define LL_RCC_I2C4_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL_0 >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< SYSCLK clock used as I2C4 clock source */
-#define LL_RCC_I2C4_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL_1 >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< HSI clock used as I2C4 clock source */
+#define LL_RCC_I2C4_CLKSOURCE_PCLK1 (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U)) /*!< PCLK1 clock used as I2C4 clock source */
+#define LL_RCC_I2C4_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL_0 >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< SYSCLK clock used as I2C4 clock source */
+#define LL_RCC_I2C4_CLKSOURCE_HSI (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL_1 >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< HSI clock used as I2C4 clock source */
#endif /* RCC_CCIPR2_I2C4SEL */
/**
* @}
@@ -444,13 +444,13 @@ typedef struct
/** @defgroup RCC_LL_EC_ADC_CLKSOURCE Peripheral ADC clock source selection
* @{
*/
-#define LL_RCC_ADC12_CLKSOURCE_NONE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC12SEL_Pos << 16U)) /*!< No clock used as ADC12 clock source */
-#define LL_RCC_ADC12_CLKSOURCE_PLL ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL_0 >> RCC_CCIPR_ADC12SEL_Pos)) /*!< PLL clock used as ADC12 clock source */
-#define LL_RCC_ADC12_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL_1 >> RCC_CCIPR_ADC12SEL_Pos)) /*!< SYSCLK clock used as ADC12 clock source */
+#define LL_RCC_ADC12_CLKSOURCE_NONE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U)) /*!< No clock used as ADC12 clock source */
+#define LL_RCC_ADC12_CLKSOURCE_PLL (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL_0 >> RCC_CCIPR_ADC12SEL_Pos)) /*!< PLL clock used as ADC12 clock source */
+#define LL_RCC_ADC12_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL_1 >> RCC_CCIPR_ADC12SEL_Pos)) /*!< SYSCLK clock used as ADC12 clock source */
#if defined(RCC_CCIPR_ADC345SEL)
-#define LL_RCC_ADC345_CLKSOURCE_NONE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC345SEL_Pos << 16U)) /*!< No clock used as ADC345 clock source */
-#define LL_RCC_ADC345_CLKSOURCE_PLL ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_0 >> RCC_CCIPR_ADC345SEL_Pos)) /*!< PLL clock used as ADC345 clock source */
-#define LL_RCC_ADC345_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_1 >> RCC_CCIPR_ADC345SEL_Pos)) /*!< SYSCLK clock used as ADC345 clock source */
+#define LL_RCC_ADC345_CLKSOURCE_NONE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U)) /*!< No clock used as ADC345 clock source */
+#define LL_RCC_ADC345_CLKSOURCE_PLL (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_0 >> RCC_CCIPR_ADC345SEL_Pos)) /*!< PLL clock used as ADC345 clock source */
+#define LL_RCC_ADC345_CLKSOURCE_SYSCLK (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_1 >> RCC_CCIPR_ADC345SEL_Pos)) /*!< SYSCLK clock used as ADC345 clock source */
#endif /* RCC_CCIPR_ADC345SEL */
/**
* @}
@@ -501,11 +501,11 @@ typedef struct
/** @defgroup RCC_LL_EC_I2C1 Peripheral I2C get clock source
* @{
*/
-#define LL_RCC_I2C1_CLKSOURCE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL >> RCC_CCIPR_I2C1SEL_Pos)) /*!< I2C1 Clock source selection */
-#define LL_RCC_I2C2_CLKSOURCE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL >> RCC_CCIPR_I2C2SEL_Pos)) /*!< I2C2 Clock source selection */
-#define LL_RCC_I2C3_CLKSOURCE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL >> RCC_CCIPR_I2C3SEL_Pos)) /*!< I2C3 Clock source selection */
+#define LL_RCC_I2C1_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C1SEL_Pos << 16U) | (RCC_CCIPR_I2C1SEL >> RCC_CCIPR_I2C1SEL_Pos)) /*!< I2C1 Clock source selection */
+#define LL_RCC_I2C2_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C2SEL_Pos << 16U) | (RCC_CCIPR_I2C2SEL >> RCC_CCIPR_I2C2SEL_Pos)) /*!< I2C2 Clock source selection */
+#define LL_RCC_I2C3_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL >> RCC_CCIPR_I2C3SEL_Pos)) /*!< I2C3 Clock source selection */
#if defined(RCC_CCIPR2_I2C4SEL)
-#define LL_RCC_I2C4_CLKSOURCE ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< I2C4 Clock source selection */
+#define LL_RCC_I2C4_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR2 << 24U) | ((uint32_t)RCC_CCIPR2_I2C4SEL_Pos << 16U) | (RCC_CCIPR2_I2C4SEL >> RCC_CCIPR2_I2C4SEL_Pos)) /*!< I2C4 Clock source selection */
#endif /* RCC_CCIPR2_I2C4SEL */
/**
* @}
@@ -565,9 +565,9 @@ typedef struct
/** @defgroup RCC_LL_EC_ADC Peripheral ADC get clock source
* @{
*/
-#define LL_RCC_ADC12_CLKSOURCE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL >> RCC_CCIPR_ADC12SEL_Pos)) /*!< ADC12 Clock source selection */
+#define LL_RCC_ADC12_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC12SEL_Pos << 16U) | (RCC_CCIPR_ADC12SEL >> RCC_CCIPR_ADC12SEL_Pos)) /*!< ADC12 Clock source selection */
#if defined(RCC_CCIPR_ADC345SEL_Pos)
-#define LL_RCC_ADC345_CLKSOURCE ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL >> RCC_CCIPR_ADC345SEL_Pos)) /*!< ADC345 Clock source selection */
+#define LL_RCC_ADC345_CLKSOURCE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL >> RCC_CCIPR_ADC345SEL_Pos)) /*!< ADC345 Clock source selection */
#endif /* RCC_CCIPR_ADC345SEL_Pos */
/**
* @}
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h
similarity index 96%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h
index c8423548..ac104727 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h
@@ -671,10 +671,10 @@ typedef struct
/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
* @{
*/
-#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!= (__CNTCLK__)) ? (uint32_t)(((__TIMCLK__)/(__CNTCLK__)) - 1U) : 0U)
+ (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U) : 0U)
/**
* @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency.
@@ -1987,11 +2002,6 @@ typedef struct
((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
-/**
- * @}
- */
-
-
/**
* @}
*/
@@ -2032,7 +2042,7 @@ __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
}
@@ -2065,7 +2075,7 @@ __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval Inverted state of bit (0 or 1).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
}
@@ -2099,7 +2109,7 @@ __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSo
* @arg @ref LL_TIM_UPDATESOURCE_REGULAR
* @arg @ref LL_TIM_UPDATESOURCE_COUNTER
*/
-__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
}
@@ -2126,7 +2136,7 @@ __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulse
* @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
* @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
*/
-__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
}
@@ -2170,7 +2180,7 @@ __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMo
* @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
* @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
*/
-__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)
{
uint32_t counter_mode;
@@ -2212,7 +2222,7 @@ __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
}
@@ -2249,7 +2259,7 @@ __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDi
* @arg @ref LL_TIM_CLOCKDIVISION_DIV2
* @arg @ref LL_TIM_CLOCKDIVISION_DIV4
*/
-__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
}
@@ -2278,7 +2288,7 @@ __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
* @param TIMx Timer instance
* @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
*/
-__STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CNT));
}
@@ -2291,7 +2301,7 @@ __STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx)
* @arg @ref LL_TIM_COUNTERDIRECTION_UP
* @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
*/
-__STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
}
@@ -2318,7 +2328,7 @@ __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
* @param TIMx Timer instance
* @retval Prescaler value between Min_Data=0 and Max_Data=65535
*/
-__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->PSC));
}
@@ -2350,7 +2360,7 @@ __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload
* @param TIMx Timer instance
* @retval Auto-reload value
*/
-__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->ARR));
}
@@ -2378,7 +2388,7 @@ __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t Rep
* @param TIMx Timer instance
* @retval Repetition counter value
*/
-__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->RCR));
}
@@ -2412,7 +2422,7 @@ __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
* @param Counter Counter value
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(uint32_t Counter)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(const uint32_t Counter)
{
return (((Counter & TIM_CNT_UIFCPY) == (TIM_CNT_UIFCPY)) ? 1UL : 0UL);
}
@@ -2451,7 +2461,7 @@ __STATIC_INLINE void LL_TIM_DisableDithering(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDithering(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR1, TIM_CR1_DITHEN) == (TIM_CR1_DITHEN)) ? 1UL : 0UL);
}
@@ -2492,6 +2502,17 @@ __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
}
+/**
+ * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is enabled.
+ * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload
+ * @param TIMx Timer instance
+ * @retval State of bit (1 or 0).
+ */
+__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
+{
+ return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
+}
+
/**
* @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
* @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
@@ -2530,7 +2551,7 @@ __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAR
* @arg @ref LL_TIM_CCDMAREQUEST_CC
* @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
*/
-__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
}
@@ -2642,7 +2663,7 @@ __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channe
* @arg @ref LL_TIM_CHANNEL_CH6
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)
{
return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
}
@@ -2728,8 +2749,8 @@ __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
* @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
* @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
+ * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
+ * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
* @arg @ref LL_TIM_OCMODE_PULSE_ON_COMPARE (for channel 3 or channel 4 only)
* @arg @ref LL_TIM_OCMODE_DIRECTION_OUTPUT (for channel 3 or channel 4 only)
* @retval None
@@ -2770,12 +2791,12 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint
* @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
* @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
* @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM1
- * @arg @ref LL_TIM_OCMODE_ASSYMETRIC_PWM2
+ * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
+ * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
* @arg @ref LL_TIM_OCMODE_PULSE_ON_COMPARE (for channel 3 or channel 4 only)
* @arg @ref LL_TIM_OCMODE_DIRECTION_OUTPUT (for channel 3 or channel 4 only)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -2845,7 +2866,7 @@ __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_OCPOLARITY_HIGH
* @arg @ref LL_TIM_OCPOLARITY_LOW
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]);
@@ -2918,7 +2939,7 @@ __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_OCIDLESTATE_LOW
* @arg @ref LL_TIM_OCIDLESTATE_HIGH
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]);
@@ -2995,7 +3016,7 @@ __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
* @arg @ref LL_TIM_CHANNEL_CH6
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -3071,7 +3092,7 @@ __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channe
* @arg @ref LL_TIM_CHANNEL_CH6
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -3156,7 +3177,7 @@ __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
* @arg @ref LL_TIM_CHANNEL_CH6
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -3294,7 +3315,7 @@ __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t Compare
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR1));
}
@@ -3311,7 +3332,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR2));
}
@@ -3328,7 +3349,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR3));
}
@@ -3345,7 +3366,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR4));
}
@@ -3359,7 +3380,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
}
@@ -3373,7 +3394,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CompareValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR6));
}
@@ -3438,7 +3459,7 @@ __STATIC_INLINE void LL_TIM_OC_SetPulseWidthPrescaler(TIM_TypeDef *TIMx, uint32_
* @arg @ref LL_TIM_PWPRSC_X64
* @arg @ref LL_TIM_PWPRSC_X128
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PWPRSC));
}
@@ -3467,7 +3488,7 @@ __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWi
* @param TIMx Timer instance
* @retval Returned value can be between Min_Data=0 and Max_Data=255:
*/
-__STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidth(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_PW));
}
@@ -3567,7 +3588,7 @@ __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channe
* @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
* @arg @ref LL_TIM_ACTIVEINPUT_TRC
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -3618,7 +3639,7 @@ __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_ICPSC_DIV4
* @arg @ref LL_TIM_ICPSC_DIV8
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -3693,7 +3714,7 @@ __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, ui
* @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
* @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel]));
@@ -3750,7 +3771,7 @@ __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel,
* @arg @ref LL_TIM_IC_POLARITY_FALLING
* @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
{
uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
@@ -3791,7 +3812,7 @@ __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
}
@@ -3808,7 +3829,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR1));
}
@@ -3825,7 +3846,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR2));
}
@@ -3842,7 +3863,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR3));
}
@@ -3859,7 +3880,7 @@ __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
*/
-__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_REG(TIMx->CCR4));
}
@@ -3906,7 +3927,7 @@ __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
}
@@ -4049,10 +4070,6 @@ __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
* @arg @ref LL_TIM_TS_ITR1
* @arg @ref LL_TIM_TS_ITR2
* @arg @ref LL_TIM_TS_ITR3
- * @arg @ref LL_TIM_TS_TI1F_ED
- * @arg @ref LL_TIM_TS_TI1FP1
- * @arg @ref LL_TIM_TS_TI2FP2
- * @arg @ref LL_TIM_TS_ETRF
* @arg @ref LL_TIM_TS_ITR4
* @arg @ref LL_TIM_TS_ITR5
* @arg @ref LL_TIM_TS_ITR6
@@ -4061,6 +4078,10 @@ __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
* @arg @ref LL_TIM_TS_ITR9
* @arg @ref LL_TIM_TS_ITR10
* @arg @ref LL_TIM_TS_ITR11
+ * @arg @ref LL_TIM_TS_TI1F_ED
+ * @arg @ref LL_TIM_TS_TI1FP1
+ * @arg @ref LL_TIM_TS_TI2FP2
+ * @arg @ref LL_TIM_TS_ETRF
* @retval None
*/
__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
@@ -4102,7 +4123,7 @@ __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
}
@@ -4309,7 +4330,7 @@ __STATIC_INLINE void LL_TIM_DisableSMSPreload(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledSMSPreload(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPE) == (TIM_SMCR_SMSPE)) ? 1UL : 0UL);
}
@@ -4340,7 +4361,7 @@ __STATIC_INLINE void LL_TIM_SetSMSPreloadSource(TIM_TypeDef *TIMx, uint32_t Prel
* @arg @ref LL_TIM_SMSPS_TIMUPDATE
* @arg @ref LL_TIM_SMSPS_INDEX
*/
-__STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetSMSPreloadSource(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->SMCR, TIM_SMCR_SMSPS));
}
@@ -4441,18 +4462,6 @@ __STATIC_INLINE void LL_TIM_DisarmBRK(TIM_TypeDef *TIMx)
SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);
}
-/**
- * @brief Re-arm the break input (when it operates in bidirectional mode).
- * @note The Break input is automatically armed as soon as MOE bit is set.
- * @rmtoll BDTR BKDSRM LL_TIM_ReArmBRK
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ReArmBRK(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);
-}
-
/**
* @brief Enable the break 2 function.
* @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
@@ -4542,18 +4551,6 @@ __STATIC_INLINE void LL_TIM_DisarmBRK2(TIM_TypeDef *TIMx)
SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);
}
-/**
- * @brief Re-arm the break 2 input (when it operates in bidirectional mode).
- * @note The Break 2 input is automatically armed as soon as MOE bit is set.
- * @rmtoll BDTR BK2DSRM LL_TIM_ReArmBRK2
- * @param TIMx Timer instance
- * @retval None
- */
-__STATIC_INLINE void LL_TIM_ReArmBRK2(TIM_TypeDef *TIMx)
-{
- CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);
-}
-
/**
* @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
* @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
@@ -4608,7 +4605,7 @@ __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
}
@@ -4651,7 +4648,7 @@ __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
}
@@ -4711,14 +4708,14 @@ __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t B
* AF1 BKCMP5E LL_TIM_DisableBreakInputSource\n
* AF1 BKCMP6E LL_TIM_DisableBreakInputSource\n
* AF1 BKCMP7E LL_TIM_DisableBreakInputSource\n
- * AF2 BKINE LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP1E LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP2E LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP3E LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP4E LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP5E LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP6E LL_TIM_DisableBreakInputSource\n
- * AF2 BKCMP7E LL_TIM_DisableBreakInputSource
+ * AF2 BK2INE LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP1E LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP2E LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP3E LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP4E LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP5E LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP6E LL_TIM_DisableBreakInputSource\n
+ * AF2 BK2CMP7E LL_TIM_DisableBreakInputSource
* @param TIMx Timer instance
* @param BreakInput This parameter can be one of the following values:
* @arg @ref LL_TIM_BREAK_INPUT_BKIN
@@ -4751,11 +4748,17 @@ __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t
* AF1 BKCMP2P LL_TIM_SetBreakInputSourcePolarity\n
* AF1 BKCMP3P LL_TIM_SetBreakInputSourcePolarity\n
* AF1 BKCMP4P LL_TIM_SetBreakInputSourcePolarity\n
+ * AF1 BKCMP5P LL_TIM_SetBreakInputSourcePolarity\n
+ * AF1 BKCMP6P LL_TIM_SetBreakInputSourcePolarity\n
+ * AF1 BKCMP7P LL_TIM_SetBreakInputSourcePolarity\n
* AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n
* AF2 BK2CMP1P LL_TIM_SetBreakInputSourcePolarity\n
* AF2 BK2CMP2P LL_TIM_SetBreakInputSourcePolarity\n
* AF2 BK2CMP3P LL_TIM_SetBreakInputSourcePolarity\n
- * AF2 BK2CMP4P LL_TIM_SetBreakInputSourcePolarity
+ * AF2 BK2CMP4P LL_TIM_SetBreakInputSourcePolarity\n
+ * AF2 BK2CMP5P LL_TIM_SetBreakInputSourcePolarity\n
+ * AF2 BK2CMP6P LL_TIM_SetBreakInputSourcePolarity\n
+ * AF2 BK2CMP7P LL_TIM_SetBreakInputSourcePolarity
* @param TIMx Timer instance
* @param BreakInput This parameter can be one of the following values:
* @arg @ref LL_TIM_BREAK_INPUT_BKIN
@@ -4766,9 +4769,14 @@ __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t
* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP2
* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP3
* @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP4
+ * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP5 (*)
+ * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP6 (*)
+ * @arg @ref LL_TIM_BKIN_SOURCE_BKCOMP7 (*)
* @param Polarity This parameter can be one of the following values:
* @arg @ref LL_TIM_BKIN_POLARITY_LOW
* @arg @ref LL_TIM_BKIN_POLARITY_HIGH
+ *
+ * (*) Value not defined in all devices.
* @retval None
*/
__STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t Source,
@@ -4811,7 +4819,7 @@ __STATIC_INLINE void LL_TIM_DisableAsymmetricalDeadTime(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTAE) == (TIM_DTR2_DTAE)) ? 1UL : 0UL);
}
@@ -4845,7 +4853,7 @@ __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadT
* @param TIMx Timer instance
* @retval Returned value can be between Min_Data=0 and Max_Data=255:
*/
-__STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->DTR2, TIM_DTR2_DTGF));
}
@@ -4884,7 +4892,7 @@ __STATIC_INLINE void LL_TIM_DisableDeadTimePreload(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDeadTimePreload(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DTR2, TIM_DTR2_DTPE) == (TIM_DTR2_DTPE)) ? 1UL : 0UL);
}
@@ -5007,7 +5015,7 @@ __STATIC_INLINE void LL_TIM_DisableEncoderIndex(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledEncoderIndex(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->ECR, TIM_ECR_IE) == (TIM_ECR_IE)) ? 1U : 0U);
}
@@ -5040,7 +5048,7 @@ __STATIC_INLINE void LL_TIM_SetIndexDirection(TIM_TypeDef *TIMx, uint32_t IndexD
* @arg @ref LL_TIM_INDEX_UP
* @arg @ref LL_TIM_INDEX_DOWN
*/
-__STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetIndexDirection(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IDIR));
}
@@ -5079,7 +5087,7 @@ __STATIC_INLINE void LL_TIM_DisableFirstIndex(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledFirstIndex(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->ECR, TIM_ECR_FIDX) == (TIM_ECR_FIDX)) ? 1UL : 0UL);
}
@@ -5118,7 +5126,7 @@ __STATIC_INLINE void LL_TIM_SetIndexPositionning(TIM_TypeDef *TIMx, uint32_t Ind
* @arg @ref LL_TIM_INDEX_POSITION_DOWN
* @arg @ref LL_TIM_INDEX_POSITION_UP
*/
-__STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_GetIndexPositionning(const TIM_TypeDef *TIMx)
{
return (uint32_t)(READ_BIT(TIMx->ECR, TIM_ECR_IPOS));
}
@@ -5391,7 +5399,7 @@ __STATIC_INLINE void LL_TIM_DisableHSE32(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledHSE32(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledHSE32(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->OR, TIM_OR_HSE32EN) == (TIM_OR_HSE32EN)) ? 1UL : 0UL);
}
@@ -5455,7 +5463,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
}
@@ -5477,7 +5485,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
}
@@ -5499,7 +5507,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);
}
@@ -5521,7 +5529,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
}
@@ -5543,7 +5551,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);
}
@@ -5565,7 +5573,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);
}
@@ -5587,7 +5595,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);
}
@@ -5609,7 +5617,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);
}
@@ -5631,7 +5639,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
}
@@ -5653,7 +5661,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);
}
@@ -5675,7 +5683,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);
}
@@ -5698,7 +5706,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);
}
@@ -5721,7 +5729,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);
}
@@ -5744,7 +5752,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
}
@@ -5767,7 +5775,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);
}
@@ -5789,7 +5797,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);
}
@@ -5815,7 +5823,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_TERR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TERR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_TERRF) == (TIM_SR_TERRF)) ? 1UL : 0UL);
}
@@ -5841,7 +5849,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_IERR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_IERRF) == (TIM_SR_IERRF)) ? 1UL : 0UL);
}
@@ -5867,7 +5875,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_DIRF) == (TIM_SR_DIRF)) ? 1UL : 0UL);
}
@@ -5893,7 +5901,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IDX(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->SR, TIM_SR_IDXF) == (TIM_SR_IDXF)) ? 1UL : 0UL);
}
@@ -5932,7 +5940,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL);
}
@@ -5965,7 +5973,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL);
}
@@ -5998,7 +6006,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL);
}
@@ -6031,7 +6039,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL);
}
@@ -6064,7 +6072,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL);
}
@@ -6097,7 +6105,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL);
}
@@ -6130,7 +6138,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL);
}
@@ -6163,7 +6171,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL);
}
@@ -6202,7 +6210,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_TERR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TERR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_TERRIE) == (TIM_DIER_TERRIE)) ? 1UL : 0UL);
}
@@ -6241,7 +6249,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_IERR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_IERRIE) == (TIM_DIER_IERRIE)) ? 1UL : 0UL);
}
@@ -6280,7 +6288,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_DIRIE) == (TIM_DIER_DIRIE)) ? 1UL : 0UL);
}
@@ -6319,7 +6327,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_IDXIE) == (TIM_DIER_IDXIE)) ? 1UL : 0UL);
}
@@ -6359,7 +6367,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL);
}
@@ -6392,7 +6400,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL);
}
@@ -6425,7 +6433,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL);
}
@@ -6458,7 +6466,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL);
}
@@ -6491,7 +6499,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL);
}
@@ -6524,7 +6532,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);
}
@@ -6557,7 +6565,7 @@ __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx)
* @param TIMx Timer instance
* @retval State of bit (1 or 0).
*/
-__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx)
+__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx)
{
return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL);
}
@@ -6677,19 +6685,19 @@ __STATIC_INLINE void LL_TIM_GenerateEvent_BRK2(TIM_TypeDef *TIMx)
* @{
*/
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx);
+ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx);
void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct);
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct);
+ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct);
void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
+ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct);
void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
+ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct);
void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
+ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct);
void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
-ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
+ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct);
void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
-ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
+ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct);
/**
* @}
*/
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h
similarity index 79%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h
index 134d863f..60510db5 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h
@@ -158,18 +158,31 @@ typedef struct
/** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
* @{
*/
-#define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */
-#define LL_UTILS_PACKAGETYPE_WLCSP81 0x00000005U /*!< WLCSP81 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP128 0x00000007U /*!< LQFP128 package type */
-#define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000008U /*!< UFQFPN32 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP32 0x00000009U /*!< LQFP32 package type */
-#define LL_UTILS_PACKAGETYPE_UFQFPN48 0x0000000AU /*!< UFQFPN48 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP48 0x0000000BU /*!< LQFP48 package type */
-#define LL_UTILS_PACKAGETYPE_WLCSP49 0x0000000CU /*!< WLCSP49 package type */
-#define LL_UTILS_PACKAGETYPE_UFBGA64 0x0000000DU /*!< UFBGA64 package type */
-#define LL_UTILS_PACKAGETYPE_UFBGA100 0x0000000EU /*!< UFBGA100 package type */
-#define LL_UTILS_PACKAGETYPE_LQFP48_EBIKE 0x00000010U /*!< LQFP48 EBIKE package type */
+#define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */
+#define LL_UTILS_PACKAGETYPE_WLCSP64 0x00000001U /*!< WLCSP64 package type */
+#if defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32G471xx) || \
+ defined (STM32G473xx) || defined (STM32G483xx) || defined (STM32G474xx) || \
+ defined (STM32G484xx)
+#define LL_UTILS_PACKAGETYPE_LQFP100_LQFP80 0x00000002U /*!< LQFP100 \ LQFP80 package type */
+#define LL_UTILS_PACKAGETYPE_LQFP100 LL_UTILS_PACKAGETYPE_LQFP100_LQFP80 /*!< For backward compatibility */
+#else
+#define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */
+#endif /* STM32G431xx || STM32G441xx || STM32G471xx || STM32G473xx || STM32G483xx ||STM32G474xx || STM32G484xx */
+#define LL_UTILS_PACKAGETYPE_WLCSP81 0x00000005U /*!< WLCSP81 package type */
+#define LL_UTILS_PACKAGETYPE_LQFP128_UFBGA121 0x00000007U /*!< LQFP128 \ UFBGA121 package type */
+#define LL_UTILS_PACKAGETYPE_LQFP128 LL_UTILS_PACKAGETYPE_LQFP128_UFBGA121 /*!< For backward compatibility */
+#define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000008U /*!< UFQFPN32 package type */
+#define LL_UTILS_PACKAGETYPE_LQFP32 0x00000009U /*!< LQFP32 package type */
+#define LL_UTILS_PACKAGETYPE_UFQFPN48 0x0000000AU /*!< UFQFPN48 package type */
+#define LL_UTILS_PACKAGETYPE_LQFP48 0x0000000BU /*!< LQFP48 package type */
+#define LL_UTILS_PACKAGETYPE_WLCSP49 0x0000000CU /*!< WLCSP49 package type */
+#define LL_UTILS_PACKAGETYPE_UFBGA64 0x0000000DU /*!< UFBGA64 package type */
+#define LL_UTILS_PACKAGETYPE_TFBGA100 0x0000000EU /*!< TFBGA100 package type */
+#define LL_UTILS_PACKAGETYPE_UFBGA100 LL_UTILS_PACKAGETYPE_TFBGA100 /*!< For backward compatibility */
+#define LL_UTILS_PACKAGETYPE_LQFP48_EBIKE 0x00000010U /*!< LQFP48 EBIKE package type */
+#if defined (STM32G491xx) || defined (STM32G4A1xx)
+#define LL_UTILS_PACKAGETYPE_LQFP80 0x00000011U /*!< LQFP80 package type */
+#endif /* STM32G491xx || STM32G4A1xx */
/**
* @}
@@ -263,7 +276,7 @@ __STATIC_INLINE uint32_t LL_GetPackageType(void)
* @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
* @note When a RTOS is used, it is recommended to avoid changing the SysTick
* configuration by calling this function, for a delay use rather osDelay RTOS service.
- * @param Ticks Number of ticks
+ * @param Ticks Frequency of Ticks (Hz)
* @retval None
*/
__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
similarity index 96%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
index d1b49718..ebe1bdf5 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
@@ -48,11 +48,11 @@
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
- * @brief STM32G4xx HAL Driver version number V1.2.2
+ * @brief STM32G4xx HAL Driver version number V1.2.3
*/
#define __STM32G4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define __STM32G4xx_HAL_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */
-#define __STM32G4xx_HAL_VERSION_SUB2 (0x02U) /*!< [15:8] sub2 version */
+#define __STM32G4xx_HAL_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */
#define __STM32G4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define __STM32G4xx_HAL_VERSION ((__STM32G4xx_HAL_VERSION_MAIN << 24U)\
|(__STM32G4xx_HAL_VERSION_SUB1 << 16U)\
@@ -378,7 +378,8 @@ HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq)
/**
* @brief Returns tick frequency.
- * @retval tick period in Hz
+ * @retval Tick frequency.
+ * Value of @ref HAL_TickFreqTypeDef.
*/
uint32_t HAL_GetTickFreq(void)
{
@@ -471,6 +472,33 @@ uint32_t HAL_GetDEVID(void)
return (DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID);
}
+/**
+ * @brief Return the first word of the unique device identifier (UID based on 96 bits)
+ * @retval Device identifier
+ */
+uint32_t HAL_GetUIDw0(void)
+{
+ return (READ_REG(*((uint32_t *)UID_BASE)));
+}
+
+/**
+ * @brief Return the second word of the unique device identifier (UID based on 96 bits)
+ * @retval Device identifier
+ */
+uint32_t HAL_GetUIDw1(void)
+{
+ return (READ_REG(*((uint32_t *)(UID_BASE + 4U))));
+}
+
+/**
+ * @brief Return the third word of the unique device identifier (UID based on 96 bits)
+ * @retval Device identifier
+ */
+uint32_t HAL_GetUIDw2(void)
+{
+ return (READ_REG(*((uint32_t *)(UID_BASE + 8U))));
+}
+
/**
* @}
*/
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
similarity index 99%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
index 8666cb5b..871928c6 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c
@@ -65,7 +65,7 @@
(++) Provide exiting handle as parameter.
(++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
- (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
+ (#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine().
(++) Provide exiting handle as parameter.
(#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
@@ -348,7 +348,7 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
assert_param(IS_EXTI_GPIO_PIN(linepos));
regval = SYSCFG->EXTICR[linepos >> 2u];
- pExtiConfig->GPIOSel = ((regval >> (SYSCFG_EXTICR1_EXTI1_Pos * ((linepos & 0x03u)))));
+ pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EXTICR1_EXTI0;
}
}
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
similarity index 96%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
index 261fae7d..0ddb6b4b 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c
@@ -188,6 +188,17 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint
{
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
+ /* Deactivate the data cache if they are activated to avoid data misbehavior */
+ if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
+ {
+ /* Disable data cache */
+ __HAL_FLASH_DATA_CACHE_DISABLE();
+ pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED;
+ }
+ else
+ {
+ pFlash.CacheToReactivate = FLASH_CACHE_DISABLED;
+ }
if (TypeProgram == FLASH_TYPEPROGRAM_DOUBLEWORD)
{
/* Program double-word (64-bit) at a specified address */
@@ -218,6 +229,9 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint
{
CLEAR_BIT(FLASH->CR, prog_bit);
}
+
+ /* Flush the caches to be sure of the data consistency */
+ FLASH_FlushCaches();
}
/* Process Unlocked */
@@ -251,6 +265,18 @@ HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, u
/* Reset error code */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
+ /* Deactivate the data cache if they are activated to avoid data misbehavior */
+ if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
+ {
+ /* Disable data cache */
+ __HAL_FLASH_DATA_CACHE_DISABLE();
+ pFlash.CacheToReactivate = FLASH_CACHE_DCACHE_ENABLED;
+ }
+ else
+ {
+ pFlash.CacheToReactivate = FLASH_CACHE_DISABLED;
+ }
+
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
@@ -328,7 +354,7 @@ void HAL_FLASH_IRQHandler(void)
__HAL_FLASH_CLEAR_FLAG(error);
/* Flush the caches to be sure of the data consistency */
- FLASH_FlushCaches() ;
+ FLASH_FlushCaches();
/* FLASH error interrupt user callback */
procedure = pFlash.ProcedureOnGoing;
@@ -384,7 +410,7 @@ void HAL_FLASH_IRQHandler(void)
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
/* Flush the caches to be sure of the data consistency */
- FLASH_FlushCaches() ;
+ FLASH_FlushCaches();
/* FLASH EOP interrupt user callback */
HAL_FLASH_EndOfOperationCallback(pFlash.Page);
@@ -393,7 +419,7 @@ void HAL_FLASH_IRQHandler(void)
else
{
/* Flush the caches to be sure of the data consistency */
- FLASH_FlushCaches() ;
+ FLASH_FlushCaches();
procedure = pFlash.ProcedureOnGoing;
if (procedure == FLASH_PROC_MASS_ERASE)
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
similarity index 98%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
index 8baeef66..073eb318 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c
@@ -477,10 +477,14 @@ HAL_StatusTypeDef HAL_FLASHEx_EnableSecMemProtection(uint32_t Bank)
}
}
else
-#endif
{
SET_BIT(FLASH->CR, FLASH_CR_SEC_PROT1);
}
+#else
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(Bank);
+ SET_BIT(FLASH->CR, FLASH_CR_SEC_PROT1);
+#endif /* FLASH_OPTR_DBANK */
return HAL_OK;
}
@@ -598,7 +602,10 @@ void FLASH_PageErase(uint32_t Page, uint32_t Banks)
SET_BIT(FLASH->CR, FLASH_CR_BKER);
}
}
-#endif
+#else
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(Banks);
+#endif /* FLASH_OPTR_DBANK */
/* Proceed to erase the page */
MODIFY_REG(FLASH->CR, FLASH_CR_PNB, ((Page & 0xFFU) << FLASH_CR_PNB_Pos));
@@ -790,6 +797,18 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserCon
if (status == HAL_OK)
{
+#if defined(FLASH_OPTR_PB4_PUPEN)
+ if ((UserType & OB_USER_PB4_PUPEN) != 0U)
+ {
+ /* PB4_PUPEN option byte should be modified */
+ assert_param(IS_OB_USER_PB4_PUPEN(UserConfig & FLASH_OPTR_PB4_PUPEN));
+
+ /* Set value and mask for PB4_PUPEN option byte */
+ optr_reg_val |= (UserConfig & FLASH_OPTR_PB4_PUPEN);
+ optr_reg_mask |= FLASH_OPTR_PB4_PUPEN;
+ }
+#endif /* FLASH_OPTR_PB4_PUPEN */
+
if ((UserType & OB_USER_BOR_LEV) != 0U)
{
/* BOR level option byte should be modified */
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
similarity index 99%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
index e118ff7b..884a75ca 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c
@@ -632,7 +632,7 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
/* Get Start Tick*/
tickstart = HAL_GetTick();
- /* Wait till PLL is ready */
+ /* Wait till PLL is disabled */
while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U)
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
@@ -672,10 +672,6 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
- /* Disable all PLL outputs to save power if no PLLs on */
- MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE);
- __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_ADCCLK);
-
/* Get Start Tick*/
tickstart = HAL_GetTick();
@@ -687,6 +683,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
return HAL_TIMEOUT;
}
}
+
+ /* Unselect PLL clock source and disable outputs to save power */
+ RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_ADCCLK);
}
}
else
@@ -978,7 +977,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
* @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled, no clock on MCO
* @arg @ref RCC_MCO1SOURCE_SYSCLK system clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source
- * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee
+ * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_PLLCLK main PLL clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
similarity index 97%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
index c0460d49..72254376 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c
@@ -217,11 +217,11 @@ all interrupt callbacks are set to the corresponding weak functions:
/** @addtogroup TIM_Private_Functions
* @{
*/
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
-static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
+static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
+static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
+static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
+static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
+static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config);
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
uint32_t TIM_ICFilter);
@@ -237,7 +237,7 @@ static void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma);
static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
- TIM_SlaveConfigTypeDef *sSlaveConfig);
+ const TIM_SlaveConfigTypeDef *sSlaveConfig);
/**
* @}
*/
@@ -290,6 +290,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -537,7 +538,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
* @param Length The length of data to be transferred from memory to peripheral.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
+HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, const uint32_t *pData, uint16_t Length)
{
uint32_t tmpsmcr;
@@ -551,7 +552,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
}
else if (htim->State == HAL_TIM_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -673,6 +674,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -898,7 +900,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
uint32_t tmpsmcr;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
@@ -990,7 +992,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@@ -1062,13 +1064,14 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
* @param Length The length of data to be transferred from memory to TIM peripheral
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
+HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Set the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
@@ -1077,7 +1080,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
}
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -1230,7 +1233,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@@ -1340,6 +1343,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -1565,7 +1569,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel
uint32_t tmpsmcr;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
@@ -1657,7 +1661,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@@ -1729,13 +1733,14 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
* @param Length The length of data to be transferred from memory to TIM peripheral
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
+HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Set the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
@@ -1744,7 +1749,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
}
else if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -1896,7 +1901,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@@ -2006,6 +2011,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -2139,7 +2145,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
@@ -2187,7 +2193,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Disable the Input Capture channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
@@ -2223,7 +2229,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
@@ -2311,7 +2317,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@@ -2387,7 +2393,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
/* Set the TIM channel state */
@@ -2399,7 +2405,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
else if ((channel_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -2542,7 +2548,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
- assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
+ assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
/* Disable the Input Capture channel */
@@ -2655,6 +2661,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePul
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_OPM_MODE(OnePulseMode));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
@@ -3032,7 +3039,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
* @param sConfig TIM Encoder Interface configuration structure
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
+HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig)
{
uint32_t tmpsmcr;
uint32_t tmpccmr1;
@@ -3058,6 +3065,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_Ini
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
if (htim->State == HAL_TIM_STATE_RESET)
{
@@ -3567,7 +3575,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData1 == NULL) && (Length > 0U))
+ if ((pData1 == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -3592,7 +3600,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
else if ((channel_2_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData2 == NULL) && (Length > 0U))
+ if ((pData2 == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -3621,7 +3629,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_2_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((((pData1 == NULL) || (pData2 == NULL))) && (Length > 0U))
+ if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -3837,13 +3845,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
+ uint32_t itsource = htim->Instance->DIER;
+ uint32_t itflag = htim->Instance->SR;
+
/* Capture compare 1 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
+ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
+ if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
{
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
/* Input capture event */
@@ -3871,11 +3882,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 2 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
+ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
+ if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
@@ -3901,11 +3912,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 3 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
+ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
+ if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
@@ -3931,11 +3942,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 4 event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
+ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
+ if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
@@ -3961,11 +3972,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Update event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
+ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
+ if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
@@ -3974,11 +3985,12 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Break input event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
+ if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
+ ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
@@ -3987,9 +3999,9 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Break2 input event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
+ if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
+ if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
@@ -4000,11 +4012,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Trigger detection event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
+ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
+ if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
@@ -4013,11 +4025,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM commutation event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
+ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
+ if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
@@ -4026,11 +4038,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Encoder index event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_IDX) != RESET)
+ if ((itflag & (TIM_FLAG_IDX)) == (TIM_FLAG_IDX))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_IDX) != RESET)
+ if ((itsource & (TIM_IT_IDX)) == (TIM_IT_IDX))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_IDX);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_IDX);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->EncoderIndexCallback(htim);
#else
@@ -4039,11 +4051,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Direction change event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_DIR) != RESET)
+ if ((itflag & (TIM_FLAG_DIR)) == (TIM_FLAG_DIR))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_DIR) != RESET)
+ if ((itsource & (TIM_IT_DIR)) == (TIM_IT_DIR))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_DIR);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_DIR);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->DirectionChangeCallback(htim);
#else
@@ -4052,11 +4064,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Index error event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_IERR) != RESET)
+ if ((itflag & (TIM_FLAG_IERR)) == (TIM_FLAG_IERR))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_IERR) != RESET)
+ if ((itsource & (TIM_IT_IERR)) == (TIM_IT_IERR))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_IERR);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_IERR);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IndexErrorCallback(htim);
#else
@@ -4065,11 +4077,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Transition error event */
- if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TERR) != RESET)
+ if ((itflag & (TIM_FLAG_TERR)) == (TIM_FLAG_TERR))
{
- if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TERR) != RESET)
+ if ((itsource & (TIM_IT_TERR)) == (TIM_IT_TERR))
{
- __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_TERR);
+ __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TERR);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TransitionErrorCallback(htim);
#else
@@ -4118,7 +4130,7 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
- TIM_OC_InitTypeDef *sConfig,
+ const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -4216,7 +4228,7 @@ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
+HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_IC_InitTypeDef *sConfig, uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -4318,7 +4330,7 @@ HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitT
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
- TIM_OC_InitTypeDef *sConfig,
+ const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -4623,7 +4635,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength)
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
+ uint32_t BurstLength)
{
HAL_StatusTypeDef status;
@@ -4684,7 +4697,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
- uint32_t BurstRequestSrc, uint32_t *BurstBuffer,
+ uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -5345,7 +5358,7 @@ HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventS
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
- TIM_ClearInputConfigTypeDef *sClearInputConfig,
+ const TIM_ClearInputConfigTypeDef *sClearInputConfig,
uint32_t Channel)
{
HAL_StatusTypeDef status = HAL_OK;
@@ -5396,10 +5409,10 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
{
/* Clear the OCREF clear selection bit */
CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS);
-
- /* Clear TIM1_AF2_OCRSEL (reset value) */
- MODIFY_REG(htim->Instance->AF2, TIMx_AF2_OCRSEL, sClearInputConfig->ClearInputSource);
}
+
+ /* Set the clear input source */
+ MODIFY_REG(htim->Instance->AF2, TIMx_AF2_OCRSEL, sClearInputConfig->ClearInputSource);
break;
}
@@ -5546,7 +5559,7 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim,
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig)
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
@@ -5746,7 +5759,7 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S
* (Disable, Reset, Gated, Trigger, External clock mode 1, Reset + Trigger, Gated + Reset).
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig)
+HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig)
{
/* Check the parameters */
assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
@@ -5787,7 +5800,7 @@ HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, TIM_SlaveC
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim,
- TIM_SlaveConfigTypeDef *sSlaveConfig)
+ const TIM_SlaveConfigTypeDef *sSlaveConfig)
{
/* Check the parameters */
assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
@@ -5829,7 +5842,7 @@ HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim,
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval Captured value
*/
-uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
+uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
uint32_t tmpreg = 0U;
@@ -6112,8 +6125,6 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call
{
return HAL_ERROR;
}
- /* Process locked */
- __HAL_LOCK(htim);
if (htim->State == HAL_TIM_STATE_READY)
{
@@ -6325,9 +6336,6 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
return status;
}
@@ -6375,9 +6383,6 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
{
HAL_StatusTypeDef status = HAL_OK;
- /* Process locked */
- __HAL_LOCK(htim);
-
if (htim->State == HAL_TIM_STATE_READY)
{
switch (CallbackID)
@@ -6634,9 +6639,6 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
status = HAL_ERROR;
}
- /* Release Lock */
- __HAL_UNLOCK(htim);
-
return status;
}
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
@@ -6665,7 +6667,7 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
* @param htim TIM Base handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -6675,7 +6677,7 @@ HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
* @param htim TIM Output Compare handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -6685,7 +6687,7 @@ HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
* @param htim TIM handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -6695,7 +6697,7 @@ HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
* @param htim TIM IC handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -6705,7 +6707,7 @@ HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
* @param htim TIM OPM handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -6715,7 +6717,7 @@ HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
* @param htim TIM Encoder Interface handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -6725,7 +6727,7 @@ HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
* @param htim TIM handle
* @retval Active channel
*/
-HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim)
+HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(const TIM_HandleTypeDef *htim)
{
return htim->Channel;
}
@@ -6743,7 +6745,7 @@ HAL_TIM_ActiveChannel HAL_TIM_GetActiveChannel(TIM_HandleTypeDef *htim)
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
-HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, uint32_t Channel)
+HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
HAL_TIM_ChannelStateTypeDef channel_state;
@@ -6760,7 +6762,7 @@ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(TIM_HandleTypeDef *htim, ui
* @param htim TIM handle
* @retval DMA burst state
*/
-HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(TIM_HandleTypeDef *htim)
+HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim)
{
/* Check the parameters */
assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
@@ -7103,7 +7105,7 @@ static void TIM_DMATriggerHalfCplt(DMA_HandleTypeDef *hdma)
* @param Structure TIM Base configuration structure
* @retval None
*/
-void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
@@ -7143,6 +7145,13 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
+
+ /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
+ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
+ {
+ /* Clear the update flag */
+ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
+ }
}
/**
@@ -7151,17 +7160,18 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
* @param OC_Config The output configuration structure
* @retval None
*/
-static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -7226,17 +7236,18 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
* @param OC_Config The output configuration structure
* @retval None
*/
-void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -7265,7 +7276,6 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
tmpccer |= (OC_Config->OCNPolarity << 4U);
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
-
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
@@ -7302,17 +7312,18 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
* @param OC_Config The output configuration structure
* @retval None
*/
-static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -7376,17 +7387,18 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
* @param OC_Config The output configuration structure
* @retval None
*/
-static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
+static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@@ -7454,17 +7466,18 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
* @retval None
*/
static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
- TIM_OC_InitTypeDef *OC_Config)
+ const TIM_OC_InitTypeDef *OC_Config)
{
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the output: Reset the CCxE Bit */
TIMx->CCER &= ~TIM_CCER_CC5E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
/* Get the TIMx CCMR1 register value */
@@ -7507,17 +7520,18 @@ static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
* @retval None
*/
static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
- TIM_OC_InitTypeDef *OC_Config)
+ const TIM_OC_InitTypeDef *OC_Config)
{
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
+ /* Get the TIMx CCER register value */
+ tmpccer = TIMx->CCER;
+
/* Disable the output: Reset the CCxE Bit */
TIMx->CCER &= ~TIM_CCER_CC6E;
- /* Get the TIMx CCER register value */
- tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
/* Get the TIMx CCMR1 register value */
@@ -7561,7 +7575,7 @@ static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
* @retval None
*/
static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim,
- TIM_SlaveConfigTypeDef *sSlaveConfig)
+ const TIM_SlaveConfigTypeDef *sSlaveConfig)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
@@ -7716,9 +7730,9 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC1E;
tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
/* Select the Input */
if (IS_TIM_CC2_INSTANCE(TIMx) != RESET)
@@ -7806,9 +7820,9 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC2E;
tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr1 &= ~TIM_CCMR1_CC2S;
@@ -7845,9 +7859,9 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity,
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC2E;
tmpccmr1 = TIMx->CCMR1;
- tmpccer = TIMx->CCER;
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
@@ -7889,9 +7903,9 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccer;
/* Disable the Channel 3: Reset the CC3E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC3E;
tmpccmr2 = TIMx->CCMR2;
- tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr2 &= ~TIM_CCMR2_CC3S;
@@ -7937,9 +7951,9 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccer;
/* Disable the Channel 4: Reset the CC4E Bit */
+ tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC4E;
tmpccmr2 = TIMx->CCMR2;
- tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr2 &= ~TIM_CCMR2_CC4S;
@@ -7967,10 +7981,6 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
* @arg TIM_TS_ITR1: Internal Trigger 1
* @arg TIM_TS_ITR2: Internal Trigger 2
* @arg TIM_TS_ITR3: Internal Trigger 3
- * @arg TIM_TS_TI1F_ED: TI1 Edge Detector
- * @arg TIM_TS_TI1FP1: Filtered Timer Input 1
- * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
- * @arg TIM_TS_ETRF: External Trigger input
* @arg TIM_TS_ITR4: Internal Trigger 4 (*)
* @arg TIM_TS_ITR5: Internal Trigger 5
* @arg TIM_TS_ITR6: Internal Trigger 6
@@ -7979,6 +7989,10 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
* @arg TIM_TS_ITR9: Internal Trigger 9 (*)
* @arg TIM_TS_ITR10: Internal Trigger 10
* @arg TIM_TS_ITR11: Internal Trigger 11
+ * @arg TIM_TS_TI1F_ED: TI1 Edge Detector
+ * @arg TIM_TS_TI1FP1: Filtered Timer Input 1
+ * @arg TIM_TS_TI2FP2: Filtered Timer Input 2
+ * @arg TIM_TS_ETRF: External Trigger input
*
* (*) Value not defined in all devices.
*
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
similarity index 97%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
index 04d982f3..e0290303 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c
@@ -154,7 +154,7 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
* @param sConfig TIM Hall Sensor configuration structure
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
+HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
{
TIM_OC_InitTypeDef OC_Config;
@@ -170,6 +170,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSen
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
+ assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
@@ -520,7 +521,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -871,7 +872,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET)
+ if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@@ -904,7 +905,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
* @param Length The length of data to be transferred from memory to TIM peripheral
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
+HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
@@ -919,7 +921,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
}
else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -1147,17 +1149,6 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann
(+) Stop the Complementary PWM and disable interrupts.
(+) Start the Complementary PWM and enable DMA transfers.
(+) Stop the Complementary PWM and disable DMA transfers.
- (+) Start the Complementary Input Capture measurement.
- (+) Stop the Complementary Input Capture.
- (+) Start the Complementary Input Capture and enable interrupts.
- (+) Stop the Complementary Input Capture and disable interrupts.
- (+) Start the Complementary Input Capture and enable DMA transfers.
- (+) Stop the Complementary Input Capture and disable DMA transfers.
- (+) Start the Complementary One Pulse generation.
- (+) Stop the Complementary One Pulse.
- (+) Start the Complementary One Pulse and enable interrupts.
- (+) Stop the Complementary One Pulse and disable interrupts.
-
@endverbatim
* @{
*/
@@ -1401,7 +1392,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
- if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET)
+ if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@@ -1434,7 +1425,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
* @param Length The length of data to be transferred from memory to TIM peripheral
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
+HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
+ uint16_t Length)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmpsmcr;
@@ -1449,7 +1441,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
}
else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
{
- if ((pData == NULL) && (Length > 0U))
+ if ((pData == NULL) || (Length == 0U))
{
return HAL_ERROR;
}
@@ -2186,7 +2178,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint3
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
- TIM_MasterConfigTypeDef *sMasterConfig)
+ const TIM_MasterConfigTypeDef *sMasterConfig)
{
uint32_t tmpcr2;
uint32_t tmpsmcr;
@@ -2259,7 +2251,7 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
- TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
+ const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
{
/* Keep this variable initialized to 0 as it is used to configure BDTR register */
uint32_t tmpbdtr = 0U;
@@ -2274,6 +2266,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
+ assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode));
/* Check input state */
__HAL_LOCK(htim);
@@ -2290,15 +2283,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
-
- if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
- {
- /* Check the parameters */
- assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode));
-
- /* Set BREAK AF mode */
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode);
- }
+ MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode);
if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
{
@@ -2306,20 +2291,13 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
+ assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode));
/* Set the BREAK2 input related BDTR bits */
MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
-
- if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
- {
- /* Check the parameters */
- assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode));
-
- /* Set BREAK2 AF mode */
- MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode);
- }
+ MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode);
}
/* Set TIMx_BDTR */
@@ -2342,8 +2320,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
*/
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
uint32_t BreakInput,
- TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
-
+ const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmporx;
@@ -2679,7 +2656,7 @@ HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
*
* @arg TIM_TIM3_TI3_GPIO: TIM3 TI3 is connected to GPIO
* @arg TIM_TIM3_TI3_COMP3: TIM3 TI3 is connected to COMP3 output
-
+ *
* For TIM4 this parameter can be one of the following values:
* @arg TIM_TIM4_TI1_GPIO: TIM4 TI1 is connected to GPIO
* @arg TIM_TIM4_TI1_COMP1: TIM4 TI1 is connected to COMP1 output
@@ -2877,7 +2854,7 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B
uint32_t tmpbdtr;
/* Check the parameters */
- assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
+ assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
assert_param(IS_TIM_BREAKINPUT(BreakInput));
switch (BreakInput)
@@ -2894,7 +2871,6 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B
}
break;
}
-
case TIM_BREAKINPUT_BRK2:
{
/* Check initial conditions */
@@ -2926,13 +2902,13 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B
* @note Break input is automatically armed as soon as MOE bit is set.
* @retval HAL status
*/
-HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
+HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tickstart;
/* Check the parameters */
- assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
+ assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
assert_param(IS_TIM_BREAKINPUT(BreakInput));
switch (BreakInput)
@@ -3344,7 +3320,7 @@ HAL_StatusTypeDef HAL_TIMEx_DisableEncoderFirstIndex(TIM_HandleTypeDef *htim)
*/
/**
- * @brief Hall commutation changed callback in non-blocking mode
+ * @brief Commutation callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -3358,7 +3334,7 @@ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
*/
}
/**
- * @brief Hall commutation changed half complete callback in non-blocking mode
+ * @brief Commutation half complete callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -3373,7 +3349,7 @@ __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
}
/**
- * @brief Hall Break detection callback in non-blocking mode
+ * @brief Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@@ -3388,7 +3364,7 @@ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
}
/**
- * @brief Hall Break2 detection callback in non blocking mode
+ * @brief Break2 detection callback in non blocking mode
* @param htim: TIM handle
* @retval None
*/
@@ -3486,7 +3462,7 @@ __weak void HAL_TIMEx_TransitionErrorCallback(TIM_HandleTypeDef *htim)
* @param htim TIM Hall Sensor handle
* @retval HAL state
*/
-HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
+HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
{
return htim->State;
}
@@ -3502,7 +3478,7 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
* @arg TIM_CHANNEL_4: TIM Channel 4
* @retval TIM Complementary channel state
*/
-HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
+HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
{
HAL_TIM_ChannelStateTypeDef channel_state;
@@ -3648,6 +3624,11 @@ static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
}
+ else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
+ {
+ htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
+ TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
+ }
else
{
/* nothing to do */
@@ -3679,13 +3660,13 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
{
uint32_t tmp;
- tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
+ tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */
/* Reset the CCxNE Bit */
TIMx->CCER &= ~tmp;
/* Set or reset the CCxNE Bit */
- TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
+ TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */
}
/**
* @}
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c
similarity index 100%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c
similarity index 93%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c
index 679b2208..7ef1d51d 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c
@@ -66,8 +66,8 @@
|| ((__VALUE__) == LL_TIM_OCMODE_RETRIG_OPM2) \
|| ((__VALUE__) == LL_TIM_OCMODE_COMBINED_PWM1) \
|| ((__VALUE__) == LL_TIM_OCMODE_COMBINED_PWM2) \
- || ((__VALUE__) == LL_TIM_OCMODE_ASSYMETRIC_PWM1) \
- || ((__VALUE__) == LL_TIM_OCMODE_ASSYMETRIC_PWM2) \
+ || ((__VALUE__) == LL_TIM_OCMODE_ASYMMETRIC_PWM1) \
+ || ((__VALUE__) == LL_TIM_OCMODE_ASYMMETRIC_PWM2) \
|| ((__VALUE__) == LL_TIM_OCMODE_PULSE_ON_COMPARE) \
|| ((__VALUE__) == LL_TIM_OCMODE_DIRECTION_OUTPUT))
@@ -197,16 +197,16 @@
/** @defgroup TIM_LL_Private_Functions TIM Private Functions
* @{
*/
-static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC5Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus OC6Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
-static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
-static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
+static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
+static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
+static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
+static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
+static ErrorStatus OC5Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
+static ErrorStatus OC6Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct);
+static ErrorStatus IC1Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
+static ErrorStatus IC2Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
+static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
+static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct);
/**
* @}
*/
@@ -227,7 +227,7 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: invalid TIMx instance
*/
-ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx)
+ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx)
{
ErrorStatus result = SUCCESS;
@@ -331,7 +331,7 @@ void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct)
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
+ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct)
{
uint32_t tmpcr1;
@@ -412,7 +412,7 @@ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
* - SUCCESS: TIMx output channel is initialized
* - ERROR: TIMx output channel is not initialized
*/
-ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
+ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
{
ErrorStatus result = ERROR;
@@ -473,7 +473,7 @@ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
* - SUCCESS: TIMx output channel is initialized
* - ERROR: TIMx output channel is not initialized
*/
-ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct)
+ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct)
{
ErrorStatus result = ERROR;
@@ -527,7 +527,7 @@ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
+ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
{
uint32_t tmpccmr1;
uint32_t tmpccer;
@@ -620,7 +620,7 @@ void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorI
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
+ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
{
uint32_t tmpcr2;
uint32_t tmpccmr1;
@@ -734,7 +734,7 @@ void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
* - SUCCESS: Break and Dead Time is initialized
* - ERROR: not applicable
*/
-ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
+ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
{
uint32_t tmpbdtr = 0;
@@ -746,6 +746,8 @@ ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDT
assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState));
assert_param(IS_LL_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->BreakPolarity));
assert_param(IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->AutomaticOutput));
+ assert_param(IS_LL_TIM_BREAK_FILTER(TIM_BDTRInitStruct->BreakFilter));
+ assert_param(IS_LL_TIM_BREAK_AFMODE(TIM_BDTRInitStruct->BreakAFMode));
/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
the OSSI State, the dead time value and the Automatic Output Enable Bit */
@@ -758,14 +760,8 @@ ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDT
MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState);
MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity);
MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput);
- MODIFY_REG(tmpbdtr, TIM_BDTR_MOE, TIM_BDTRInitStruct->AutomaticOutput);
- if (IS_TIM_ADVANCED_INSTANCE(TIMx))
- {
- assert_param(IS_LL_TIM_BREAK_FILTER(TIM_BDTRInitStruct->BreakFilter));
- assert_param(IS_LL_TIM_BREAK_AFMODE(TIM_BDTRInitStruct->BreakAFMode));
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter);
- MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode);
- }
+ MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter);
+ MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, TIM_BDTRInitStruct->BreakAFMode);
if (IS_TIM_BKIN2_INSTANCE(TIMx))
{
@@ -806,7 +802,7 @@ ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDT
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
{
uint32_t tmpccmr1;
uint32_t tmpccer;
@@ -817,8 +813,6 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 1: Reset the CC1E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E);
@@ -846,8 +840,10 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U);
@@ -885,7 +881,7 @@ static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
{
uint32_t tmpccmr1;
uint32_t tmpccer;
@@ -896,8 +892,6 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 2: Reset the CC2E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E);
@@ -925,8 +919,10 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U);
@@ -964,7 +960,7 @@ static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
{
uint32_t tmpccmr2;
uint32_t tmpccer;
@@ -975,8 +971,6 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
/* Disable the Channel 3: Reset the CC3E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E);
@@ -1004,8 +998,10 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U);
@@ -1043,7 +1039,7 @@ static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
{
uint32_t tmpccmr2;
uint32_t tmpccer;
@@ -1054,8 +1050,6 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity));
- assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
- assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
/* Disable the Channel 4: Reset the CC4E Bit */
CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
@@ -1083,8 +1077,10 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
if (IS_TIM_BREAK_INSTANCE(TIMx))
{
- assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState));
+ assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
+ assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
+ assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
/* Set the complementary output Polarity */
MODIFY_REG(tmpccer, TIM_CCER_CC4NP, TIM_OCInitStruct->OCNPolarity << 14U);
@@ -1122,7 +1118,7 @@ static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus OC5Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+static ErrorStatus OC5Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
{
uint32_t tmpccmr3;
uint32_t tmpccer;
@@ -1183,7 +1179,7 @@ static ErrorStatus OC5Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus OC6Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+static ErrorStatus OC6Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
{
uint32_t tmpccmr3;
uint32_t tmpccer;
@@ -1243,7 +1239,7 @@ static ErrorStatus OC6Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
+static ErrorStatus IC1Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
@@ -1276,7 +1272,7 @@ static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
+static ErrorStatus IC2Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(TIMx));
@@ -1309,7 +1305,7 @@ static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
+static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(TIMx));
@@ -1342,7 +1338,7 @@ static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni
* - SUCCESS: TIMx registers are de-initialized
* - ERROR: not applicable
*/
-static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
+static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(TIMx));
@@ -1359,7 +1355,7 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni
(TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC),
(TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPrescaler) >> 8U);
- /* Select the Polarity and set the CC2E Bit */
+ /* Select the Polarity and set the CC4E Bit */
MODIFY_REG(TIMx->CCER,
(TIM_CCER_CC4P | TIM_CCER_CC4NP),
((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E));
diff --git a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c
similarity index 84%
rename from example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c
rename to example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c
index 296f701a..d971b05d 100644
--- a/example/STMViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c
+++ b/example/MCUViewer_test/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c
@@ -46,7 +46,7 @@
/* Defines used for PLL range */
#define UTILS_PLLVCO_INPUT_MIN 2660000U /*!< Frequency min for PLLVCO input, in Hz */
-#define UTILS_PLLVCO_INPUT_MAX 8000000U /*!< Frequency max for PLLVCO input, in Hz */
+#define UTILS_PLLVCO_INPUT_MAX 16000000U /*!< Frequency max for PLLVCO input, in Hz */
#define UTILS_PLLVCO_OUTPUT_MIN 64000000U /*!< Frequency min for PLLVCO output, in Hz */
#define UTILS_PLLVCO_OUTPUT_MAX 344000000U /*!< Frequency max for PLLVCO output, in Hz */
@@ -55,18 +55,21 @@
#define UTILS_HSE_FREQUENCY_MAX 48000000U /*!< Frequency max for HSE frequency, in Hz */
/* Defines used for FLASH latency according to HCLK Frequency */
-#define UTILS_SCALE1_LATENCY1_FREQ 20000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 1 */
-#define UTILS_SCALE1_LATENCY2_FREQ 40000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 1 */
-#define UTILS_SCALE1_LATENCY3_FREQ 60000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 1 */
-#define UTILS_SCALE1_LATENCY4_FREQ 80000000U /*!< HCLK frequency to set FLASH latency 4 in power scale 1 */
-#define UTILS_SCALE1_LATENCY5_FREQ 100000000U /*!< HCLK frequency to set FLASH latency 5 in power scale 1 */
-#define UTILS_SCALE1_LATENCY6_FREQ 120000000U /*!< HCLK frequency to set FLASH latency 6 in power scale 1 */
-#define UTILS_SCALE1_LATENCY7_FREQ 140000000U /*!< HCLK frequency to set FLASH latency 7 in power scale 1 */
-#define UTILS_SCALE1_LATENCY8_FREQ 160000000U /*!< HCLK frequency to set FLASH latency 8 in power scale 1 */
-#define UTILS_SCALE1_LATENCY9_FREQ 170000000U /*!< HCLK frequency to set FLASH latency 9 in power scale 1 */
-#define UTILS_SCALE2_LATENCY1_FREQ 8000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 2 */
-#define UTILS_SCALE2_LATENCY2_FREQ 16000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 2 */
-#define UTILS_SCALE2_LATENCY3_FREQ 26000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 2 */
+#define UTILS_SCALE1_LATENCY1_BOOST_FREQ 34000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 1 */
+#define UTILS_SCALE1_LATENCY2_BOOST_FREQ 68000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 1 */
+#define UTILS_SCALE1_LATENCY3_BOOST_FREQ 102000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 1 */
+#define UTILS_SCALE1_LATENCY4_BOOST_FREQ 136000000U /*!< HCLK frequency to set FLASH latency 4 in power scale 1 */
+#define UTILS_SCALE1_LATENCY5_BOOST_FREQ 170000000U /*!< HCLK frequency to set FLASH latency 5 in power scale 1 */
+
+#define UTILS_SCALE1_LATENCY1_FREQ 30000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 1 normal mode */
+#define UTILS_SCALE1_LATENCY2_FREQ 60000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 1 normal mode */
+#define UTILS_SCALE1_LATENCY3_FREQ 90000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 1 normal mode */
+#define UTILS_SCALE1_LATENCY4_FREQ 120000000U /*!< HCLK frequency to set FLASH latency 4 in power scale 1 normal mode */
+#define UTILS_SCALE1_LATENCY5_FREQ 150000000U /*!< HCLK frequency to set FLASH latency 5 in power scale 1 normal mode */
+
+#define UTILS_SCALE2_LATENCY1_FREQ 12000000U /*!< HCLK frequency to set FLASH latency 1 in power scale 2 */
+#define UTILS_SCALE2_LATENCY2_FREQ 24000000U /*!< HCLK frequency to set FLASH latency 2 in power scale 2 */
+#define UTILS_SCALE2_LATENCY3_FREQ 26000000U /*!< HCLK frequency to set FLASH latency 3 in power scale 2 */
/**
* @}
*/
@@ -223,31 +226,22 @@ void LL_mDelay(uint32_t Delay)
Depending on the device voltage range, the maximum frequency should be
adapted accordingly:
- (++) Table 1. HCLK clock frequency for STM32G4xx devices
- (++) +--------------------------------------------------------+
- (++) | Latency | HCLK clock frequency (MHz) |
- (++) | |--------------------------------------|
- (++) | | voltage range 1 | voltage range 2 |
- (++) | | 1.2 V | 1.0 V |
- (++) |-----------------|-------------------|------------------|
- (++) |0WS(1 CPU cycles)| 0 < HCLK <= 20 | 0 < HCLK <= 8 |
- (++) |-----------------|-------------------|------------------|
- (++) |1WS(2 CPU cycles)| 20 < HCLK <= 40 | 8 < HCLK <= 16 |
- (++) |-----------------|-------------------|------------------|
- (++) |2WS(3 CPU cycles)| 40 < HCLK <= 60 | 16 < HCLK <= 26 |
- (++) |-----------------|-------------------|------------------|
- (++) |3WS(4 CPU cycles)| 60 < HCLK <= 80 | 16 < HCLK <= 26 |
- (++) |-----------------|-------------------|------------------|
- (++) |4WS(5 CPU cycles)| 80 < HCLK <= 100 | 16 < HCLK <= 26 |
- (++) |-----------------|-------------------|------------------|
- (++) |5WS(6 CPU cycles)| 100 < HCLK <= 120 | 16 < HCLK <= 26 |
- (++) |-----------------|-------------------|------------------|
- (++) |6WS(7 CPU cycles)| 120 < HCLK <= 140 | 16 < HCLK <= 26 |
- (++) |-----------------|-------------------|------------------|
- (++) |7WS(8 CPU cycles)| 140 < HCLK <= 160 | 16 < HCLK <= 26 |
- (++) |-----------------|-------------------|------------------|
- (++) |8WS(9 CPU cycles)| 160 < HCLK <= 170 | 16 < HCLK <= 26 |
- (++) +--------------------------------------------------------+
+ +----------------------------------------------------------------------------+
+ | Latency | HCLK clock frequency (MHz) |
+ | |----------------------------------------------------------|
+ | | voltage range 1 | voltage range 1 | voltage range 2 |
+ | | boost mode 1.28 V | normal mode 1.2 V | 1.0 V |
+ |-----------------|-------------------|-------------------|------------------|
+ |0WS(1 CPU cycles)| HCLK <= 34 | HCLK <= 30 | HCLK <= 12 |
+ |-----------------|-------------------|-------------------|------------------|
+ |1WS(2 CPU cycles)| HCLK <= 68 | HCLK <= 60 | HCLK <= 24 |
+ |-----------------|-------------------|-------------------|------------------|
+ |2WS(3 CPU cycles)| HCLK <= 102 | HCLK <= 90 | HCLK <= 26 |
+ |-----------------|-------------------|-------------------|------------------|
+ |3WS(4 CPU cycles)| HCLK <= 136 | HCLK <= 120 | - |
+ |-----------------|-------------------|-------------------|------------------|
+ |4WS(5 CPU cycles)| HCLK <= 170 | HCLK <= 150 | - |
+ +----------------------------------------------------------------------------+
@endinternal
@@ -279,80 +273,95 @@ ErrorStatus LL_SetFlashLatency(uint32_t HCLKFrequency)
uint32_t timeout;
uint32_t getlatency;
ErrorStatus status = SUCCESS;
+ uint32_t regulatorstatus = LL_PWR_GetRegulVoltageScaling();
+ uint32_t regulatorbooststatus = LL_PWR_IsEnabledRange1BoostMode();
uint32_t latency = LL_FLASH_LATENCY_0; /* default value 0WS */
/* Frequency cannot be equal to 0 or greater than max clock */
- if((HCLKFrequency == 0U) || (HCLKFrequency > UTILS_SCALE1_LATENCY9_FREQ))
+ if((HCLKFrequency == 0U) || (HCLKFrequency > UTILS_SCALE1_LATENCY5_BOOST_FREQ))
{
status = ERROR;
}
else
{
- if(LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1)
+ if((regulatorstatus == LL_PWR_REGU_VOLTAGE_SCALE1) && (regulatorbooststatus == 1U))
{
- if(HCLKFrequency > UTILS_SCALE1_LATENCY8_FREQ)
+ if(HCLKFrequency > UTILS_SCALE1_LATENCY4_BOOST_FREQ)
{
- /* 160 < HCLK <= 170 => 8WS (9 CPU cycles) */
- latency = LL_FLASH_LATENCY_8;
+ /* 136 < HCLK <= 170 => 4WS (5 CPU cycles) */
+ latency = LL_FLASH_LATENCY_4;
}
- else if(HCLKFrequency > UTILS_SCALE1_LATENCY7_FREQ)
+ else if(HCLKFrequency > UTILS_SCALE1_LATENCY3_BOOST_FREQ)
{
- /* 140 < HCLK <= 160 => 7WS (8 CPU cycles) */
- latency = LL_FLASH_LATENCY_7;
+ /* 102 < HCLK <= 136 => 3WS (4 CPU cycles) */
+ latency = LL_FLASH_LATENCY_3;
}
- else if(HCLKFrequency > UTILS_SCALE1_LATENCY6_FREQ)
+ else if(HCLKFrequency > UTILS_SCALE1_LATENCY2_BOOST_FREQ)
{
- /* 120 < HCLK <= 140 => 6WS (7 CPU cycles) */
- latency = LL_FLASH_LATENCY_6;
+ /* 68 < HCLK <= 102 => 2WS (3 CPU cycles) */
+ latency = LL_FLASH_LATENCY_2;
}
- else if(HCLKFrequency > UTILS_SCALE1_LATENCY5_FREQ)
+ else
{
- /* 100 < HCLK <= 120 => 5WS (6 CPU cycles) */
- latency = LL_FLASH_LATENCY_5;
+ if(HCLKFrequency > UTILS_SCALE1_LATENCY1_BOOST_FREQ)
+ {
+ /* 34 < HCLK <= 68 => 1WS (2 CPU cycles) */
+ latency = LL_FLASH_LATENCY_1;
+ }
+ /* else HCLKFrequency <= 10MHz default LL_FLASH_LATENCY_0 0WS */
}
- else if(HCLKFrequency > UTILS_SCALE1_LATENCY4_FREQ)
+ }
+ /* SCALE1 normal mode*/
+ else if(regulatorstatus == LL_PWR_REGU_VOLTAGE_SCALE1)
+ {
+ if(HCLKFrequency > UTILS_SCALE1_LATENCY4_FREQ)
{
- /* 80 < HCLK <= 100 => 4WS (5 CPU cycles) */
+ /* 120 < HCLK <= 150 => 4WS (5 CPU cycles) */
latency = LL_FLASH_LATENCY_4;
}
else if(HCLKFrequency > UTILS_SCALE1_LATENCY3_FREQ)
{
- /* 60 < HCLK <= 80 => 3WS (4 CPU cycles) */
+ /* 90 < HCLK <= 120 => 3WS (4 CPU cycles) */
latency = LL_FLASH_LATENCY_3;
}
else if(HCLKFrequency > UTILS_SCALE1_LATENCY2_FREQ)
{
- /* 40 < HCLK <= 60 => 2WS (3 CPU cycles) */
+ /* 60 < HCLK <= 90 => 2WS (3 CPU cycles) */
latency = LL_FLASH_LATENCY_2;
}
else
{
if(HCLKFrequency > UTILS_SCALE1_LATENCY1_FREQ)
{
- /* 20 < HCLK <= 40 => 1WS (2 CPU cycles) */
+ /* 30 < HCLK <= 60 => 1WS (2 CPU cycles) */
latency = LL_FLASH_LATENCY_1;
}
/* else HCLKFrequency <= 10MHz default LL_FLASH_LATENCY_0 0WS */
}
}
- else /* SCALE2 */
+ /* SCALE2 */
+ else if(regulatorstatus == LL_PWR_REGU_VOLTAGE_SCALE2)
{
if(HCLKFrequency > UTILS_SCALE2_LATENCY2_FREQ)
{
- /* 16 < HCLK <= 26 => 2WS (3 CPU cycles) */
+ /* 24 < HCLK <= 26 => 2WS (3 CPU cycles) */
latency = LL_FLASH_LATENCY_2;
}
else
{
if(HCLKFrequency > UTILS_SCALE2_LATENCY1_FREQ)
{
- /* 8 < HCLK <= 16 => 1WS (2 CPU cycles) */
+ /* 12 < HCLK <= 24 => 1WS (2 CPU cycles) */
latency = LL_FLASH_LATENCY_1;
}
/* else HCLKFrequency <= 8MHz default LL_FLASH_LATENCY_0 0WS */
}
}
+ else
+ {
+ /* Nothing to do */
+ }
if (status != ERROR)
{
diff --git a/example/MCUViewer_test/MCUViewer_project/MCUViewer_test.cfg b/example/MCUViewer_test/MCUViewer_project/MCUViewer_test.cfg
new file mode 100644
index 00000000..05b5a68b
--- /dev/null
+++ b/example/MCUViewer_test/MCUViewer_project/MCUViewer_test.cfg
@@ -0,0 +1,762 @@
+[elf]
+file_path = ..\Debug\MCUViewer_test.elf
+
+[settings]
+version = 0
+sample_frequency_hz = 1000
+max_points = 1000
+max_viewport_points = 1000
+refresh_on_elf_change = true
+stop_acq_on_elf_change = true
+probe_type = 1
+target_name = STM32G474CC
+probe_mode = 1
+probe_speed_khz = 50000
+probe_sn = 506003225
+should_log = false
+log_directory =
+gdb_command = gdb
+
+[trace_settings]
+core_frequency = 150000
+trace_prescaler = 1
+max_points = 10000
+max_viewport_points_percent = 10
+trigger_channel = -1
+trigger_level = 0.000000
+timeout = 2
+probe_type = 1
+target_name = STM32G474CC
+probe_speed_khz = 10000
+probe_sn = 506003225
+should_log = false
+log_directory = C:/Users/klonyyy/PROJECTS/MCUViewer_/MCUViewer/example/STMViewer_test/MCUViewer_project
+
+[var0]
+name = LissajousX
+tracked_name = LissajousX
+address = 536871044
+type = 7
+color = 320274176
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var1]
+name = LissajousY1
+tracked_name = LissajousY1
+address = 536871048
+type = 7
+color = 4143382783
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var2]
+name = LissajousY2
+tracked_name = LissajousY2
+address = 536871052
+type = 7
+color = 2332065791
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var3]
+name = LissajousY3
+tracked_name = LissajousY3
+address = 536871056
+type = 7
+color = 251723767
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var4]
+name = petalsNumber
+tracked_name = petalsNumber
+address = 536870912
+type = 7
+color = 4253359594
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var5]
+name = roseX
+tracked_name = roseX
+address = 536871060
+type = 7
+color = 658572009
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var6]
+name = roseY
+tracked_name = roseY
+address = 536871064
+type = 7
+color = 154087309
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var7]
+name = smallRoseY
+tracked_name = smallRoseY
+address = 536871068
+type = 7
+color = 167837529
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var8]
+name = test.a
+tracked_name = test.a
+address = 536870988
+type = 7
+color = 61695
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var9]
+name = test.amplitude
+tracked_name = test.amplitude
+address = 536871028
+type = 7
+color = 4103602261
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var10]
+name = test.b
+tracked_name = test.b
+address = 536870992
+type = 7
+color = 255
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var11]
+name = test.c
+tracked_name = test.c
+address = 536870996
+type = 7
+color = 65317
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var12]
+name = test.ia
+tracked_name = test.ia
+address = 536871016
+type = 2
+color = 25087
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var13]
+name = test.square
+tracked_name = test.square
+address = 536871024
+type = 7
+color = 16308992
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var14]
+name = test.structA.a
+tracked_name = test.structA.a
+address = 536870960
+type = 1
+color = 154518361
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var15]
+name = test.structA.b
+tracked_name = test.structA.b
+address = 536870961
+type = 1
+color = 4185286018
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var16]
+name = test.structA.c
+tracked_name = test.structA.c
+address = 536870962
+type = 2
+color = 2200812724
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var17]
+name = test.structA.d
+tracked_name = test.structA.d
+address = 536870963
+type = 1
+color = 166619826
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var18]
+name = test.structA.e
+tracked_name = test.structA.e
+address = 536870964
+type = 1
+color = 3902659492
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var19]
+name = test.structA.f
+tracked_name = test.structA.f
+address = 536870965
+type = 3
+color = 3566472135
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var20]
+name = test.structA.g
+tracked_name = test.structA.g
+address = 536870967
+type = 4
+color = 3877610779
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var21]
+name = test.structA.h
+tracked_name = test.structA.h
+address = 536870969
+type = 6
+color = 2692520777
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var22]
+name = test.structA.j
+tracked_name = test.structA.j
+address = 536870974
+type = 7
+color = 1586018970
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var23]
+name = test.tri
+tracked_name = test.tri
+address = 536871008
+type = 2
+color = 65377
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var24]
+name = test.triangle
+tracked_name = test.triangle
+address = 536870980
+type = 7
+color = 2649686271
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var25]
+name = test.triangleFrequency
+tracked_name = test.triangleFrequency
+address = 536870984
+type = 7
+color = 2546052388
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var26]
+name = test.ua
+tracked_name = test.ua
+address = 536871009
+type = 1
+color = 255
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[var27]
+name = test.ub
+tracked_name = test.ub
+address = 536871010
+type = 3
+color = 65512
+should_update_from_elf = true
+shift = 0
+mask = 4294967295
+high_level_type = 0
+
+[plot0]
+name = Lissajous
+type = 3
+x_axis_variable = LissajousX
+
+[plot0-series0]
+name = LissajousX
+visibility = false
+format = DEC
+
+[plot0-series1]
+name = LissajousY1
+visibility = true
+format = DEC
+
+[plot0-series2]
+name = LissajousY2
+visibility = true
+format = DEC
+
+[plot0-series3]
+name = LissajousY3
+visibility = true
+format = DEC
+
+[plot1]
+name = Rose
+type = 3
+x_axis_variable = roseX
+
+[plot1-series0]
+name = roseY
+visibility = true
+format = DEC
+
+[plot1-series1]
+name = smallRoseY
+visibility = true
+format = DEC
+
+[plot2]
+name = Rose control
+type = 2
+
+[plot2-series0]
+name = petalsNumber
+visibility = true
+format = DEC
+
+[plot3]
+name = XY
+type = 3
+x_axis_variable = test.a
+
+[plot3-series0]
+name = test.a
+visibility = true
+format = DEC
+
+[plot3-series1]
+name = test.b
+visibility = true
+format = DEC
+
+[plot3-series2]
+name = test.c
+visibility = true
+format = DEC
+
+[plot3-series3]
+name = test.triangle
+visibility = true
+format = DEC
+
+[plot4]
+name = align test
+type = 2
+
+[plot4-series0]
+name = test.amplitude
+visibility = true
+format = DEC
+
+[plot4-series1]
+name = test.structA.a
+visibility = true
+format = BIN
+
+[plot4-series2]
+name = test.structA.b
+visibility = true
+format = HEX
+
+[plot4-series3]
+name = test.structA.c
+visibility = true
+format = DEC
+
+[plot4-series4]
+name = test.structA.f
+visibility = true
+format = DEC
+
+[plot4-series5]
+name = test.structA.g
+visibility = true
+format = DEC
+
+[plot4-series6]
+name = test.structA.h
+visibility = true
+format = BIN
+
+[plot4-series7]
+name = test.structA.j
+visibility = true
+format = DEC
+
+[plot4-series8]
+name = test.triangleFrequency
+visibility = true
+format = DEC
+
+[plot5]
+name = dupa
+type = 0
+
+[plot5-series0]
+name = test.square
+visibility = true
+format = DEC
+
+[plot5-series1]
+name = test.structA.a
+visibility = true
+format = DEC
+
+[plot5-series2]
+name = test.structA.b
+visibility = true
+format = DEC
+
+[plot5-series3]
+name = test.structA.c
+visibility = true
+format = DEC
+
+[plot5-series4]
+name = test.structA.d
+visibility = true
+format = DEC
+
+[plot6]
+name = new plot0
+type = 0
+
+[plot6-series0]
+name = test.a
+visibility = true
+format = DEC
+
+[plot6-series1]
+name = test.b
+visibility = true
+format = DEC
+
+[plot6-series2]
+name = test.c
+visibility = true
+format = DEC
+
+[plot6-series3]
+name = test.triangle
+visibility = true
+format = DEC
+
+[plot7]
+name = new plot1
+type = 0
+
+[plot8]
+name = new plot2
+type = 0
+
+[plot9]
+name = new plot3
+type = 0
+
+[plot10]
+name = new plot4
+type = 2
+
+[plot10-series0]
+name = test.structA.f
+visibility = true
+format = DEC
+
+[plot11]
+name = settings
+type = 2
+
+[plot11-series0]
+name = test.amplitude
+visibility = true
+format = DEC
+
+[plot11-series1]
+name = test.triangleFrequency
+visibility = true
+format = DEC
+
+[plot12]
+name = sine signals
+type = 0
+
+[plot12-series0]
+name = test.a
+visibility = true
+format = DEC
+
+[plot12-series1]
+name = test.b
+visibility = true
+format = DEC
+
+[plot12-series2]
+name = test.c
+visibility = true
+format = DEC
+
+[plot12-series3]
+name = test.triangle
+visibility = true
+format = DEC
+
+[plot13]
+name = test0
+type = 0
+
+[plot13-series0]
+name = test.a
+visibility = true
+format = DEC
+
+[plot13-series1]
+name = test.amplitude
+visibility = true
+format = DEC
+
+[plot13-series2]
+name = test.b
+visibility = true
+format = DEC
+
+[plot13-series3]
+name = test.c
+visibility = true
+format = DEC
+
+[plot13-series4]
+name = test.tri
+visibility = true
+format = DEC
+
+[plot14]
+name = test1
+type = 0
+
+[plot14-series0]
+name = test.tri
+visibility = true
+format = DEC
+
+[plot14-series1]
+name = test.ua
+visibility = true
+format = DEC
+
+[plot14-series2]
+name = test.ub
+visibility = true
+format = DEC
+
+[plot15]
+name = triangle
+type = 0
+
+[plot15-series0]
+name = test.a
+visibility = true
+format = DEC
+
+[plot15-series1]
+name = test.b
+visibility = true
+format = DEC
+
+[plot15-series2]
+name = test.c
+visibility = true
+format = DEC
+
+[plot15-series3]
+name = test.triangle
+visibility = true
+format = DEC
+
+[group0]
+name = X-Y plot test
+
+[group0-plot0]
+name = Lissajous
+visibility = true
+
+[group0-plot1]
+name = Rose
+visibility = true
+
+[group0-plot2]
+name = Rose control
+visibility = true
+
+[group0-plot3]
+name = sine signals
+visibility = true
+
+[group1]
+name = default group
+
+[group1-plot0]
+name = align test
+visibility = true
+
+[group1-plot1]
+name = settings
+visibility = true
+
+[group1-plot2]
+name = sine signals
+visibility = false
+
+[group1-plot3]
+name = triangle
+visibility = true
+
+[group2]
+name = example signals
+
+[group2-plot0]
+name = XY
+visibility = true
+
+[group2-plot1]
+name = settings
+visibility = false
+
+[group2-plot2]
+name = sine signals
+visibility = true
+
+[trace_plot0]
+name = CH0
+alias = memcpy (0)
+visibility = true
+domain = 1
+
+[trace_plot1]
+name = CH1
+alias = SysTick (1)
+visibility = true
+domain = 1
+
+[trace_plot2]
+name = CH2
+alias = fast tri (2)
+visibility = true
+domain = 0
+type = 6
+
+[trace_plot3]
+name = CH3
+alias = TIM6 (3)
+visibility = true
+domain = 1
+
+[trace_plot4]
+name = CH4
+alias = CH4
+visibility = false
+domain = 1
+
+[trace_plot5]
+name = CH5
+alias = CH5
+visibility = false
+domain = 1
+
+[trace_plot6]
+name = CH6
+alias = CH6
+visibility = false
+domain = 1
+
+[trace_plot7]
+name = CH7
+alias = CH7
+visibility = false
+domain = 1
+
+[trace_plot8]
+name = CH8
+alias = CH8
+visibility = false
+domain = 1
+
+[trace_plot9]
+name = CH9
+alias = CH9
+visibility = false
+domain = 1
\ No newline at end of file
diff --git a/example/STMViewer_test/STMViewer_test.ioc b/example/MCUViewer_test/MCUViewer_test.ioc
similarity index 96%
rename from example/STMViewer_test/STMViewer_test.ioc
rename to example/MCUViewer_test/MCUViewer_test.ioc
index 0a70fd64..565cd40c 100644
--- a/example/STMViewer_test/STMViewer_test.ioc
+++ b/example/MCUViewer_test/MCUViewer_test.ioc
@@ -65,7 +65,7 @@ ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32G474CCUx
-ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.5.1
+ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.5.2
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=true
ProjectManager.HeapSize=0x200
@@ -74,10 +74,10 @@ ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=1
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
-ProjectManager.PreviousToolchain=
+ProjectManager.PreviousToolchain=STM32CubeIDE
ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=STMViewer_test.ioc
-ProjectManager.ProjectName=STMViewer_test
+ProjectManager.ProjectFileName=MCUViewer_test.ioc
+ProjectManager.ProjectName=MCUViewer_test
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE
diff --git a/example/STMViewer_test/MCUViewer_test Debug.launch b/example/MCUViewer_test/MCUViewer_test.launch
similarity index 95%
rename from example/STMViewer_test/MCUViewer_test Debug.launch
rename to example/MCUViewer_test/MCUViewer_test.launch
index a4a6e847..c02d6768 100644
--- a/example/STMViewer_test/MCUViewer_test Debug.launch
+++ b/example/MCUViewer_test/MCUViewer_test.launch
@@ -82,12 +82,17 @@
-
+
+
+
+
+
+
diff --git a/example/STMViewer_test/STM32G474CCUX_FLASH.ld b/example/MCUViewer_test/STM32G474CCUX_FLASH.ld
similarity index 96%
rename from example/STMViewer_test/STM32G474CCUX_FLASH.ld
rename to example/MCUViewer_test/STM32G474CCUX_FLASH.ld
index 3a6fa884..c50d1c76 100644
--- a/example/STMViewer_test/STM32G474CCUX_FLASH.ld
+++ b/example/MCUViewer_test/STM32G474CCUX_FLASH.ld
@@ -22,7 +22,7 @@
******************************************************************************
** @attention
**
-** Copyright (c) 2023 STMicroelectronics.
+** Copyright (c) 2024 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
@@ -38,8 +38,8 @@ ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
-_Min_Heap_Size = 0x200 ; /* required amount of heap */
-_Min_Stack_Size = 0x400 ; /* required amount of stack */
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
/* Memories definition */
MEMORY
diff --git a/example/STMViewer_test/STM32G474CCUX_RAM.ld b/example/MCUViewer_test/STM32G474CCUX_RAM.ld
similarity index 99%
rename from example/STMViewer_test/STM32G474CCUX_RAM.ld
rename to example/MCUViewer_test/STM32G474CCUX_RAM.ld
index 6c7bc2c1..2a1a8078 100644
--- a/example/STMViewer_test/STM32G474CCUX_RAM.ld
+++ b/example/MCUViewer_test/STM32G474CCUX_RAM.ld
@@ -22,7 +22,7 @@
******************************************************************************
** @attention
**
-** Copyright (c) 2023 STMicroelectronics.
+** Copyright (c) 2024 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
diff --git a/example/STMViewer_test/.clang-format b/example/STMViewer_test/.clang-format
deleted file mode 100644
index dfde8d5b..00000000
--- a/example/STMViewer_test/.clang-format
+++ /dev/null
@@ -1,183 +0,0 @@
----
-Language: Cpp
-# BasedOnStyle: Google
-AccessModifierOffset: -1
-AlignAfterOpenBracket: Align
-AlignConsecutiveMacros: true
-AlignConsecutiveAssignments: false
-AlignConsecutiveBitFields: false
-AlignConsecutiveDeclarations: false
-AlignEscapedNewlines: Left
-AlignTrailingComments: true
-AllowAllArgumentsOnNextLine: true
-AllowAllConstructorInitializersOnNextLine: true
-AllowAllParametersOfDeclarationOnNextLine: true
-AllowShortEnumsOnASingleLine: true
-AllowShortBlocksOnASingleLine: Never
-AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: All
-AllowShortLambdasOnASingleLine: All
-AllowShortIfStatementsOnASingleLine: WithoutElse
-AllowShortLoopsOnASingleLine: true
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: true
-AlwaysBreakTemplateDeclarations: Yes
-BinPackArguments: true
-BinPackParameters: true
-BraceWrapping:
- AfterCaseLabel: false
- AfterClass: false
- AfterControlStatement: Never
- AfterEnum: false
- AfterFunction: false
- AfterNamespace: false
- AfterObjCDeclaration: false
- AfterStruct: false
- AfterUnion: false
- AfterExternBlock: false
- BeforeCatch: false
- BeforeElse: false
- BeforeLambdaBody: false
- BeforeWhile: false
- IndentBraces: false
- SplitEmptyFunction: true
- SplitEmptyRecord: true
- SplitEmptyNamespace: true
-BreakBeforeBinaryOperators: None
-BreakBeforeBraces: Allman
-BreakBeforeInheritanceComma: false
-BreakInheritanceList: BeforeColon
-BreakBeforeTernaryOperators: true
-BreakConstructorInitializersBeforeComma: false
-BreakConstructorInitializers: BeforeColon
-BreakAfterJavaFieldAnnotations: false
-BreakStringLiterals: true
-ColumnLimit: 0
-CommentPragmas: '^ IWYU pragma:'
-CompactNamespaces: false
-ConstructorInitializerAllOnOneLineOrOnePerLine: true
-ConstructorInitializerIndentWidth: 4
-ContinuationIndentWidth: 4
-Cpp11BracedListStyle: true
-DeriveLineEnding: true
-DerivePointerAlignment: false
-DisableFormat: false
-ExperimentalAutoDetectBinPacking: false
-FixNamespaceComments: true
-ForEachMacros:
- - foreach
- - Q_FOREACH
- - BOOST_FOREACH
-IncludeBlocks: Regroup
-IncludeCategories:
- - Regex: '^'
- Priority: 2
- SortPriority: 0
- - Regex: '^<.*\.h>'
- Priority: 1
- SortPriority: 0
- - Regex: '^<.*'
- Priority: 2
- SortPriority: 0
- - Regex: '.*'
- Priority: 3
- SortPriority: 0
-IncludeIsMainRegex: '([-_](test|unittest))?$'
-IncludeIsMainSourceRegex: ''
-IndentCaseLabels: true
-IndentCaseBlocks: false
-IndentGotoLabels: true
-IndentPPDirectives: None
-IndentExternBlock: AfterExternBlock
-IndentWidth: 4
-IndentWrappedFunctionNames: false
-InsertTrailingCommas: None
-JavaScriptQuotes: Leave
-JavaScriptWrapImports: true
-KeepEmptyLinesAtTheStartOfBlocks: false
-MacroBlockBegin: ''
-MacroBlockEnd: ''
-MaxEmptyLinesToKeep: 1
-NamespaceIndentation: None
-ObjCBinPackProtocolList: Never
-ObjCBlockIndentWidth: 2
-ObjCBreakBeforeNestedBlockParam: true
-ObjCSpaceAfterProperty: false
-ObjCSpaceBeforeProtocolList: true
-PenaltyBreakAssignment: 2
-PenaltyBreakBeforeFirstCallParameter: 1
-PenaltyBreakComment: 300
-PenaltyBreakFirstLessLess: 120
-PenaltyBreakString: 1000
-PenaltyBreakTemplateDeclaration: 10
-PenaltyExcessCharacter: 1000000
-PenaltyReturnTypeOnItsOwnLine: 200
-PointerAlignment: Left
-RawStringFormats:
- - Language: Cpp
- Delimiters:
- - cc
- - CC
- - cpp
- - Cpp
- - CPP
- - 'c++'
- - 'C++'
- CanonicalDelimiter: ''
- BasedOnStyle: google
- - Language: TextProto
- Delimiters:
- - pb
- - PB
- - proto
- - PROTO
- EnclosingFunctions:
- - EqualsProto
- - EquivToProto
- - PARSE_PARTIAL_TEXT_PROTO
- - PARSE_TEST_PROTO
- - PARSE_TEXT_PROTO
- - ParseTextOrDie
- - ParseTextProtoOrDie
- - ParseTestProto
- - ParsePartialTestProto
- CanonicalDelimiter: ''
- BasedOnStyle: google
-ReflowComments: true
-SortIncludes: true
-SortUsingDeclarations: true
-SpaceAfterCStyleCast: false
-SpaceAfterLogicalNot: false
-SpaceAfterTemplateKeyword: true
-SpaceBeforeAssignmentOperators: true
-SpaceBeforeCpp11BracedList: false
-SpaceBeforeCtorInitializerColon: true
-SpaceBeforeInheritanceColon: true
-SpaceBeforeParens: ControlStatements
-SpaceBeforeRangeBasedForLoopColon: true
-SpaceInEmptyBlock: false
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 2
-SpacesInAngles: false
-SpacesInConditionalStatement: false
-SpacesInContainerLiterals: true
-SpacesInCStyleCastParentheses: false
-SpacesInParentheses: false
-SpacesInSquareBrackets: false
-SpaceBeforeSquareBrackets: false
-BitFieldColonSpacing: Both
-Standard: Auto
-StatementMacros:
- - Q_UNUSED
- - QT_REQUIRE_VERSION
-TabWidth: 4
-UseCRLF: false
-UseTab: Always
-WhitespaceSensitiveMacros:
- - STRINGIZE
- - PP_STRINGIZE
- - BOOST_PP_STRINGIZE
-...
-
-
diff --git a/example/STMViewer_test/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs b/example/STMViewer_test/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
deleted file mode 100644
index 20461548..00000000
--- a/example/STMViewer_test/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs
+++ /dev/null
@@ -1,3 +0,0 @@
-eclipse.preferences.version=1
-svd_custom_file_path=
-svd_file_path=platform\:/plugin/com.st.stm32cube.ide.mcu.productdb.debug/resources/cmsis/STMicroelectronics_CMSIS_SVD/STM32G474xx.svd
diff --git a/example/STMViewer_test/.settings/org.eclipse.cdt.core.prefs b/example/STMViewer_test/.settings/org.eclipse.cdt.core.prefs
deleted file mode 100644
index 8c4fab40..00000000
--- a/example/STMViewer_test/.settings/org.eclipse.cdt.core.prefs
+++ /dev/null
@@ -1,195 +0,0 @@
-doxygen/doxygen_new_line_after_brief=true
-doxygen/doxygen_use_brief_tag=false
-doxygen/doxygen_use_javadoc_tags=true
-doxygen/doxygen_use_pre_tag=false
-doxygen/doxygen_use_structural_commands=false
-eclipse.preferences.version=1
-org.eclipse.cdt.core.code_formatter=org.wangzw.plugin.cppstyle.CppCodeFormatter
-org.eclipse.cdt.core.formatter.alignment_for_arguments_in_method_invocation=16
-org.eclipse.cdt.core.formatter.alignment_for_assignment=16
-org.eclipse.cdt.core.formatter.alignment_for_base_clause_in_type_declaration=80
-org.eclipse.cdt.core.formatter.alignment_for_binary_expression=16
-org.eclipse.cdt.core.formatter.alignment_for_compact_if=16
-org.eclipse.cdt.core.formatter.alignment_for_conditional_expression=34
-org.eclipse.cdt.core.formatter.alignment_for_conditional_expression_chain=18
-org.eclipse.cdt.core.formatter.alignment_for_constructor_initializer_list=0
-org.eclipse.cdt.core.formatter.alignment_for_declarator_list=16
-org.eclipse.cdt.core.formatter.alignment_for_enumerator_list=48
-org.eclipse.cdt.core.formatter.alignment_for_expression_list=0
-org.eclipse.cdt.core.formatter.alignment_for_expressions_in_array_initializer=16
-org.eclipse.cdt.core.formatter.alignment_for_lambda_expression=20
-org.eclipse.cdt.core.formatter.alignment_for_member_access=0
-org.eclipse.cdt.core.formatter.alignment_for_overloaded_left_shift_chain=16
-org.eclipse.cdt.core.formatter.alignment_for_parameters_in_method_declaration=16
-org.eclipse.cdt.core.formatter.alignment_for_throws_clause_in_method_declaration=16
-org.eclipse.cdt.core.formatter.brace_position_for_array_initializer=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_block=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_block_in_case=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_linkage_declaration=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_method_declaration=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_namespace_declaration=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_switch=end_of_line
-org.eclipse.cdt.core.formatter.brace_position_for_type_declaration=end_of_line
-org.eclipse.cdt.core.formatter.comment.line_up_line_comment_in_blocks_on_first_column=false
-org.eclipse.cdt.core.formatter.comment.min_distance_between_code_and_line_comment=1
-org.eclipse.cdt.core.formatter.comment.never_indent_line_comments_on_first_column=true
-org.eclipse.cdt.core.formatter.comment.preserve_white_space_between_code_and_line_comments=true
-org.eclipse.cdt.core.formatter.comment_formatter_off_tag=@formatter\:off
-org.eclipse.cdt.core.formatter.comment_formatter_on_tag=@formatter\:on
-org.eclipse.cdt.core.formatter.compact_else_if=true
-org.eclipse.cdt.core.formatter.continuation_indentation=2
-org.eclipse.cdt.core.formatter.continuation_indentation_for_array_initializer=2
-org.eclipse.cdt.core.formatter.format_block_comment=true
-org.eclipse.cdt.core.formatter.format_guardian_clause_on_one_line=false
-org.eclipse.cdt.core.formatter.format_header_comment=true
-org.eclipse.cdt.core.formatter.format_line_comment=true
-org.eclipse.cdt.core.formatter.indent_access_specifier_compare_to_type_header=false
-org.eclipse.cdt.core.formatter.indent_access_specifier_extra_spaces=0
-org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_access_specifier=true
-org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_linkage=false
-org.eclipse.cdt.core.formatter.indent_body_declarations_compare_to_namespace_header=false
-org.eclipse.cdt.core.formatter.indent_breaks_compare_to_cases=true
-org.eclipse.cdt.core.formatter.indent_declaration_compare_to_template_header=false
-org.eclipse.cdt.core.formatter.indent_empty_lines=false
-org.eclipse.cdt.core.formatter.indent_label_compare_to_statements=true
-org.eclipse.cdt.core.formatter.indent_statements_compare_to_block=true
-org.eclipse.cdt.core.formatter.indent_statements_compare_to_body=true
-org.eclipse.cdt.core.formatter.indent_switchstatements_compare_to_cases=true
-org.eclipse.cdt.core.formatter.indent_switchstatements_compare_to_switch=false
-org.eclipse.cdt.core.formatter.indentation.size=4
-org.eclipse.cdt.core.formatter.insert_new_line_after_colon_in_constructor_initializer_list=insert
-org.eclipse.cdt.core.formatter.insert_new_line_after_label=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_after_opening_brace_in_array_initializer=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_after_template_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_at_end_of_file_if_missing=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_before_catch_in_try_statement=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_before_closing_brace_in_array_initializer=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_before_colon_in_constructor_initializer_list=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_before_else_in_if_statement=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_before_identifier_in_function_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_before_while_in_do_statement=do not insert
-org.eclipse.cdt.core.formatter.insert_new_line_in_empty_block=insert
-org.eclipse.cdt.core.formatter.insert_space_after_assignment_operator=insert
-org.eclipse.cdt.core.formatter.insert_space_after_binary_operator=insert
-org.eclipse.cdt.core.formatter.insert_space_after_closing_angle_bracket_in_template_arguments=insert
-org.eclipse.cdt.core.formatter.insert_space_after_closing_angle_bracket_in_template_parameters=insert
-org.eclipse.cdt.core.formatter.insert_space_after_closing_brace_in_block=insert
-org.eclipse.cdt.core.formatter.insert_space_after_closing_paren_in_cast=insert
-org.eclipse.cdt.core.formatter.insert_space_after_colon_in_base_clause=insert
-org.eclipse.cdt.core.formatter.insert_space_after_colon_in_case=insert
-org.eclipse.cdt.core.formatter.insert_space_after_colon_in_conditional=insert
-org.eclipse.cdt.core.formatter.insert_space_after_colon_in_labeled_statement=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_array_initializer=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_base_types=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_declarator_list=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_enum_declarations=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_expression_list=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_declaration_parameters=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_declaration_throws=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_method_invocation_arguments=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_structured_binding_name_list=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_template_arguments=insert
-org.eclipse.cdt.core.formatter.insert_space_after_comma_in_template_parameters=insert
-org.eclipse.cdt.core.formatter.insert_space_after_lambda_return=insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_angle_bracket_in_template_arguments=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_angle_bracket_in_template_parameters=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_brace_in_array_initializer=insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_bracket=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_cast=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_catch=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_exception_specification=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_for=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_if=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_method_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_method_invocation=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_parenthesized_expression=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_switch=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_paren_in_while=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_opening_structured_binding_name_list=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_pointer_in_declarator_list=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_pointer_in_method_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_postfix_operator=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_prefix_operator=do not insert
-org.eclipse.cdt.core.formatter.insert_space_after_question_in_conditional=insert
-org.eclipse.cdt.core.formatter.insert_space_after_semicolon_in_for=insert
-org.eclipse.cdt.core.formatter.insert_space_after_unary_operator=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_assignment_operator=insert
-org.eclipse.cdt.core.formatter.insert_space_before_binary_operator=insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_angle_bracket_in_template_arguments=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_angle_bracket_in_template_parameters=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_brace_in_array_initializer=insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_bracket=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_cast=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_catch=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_exception_specification=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_for=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_if=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_method_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_method_invocation=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_parenthesized_expression=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_switch=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_paren_in_while=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_closing_structured_binding_name_list=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_colon_in_base_clause=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_colon_in_case=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_colon_in_conditional=insert
-org.eclipse.cdt.core.formatter.insert_space_before_colon_in_default=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_colon_in_labeled_statement=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_array_initializer=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_base_types=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_declarator_list=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_enum_declarations=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_expression_list=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_declaration_parameters=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_declaration_throws=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_method_invocation_arguments=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_structured_binding_name_list=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_template_arguments=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_comma_in_template_parameters=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_lambda_return=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_angle_bracket_in_template_arguments=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_angle_bracket_in_template_parameters=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_array_initializer=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_block=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_linkage_declaration=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_method_declaration=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_namespace_declaration=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_switch=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_brace_in_type_declaration=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_bracket=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_catch=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_exception_specification=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_for=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_if=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_method_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_method_invocation=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_parenthesized_expression=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_switch=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_paren_in_while=insert
-org.eclipse.cdt.core.formatter.insert_space_before_opening_structured_binding_name_list=insert
-org.eclipse.cdt.core.formatter.insert_space_before_pointer_in_declarator_list=insert
-org.eclipse.cdt.core.formatter.insert_space_before_pointer_in_method_declaration=insert
-org.eclipse.cdt.core.formatter.insert_space_before_postfix_operator=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_prefix_operator=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_question_in_conditional=insert
-org.eclipse.cdt.core.formatter.insert_space_before_ref_qualifier_in_structured_binding=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_semicolon=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_semicolon_in_for=do not insert
-org.eclipse.cdt.core.formatter.insert_space_before_unary_operator=do not insert
-org.eclipse.cdt.core.formatter.insert_space_between_empty_braces_in_array_initializer=do not insert
-org.eclipse.cdt.core.formatter.insert_space_between_empty_brackets=do not insert
-org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_exception_specification=do not insert
-org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_method_declaration=do not insert
-org.eclipse.cdt.core.formatter.insert_space_between_empty_parens_in_method_invocation=do not insert
-org.eclipse.cdt.core.formatter.join_wrapped_lines=true
-org.eclipse.cdt.core.formatter.keep_else_statement_on_same_line=false
-org.eclipse.cdt.core.formatter.keep_empty_array_initializer_on_one_line=false
-org.eclipse.cdt.core.formatter.keep_imple_if_on_one_line=false
-org.eclipse.cdt.core.formatter.keep_then_statement_on_same_line=false
-org.eclipse.cdt.core.formatter.lineSplit=80
-org.eclipse.cdt.core.formatter.number_of_empty_lines_to_preserve=1
-org.eclipse.cdt.core.formatter.put_empty_statement_on_new_line=true
-org.eclipse.cdt.core.formatter.tabulation.char=tab
-org.eclipse.cdt.core.formatter.tabulation.size=4
-org.eclipse.cdt.core.formatter.use_comment_formatter_tag=true
-org.eclipse.cdt.core.formatter.use_tabs_only_for_leading_indentations=false
diff --git a/example/STMViewer_test/.settings/org.eclipse.cdt.ui.prefs b/example/STMViewer_test/.settings/org.eclipse.cdt.ui.prefs
deleted file mode 100644
index d22a0e9a..00000000
--- a/example/STMViewer_test/.settings/org.eclipse.cdt.ui.prefs
+++ /dev/null
@@ -1,3 +0,0 @@
-eclipse.preferences.version=1
-formatter_profile=org.eclipse.cdt.ui.default.kandr_profile
-formatter_settings_version=1
diff --git a/example/STMViewer_test/.settings/stm32cubeide.project.prefs b/example/STMViewer_test/.settings/stm32cubeide.project.prefs
deleted file mode 100644
index f1119a9c..00000000
--- a/example/STMViewer_test/.settings/stm32cubeide.project.prefs
+++ /dev/null
@@ -1,6 +0,0 @@
-2F62501ED4689FB349E356AB974DBE57=B884A0A4E851FF025A54D349411145A8
-635E684B79701B039C64EA45C3F84D30=275E5B75CECD04302DC3C83FC223ABDA
-66BE74F758C12D739921AEA421D593D3=1
-8DF89ED150041C4CBC7CB9A9CAA90856=B884A0A4E851FF025A54D349411145A8
-DC22A860405A8BF2F2C095E5B6529F12=CEAA325DA909692B0ADE7E62FF07B5CE
-eclipse.preferences.version=1
diff --git a/example/STMViewer_test/MCUViewer_project/MCUViewer_test.cfg b/example/STMViewer_test/MCUViewer_project/MCUViewer_test.cfg
deleted file mode 100644
index bffdde0a..00000000
--- a/example/STMViewer_test/MCUViewer_project/MCUViewer_test.cfg
+++ /dev/null
@@ -1,378 +0,0 @@
-[elf]
-file_path = ../example/MCUViewer_test/Debug/MCUViewer_test.elf
-
-[settings]
-version = 0
-sample_frequency_hz = 1000000
-max_points = 10000
-max_viewport_points = 5000
-refresh_on_elf_change = true
-stop_acq_on_elf_change = true
-probe_type = 1
-target_name = STM32G474CC
-probe_mode = 1
-probe_speed_khz = 20000
-probe_sn = 506003225
-should_log = false
-log_directory =
-
-[trace_settings]
-core_frequency = 150000
-trace_prescaler = 1
-max_points = 10000
-max_viewport_points_percent = 10
-trigger_channel = -1
-trigger_level = 0.000000
-timeout = 2
-probe_type = 1
-target_name = STM32G474CC
-probe_speed_khz = 10000
-probe_sn = 506003225
-should_log = true
-log_directory = C:/Users/klonyyy/PROJECTS/MCUViewer_/MCUViewer/example/STMViewer_test/MCUViewer_project
-
-[var0]
-name = test.a
-address = 536870996
-type = 7
-color = 61695
-
-[var1]
-name = test.amplitude
-address = 536871036
-type = 7
-color = 4103602261
-
-[var2]
-name = test.b
-address = 536871000
-type = 7
-color = 255
-
-[var3]
-name = test.c
-address = 536871004
-type = 7
-color = 65317
-
-[var4]
-name = test.ia
-address = 536871024
-type = 2
-color = 25087
-
-[var5]
-name = test.square
-address = 536871032
-type = 7
-color = 16308992
-
-[var6]
-name = test.structA.a
-address = 536870968
-type = 1
-color = 154518361
-
-[var7]
-name = test.structA.b
-address = 536870969
-type = 1
-color = 4185286018
-
-[var8]
-name = test.structA.c
-address = 536870970
-type = 2
-color = 2200812724
-
-[var9]
-name = test.structA.d
-address = 536870971
-type = 1
-color = 166619826
-
-[var10]
-name = test.structA.e
-address = 536870972
-type = 1
-color = 3902659492
-
-[var11]
-name = test.structA.f
-address = 536870973
-type = 3
-color = 3566472135
-
-[var12]
-name = test.structA.g
-address = 536870975
-type = 4
-color = 3877610779
-
-[var13]
-name = test.structA.h
-address = 536870977
-type = 6
-color = 2692520777
-
-[var14]
-name = test.structA.j
-address = 536870982
-type = 7
-color = 1586018970
-
-[var15]
-name = test.tri
-address = 536871016
-type = 2
-color = 65377
-
-[var16]
-name = test.triangle
-address = 536870988
-type = 7
-color = 2649686271
-
-[var17]
-name = test.triangleFrequency
-address = 536870992
-type = 7
-color = 2546052388
-
-[var18]
-name = test.ua
-address = 536871017
-type = 1
-color = 255
-
-[var19]
-name = test.ub
-address = 536871018
-type = 3
-color = 65512
-
-[plot0]
-name = align test
-visibility = false
-type = 2
-
-[plot0-series0]
-name = test.amplitude
-visibility = true
-format = DEC
-
-[plot0-series1]
-name = test.structA.a
-visibility = true
-format = BIN
-
-[plot0-series2]
-name = test.structA.b
-visibility = true
-format = HEX
-
-[plot0-series3]
-name = test.structA.c
-visibility = false
-format = DEC
-
-[plot0-series4]
-name = test.structA.f
-visibility = true
-format = DEC
-
-[plot0-series5]
-name = test.structA.g
-visibility = false
-format = DEC
-
-[plot0-series6]
-name = test.structA.h
-visibility = true
-format = BIN
-
-[plot0-series7]
-name = test.structA.j
-visibility = true
-format = DEC
-
-[plot0-series8]
-name = test.triangleFrequency
-visibility = true
-format = DEC
-
-[plot1]
-name = settings
-visibility = true
-type = 1
-
-[plot1-series0]
-name = test.a
-visibility = true
-format = DEC
-
-[plot1-series1]
-name = test.amplitude
-visibility = true
-format = DEC
-
-[plot1-series2]
-name = test.triangleFrequency
-visibility = true
-format = DEC
-
-[plot2]
-name = test0
-visibility = true
-type = 0
-
-[plot2-series0]
-name = test.a
-visibility = true
-format = DEC
-
-[plot2-series1]
-name = test.amplitude
-visibility = true
-format = DEC
-
-[plot2-series2]
-name = test.b
-visibility = true
-format = DEC
-
-[plot2-series3]
-name = test.c
-visibility = true
-format = DEC
-
-[plot2-series4]
-name = test.tri
-visibility = true
-format = DEC
-
-[plot3]
-name = test1
-visibility = true
-type = 0
-
-[plot3-series0]
-name = test.tri
-visibility = true
-format = DEC
-
-[plot3-series1]
-name = test.ua
-visibility = true
-format = DEC
-
-[plot3-series2]
-name = test.ub
-visibility = true
-format = DEC
-
-[plot4]
-name = test2
-visibility = false
-type = 0
-
-[plot4-series0]
-name = test.a
-visibility = true
-format = DEC
-
-[plot4-series1]
-name = test.c
-visibility = true
-format = DEC
-
-[plot4-series2]
-name = test.square
-visibility = true
-format = DEC
-
-[plot5]
-name = triangle
-visibility = true
-type = 0
-
-[plot5-series0]
-name = test.a
-visibility = true
-format = DEC
-
-[plot5-series1]
-name = test.b
-visibility = true
-format = DEC
-
-[plot5-series2]
-name = test.c
-visibility = true
-format = DEC
-
-[plot5-series3]
-name = test.triangle
-visibility = true
-format = DEC
-
-[trace_plot0]
-name = CH0
-alias = memcpy (0)
-visibility = true
-domain = 1
-
-[trace_plot1]
-name = CH1
-alias = SysTick (1)
-visibility = true
-domain = 1
-
-[trace_plot2]
-name = CH2
-alias = fast tri (2)
-visibility = true
-domain = 0
-type = 6
-
-[trace_plot3]
-name = CH3
-alias = TIM6 (3)
-visibility = true
-domain = 1
-
-[trace_plot4]
-name = CH4
-alias = CH4
-visibility = false
-domain = 1
-
-[trace_plot5]
-name = CH5
-alias = CH5
-visibility = false
-domain = 1
-
-[trace_plot6]
-name = CH6
-alias = CH6
-visibility = false
-domain = 1
-
-[trace_plot7]
-name = CH7
-alias = CH7
-visibility = false
-domain = 1
-
-[trace_plot8]
-name = CH8
-alias = CH8
-visibility = false
-domain = 1
-
-[trace_plot9]
-name = CH9
-alias = CH9
-visibility = false
-domain = 1
\ No newline at end of file
diff --git a/example/STMViewer_test/test.jscope b/example/STMViewer_test/test.jscope
deleted file mode 100644
index 3885b625..00000000
--- a/example/STMViewer_test/test.jscope
+++ /dev/null
@@ -1,30 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/src/CSVStreamer/CSVStreamer.cpp b/src/CSVStreamer/CSVStreamer.cpp
index b64ac588..b5ac2245 100644
--- a/src/CSVStreamer/CSVStreamer.cpp
+++ b/src/CSVStreamer/CSVStreamer.cpp
@@ -32,7 +32,7 @@ CSVStreamer::~CSVStreamer()
finishLogging();
}
-bool CSVStreamer::prepareFile(std::string& directory)
+bool CSVStreamer::prepareFile(const std::string& directory)
{
filePath = directory + logFileName;
csvFile.open(filePath, std::ios::out);
@@ -44,10 +44,12 @@ bool CSVStreamer::prepareFile(std::string& directory)
return true;
}
-void CSVStreamer::createHeader(const std::vector& values)
+void CSVStreamer::createHeader(const std::vector& headerNames)
{
+ this->headerNames = headerNames;
+
std::string header = "time,";
- for (const auto& value : values)
+ for (const auto& value : headerNames)
{
header += value + ",";
}
@@ -55,12 +57,12 @@ void CSVStreamer::createHeader(const std::vector& values)
currentBuffer->appendLine(header);
}
-void CSVStreamer::writeLine(double time, const std::vector& values)
+void CSVStreamer::writeLine(double time, std::unordered_map& valuesMap)
{
std::string line = std::to_string(time) + ",";
- for (const auto& value : values)
+ for (const auto& name : headerNames)
{
- line += std::to_string(value) + ",";
+ line += std::to_string(valuesMap[name]) + ",";
}
line.back() = '\n';
diff --git a/src/CSVStreamer/CSVStreamer.hpp b/src/CSVStreamer/CSVStreamer.hpp
index 25a1010c..bb50728e 100644
--- a/src/CSVStreamer/CSVStreamer.hpp
+++ b/src/CSVStreamer/CSVStreamer.hpp
@@ -5,6 +5,7 @@
#include
#include
#include
+#include
#include "spdlog/spdlog.h"
@@ -27,16 +28,16 @@ class CSVStreamer
/// @brief Creates file in given directory with a fixed name
/// @param directory directory string
/// @return
- bool prepareFile(std::string& directory);
+ bool prepareFile(const std::string& directory);
/// @brief create csv file header from given argument, first column - time - is added internally
- /// @param values table headers
- void createHeader(const std::vector& values);
+ /// @param headerNames table headers
+ void createHeader(const std::vector& headerNames);
/// @brief writes single line to internal buffer
/// @param time
- /// @param values
- void writeLine(double time, const std::vector& values);
+ /// @param valuesMap
+ void writeLine(double time, std::unordered_map& valuesMap);
/// @brief exchanges the buffer that is being processed with the one that's being written to
void exchangeBuffers();
@@ -58,6 +59,7 @@ class CSVStreamer
Buffer buffer2{};
Buffer* currentBuffer;
Buffer* processingBuffer;
+ std::vector headerNames;
};
#endif
\ No newline at end of file
diff --git a/src/ConfigHandler/ConfigHandler.cpp b/src/ConfigHandler/ConfigHandler.cpp
index ac489cd4..437a4354 100644
--- a/src/ConfigHandler/ConfigHandler.cpp
+++ b/src/ConfigHandler/ConfigHandler.cpp
@@ -4,8 +4,19 @@
#include
#include
+#include "IDebugProbe.hpp"
+#include "ITraceProbe.hpp"
+
/* TODO refactor whole config and persistent storage handling */
-ConfigHandler::ConfigHandler(const std::string& configFilePath, PlotHandler* plotHandler, TracePlotHandler* tracePlotHandler, spdlog::logger* logger) : configFilePath(configFilePath), plotHandler(plotHandler), tracePlotHandler(tracePlotHandler), logger(logger)
+ConfigHandler::ConfigHandler(const std::string& configFilePath, PlotHandler* plotHandler, PlotHandler* tracePlotHandler, PlotGroupHandler* plotGroupHandler, VariableHandler* variableHandler, ViewerDataHandler* viewerDataHandler, TraceDataHandler* traceDataHandler, spdlog::logger* logger)
+ : configFilePath(configFilePath),
+ plotHandler(plotHandler),
+ tracePlotHandler(tracePlotHandler),
+ plotGroupHandler(plotGroupHandler),
+ variableHandler(variableHandler),
+ viewerDataHandler(viewerDataHandler),
+ traceDataHandler(traceDataHandler),
+ logger(logger)
{
ini = std::make_unique();
file = std::make_unique(configFilePath);
@@ -19,100 +30,55 @@ bool ConfigHandler::changeConfigFile(const std::string& newConfigFilePath)
return true;
}
-bool ConfigHandler::readConfigFile(std::map>& vars, std::string& elfPath)
+void ConfigHandler::loadVariables()
{
- PlotHandler::Settings viewerSettings{};
- TracePlotHandler::Settings traceSettings{};
- IDebugProbe::DebugProbeSettings debugProbeSettings{};
- ITraceProbe::TraceProbeSettings traceProbeSettings{};
-
- if (!file->read(*ini))
- return false;
-
uint32_t varId = 0;
std::string name = "xxx";
- elfPath = ini->get("elf").get("file_path");
+ /* needed for fractional varaibles postprocessing */
+ std::unordered_map fractionalBaseVariableNames;
auto varFieldFromID = [](uint32_t id)
{ return std::string("var" + std::to_string(id)); };
- auto getValue = [&](std::string&& category, std::string&& field, auto&& result)
- {
- try
- {
- std::string value = ini->get(category).get(field);
- parseValue(value, result);
- }
- catch (const std::exception& ex)
- {
- logger->error("config parsing exception {}", ex.what());
- }
- };
-
- getValue("settings", "version", globalSettings.version);
- getValue("settings", "sample_frequency_Hz", viewerSettings.sampleFrequencyHz);
- getValue("settings", "max_points", viewerSettings.maxPoints);
- getValue("settings", "max_viewport_points", viewerSettings.maxViewportPoints);
- getValue("settings", "stop_acq_on_elf_change", viewerSettings.stopAcqusitionOnElfChange);
- getValue("settings", "refresh_on_elf_change", viewerSettings.refreshAddressesOnElfChange);
- getValue("settings", "probe_type", debugProbeSettings.debugProbe);
- debugProbeSettings.device = ini->get("settings").get("target_name");
- getValue("settings", "probe_mode", debugProbeSettings.mode);
- getValue("settings", "probe_speed_kHz", debugProbeSettings.speedkHz);
- debugProbeSettings.serialNumber = ini->get("settings").get("probe_SN");
- getValue("settings", "should_log", viewerSettings.shouldLog);
- viewerSettings.logFilePath = ini->get("settings").get("log_directory");
-
- getValue("trace_settings", "core_frequency", traceSettings.coreFrequency);
- getValue("trace_settings", "trace_prescaler", traceSettings.tracePrescaler);
- getValue("trace_settings", "max_points", traceSettings.maxPoints);
- getValue("trace_settings", "max_viewport_points_percent", traceSettings.maxViewportPointsPercent);
- getValue("trace_settings", "trigger_channel", traceSettings.triggerChannel);
- getValue("trace_settings", "trigger_level", traceSettings.triggerLevel);
- getValue("trace_settings", "timeout", traceSettings.timeout);
- getValue("trace_settings", "probe_type", traceProbeSettings.debugProbe);
- traceProbeSettings.device = ini->get("trace_settings").get("target_name");
- getValue("trace_settings", "probe_speed_kHz", traceProbeSettings.speedkHz);
- traceProbeSettings.serialNumber = ini->get("trace_settings").get("probe_SN");
- getValue("trace_settings", "should_log", traceSettings.shouldLog);
- traceSettings.logFilePath = ini->get("trace_settings").get("log_directory");
-
- /* TODO magic numbers (lots of them)! */
- if (traceSettings.timeout == 0)
- traceSettings.timeout = 2;
-
- if (traceSettings.maxViewportPointsPercent == 0 && traceSettings.maxPoints == 0)
- traceSettings.triggerChannel = -1;
-
- if (traceSettings.maxViewportPointsPercent == 0)
- traceSettings.maxViewportPointsPercent = 50;
-
- if (traceSettings.maxPoints == 0)
- traceSettings.maxPoints = 10000;
-
- if (viewerSettings.sampleFrequencyHz == 0)
- viewerSettings.sampleFrequencyHz = 100;
-
- if (viewerSettings.maxPoints == 0)
- viewerSettings.maxPoints = 1000;
-
- if (viewerSettings.maxViewportPoints == 0)
- viewerSettings.maxViewportPoints = viewerSettings.maxPoints;
-
- if (debugProbeSettings.speedkHz == 0)
- debugProbeSettings.speedkHz = 100;
-
while (!name.empty())
{
name = ini->get(varFieldFromID(varId)).get("name");
- std::shared_ptr newVar = std::make_shared("");
+ std::shared_ptr newVar = std::make_shared(name);
+ std::string trackedName = ini->get(varFieldFromID(varId)).get("tracked_name");
+ if (trackedName.empty())
+ trackedName = name;
+ newVar->setTrackedName(trackedName);
+
+ if (trackedName != name)
+ newVar->setIsTrackedNameDifferent(true);
- newVar->setName(name);
newVar->setAddress(atoi(ini->get(varFieldFromID(varId)).get("address").c_str()));
- newVar->setType(static_cast(atoi(ini->get(varFieldFromID(varId)).get("type").c_str())));
+ newVar->setType(static_cast(atoi(ini->get(varFieldFromID(varId)).get("type").c_str())));
newVar->setColor(static_cast(atol(ini->get(varFieldFromID(varId)).get("color").c_str())));
+ newVar->setShift(atoi(ini->get(varFieldFromID(varId)).get("shift").c_str()));
+
+ Variable::HighLevelType highLevelType = static_cast(atoi(ini->get(varFieldFromID(varId)).get("high_level_type").c_str()));
+ newVar->setHighLevelType(highLevelType);
+ if (newVar->isFractional())
+ {
+ fractionalBaseVariableNames[name] = ini->get(varFieldFromID(varId)).get("base_variable");
+
+ Variable::Fractional frac = {.fractionalBits = static_cast(atoi(ini->get(varFieldFromID(varId)).get("frac").c_str())),
+ .base = atof(ini->get(varFieldFromID(varId)).get("base").c_str()),
+ .baseVariable = nullptr};
+ newVar->setFractional(frac);
+ }
+ uint32_t mask = atoi(ini->get(varFieldFromID(varId)).get("mask").c_str());
+ if (mask == 0)
+ mask = 0xFFFFFFFF;
+ newVar->setMask(mask);
+
+ std::string shouldUpdateFromElf = ini->get(varFieldFromID(varId)).get("should_update_from_elf");
+ if (shouldUpdateFromElf.empty())
+ shouldUpdateFromElf = "true";
+ newVar->setShouldUpdateFromElf(shouldUpdateFromElf == "true" ? true : false);
varId++;
if (newVar->getAddress() % 4 != 0)
@@ -120,38 +86,62 @@ bool ConfigHandler::readConfigFile(std::mapgetName().empty())
{
- vars[newVar->getName()] = newVar;
+ variableHandler->addVariable(newVar);
newVar->setIsFound(true);
logger->info("Adding variable: {}", newVar->getName());
}
}
- auto plotSeriesFieldFromID = [](uint32_t plotId, uint32_t seriesId)
- { return std::string("plot" + std::to_string(plotId) + "-" + "series" + std::to_string(seriesId)); };
+ /* varaible bases have to be handled after all variables are loaded */
+ for (auto& [varName, baseVarName] : fractionalBaseVariableNames)
+ {
+ Variable* baseVariable = nullptr;
+ auto variable = variableHandler->getVariable(varName);
- std::string plotName("xxx");
+ if (variableHandler->contains(baseVarName))
+ baseVariable = variableHandler->getVariable(baseVarName).get();
+ else
+ logger->error("Fractional variable {} has no base variable {}", varName, baseVarName);
+
+ Variable::Fractional frac = variable->getFractional();
+ frac.baseVariable = baseVariable;
+ variable->setFractional(frac);
+ }
+}
+
+void ConfigHandler::loadPlots()
+{
uint32_t plotNumber = 0;
+ std::string plotName("xxx");
+
+ auto plotSeriesFieldFromID = [](uint32_t plotId, uint32_t seriesId)
+ { return std::string("plot" + std::to_string(plotId) + "-" + "series" + std::to_string(seriesId)); };
while (!plotName.empty())
{
std::string sectionName("plot" + std::to_string(plotNumber));
plotName = ini->get(sectionName).get("name");
- bool visibility = ini->get(sectionName).get("visibility") == "true" ? true : false;
Plot::Type type = static_cast(atoi(ini->get(sectionName).get("type").c_str()));
if (!plotName.empty())
{
plotHandler->addPlot(plotName);
auto plot = plotHandler->getPlot(plotName);
- plot->setVisibility(visibility);
plot->setType(type);
+ if (type == Plot::Type::XY)
+ {
+ std::string xAxisVariable = ini->get(sectionName).get("x_axis_variable");
+ if (variableHandler->contains(xAxisVariable))
+ plot->setXAxisVariable(variableHandler->getVariable(xAxisVariable).get());
+ }
+
logger->info("Adding plot: {}", plotName);
uint32_t seriesNumber = 0;
std::string varName = ini->get(plotSeriesFieldFromID(plotNumber, seriesNumber)).get("name");
while (varName != "")
{
- plot->addSeries(*vars[varName]);
+ plot->addSeries(variableHandler->getVariable(varName).get());
bool visible = ini->get(plotSeriesFieldFromID(plotNumber, seriesNumber)).get("visibility") == "true" ? true : false;
plot->getSeries(varName)->visible = visible;
std::string displayFormat = ini->get(plotSeriesFieldFromID(plotNumber, seriesNumber)).get("format");
@@ -165,9 +155,11 @@ bool ConfigHandler::readConfigFile(std::map(plotName);
newVar->setColor(colors[(colormapSize - 1) - (plotNumber % colormapSize)]);
- tracePlotHandler->traceVars[plotName] = newVar;
- plot->addSeries(*newVar);
+ traceDataHandler->traceVars[plotName] = newVar;
+ plot->addSeries(newVar.get());
plot->getSeries(plotName)->visible = true;
}
plotNumber++;
}
+}
+
+void ConfigHandler::loadPlotGroups()
+{
+ uint32_t groupNumber = 0;
+ std::string groupName("xxx");
+
+ auto plotGroupFieldFromID = [](uint32_t groupId, uint32_t plotId, const std::string& prefix = "")
+ { return std::string(prefix + "group" + std::to_string(groupId) + "-" + "plot" + std::to_string(plotId)); };
+
+ plotGroupHandler->removeAllGroups();
+
+ while (!groupName.empty())
+ {
+ std::string sectionName("group" + std::to_string(groupNumber));
+ groupName = ini->get(sectionName).get("name");
- plotHandler->setSettings(viewerSettings);
- plotHandler->setProbeSettings(debugProbeSettings);
+ if (!groupName.empty())
+ {
+ auto group = plotGroupHandler->addGroup(groupName);
+ logger->info("Adding group: {}", groupName);
+ uint32_t plotNumber = 0;
+ std::string plotName = ini->get(plotGroupFieldFromID(groupNumber, plotNumber)).get("name");
+ std::string visibilityStr = ini->get(plotGroupFieldFromID(groupNumber, plotNumber)).get("visibility");
+ bool visibility = (visibilityStr == "true" || visibilityStr.empty()) ? true : false;
+
+ while (plotName != "")
+ {
+ group->addPlot(plotHandler->getPlot(plotName), visibility);
+ logger->info("Adding plot {} to group {}", plotName, groupName);
- tracePlotHandler->setSettings(traceSettings);
- tracePlotHandler->setProbeSettings(traceProbeSettings);
+ plotNumber++;
+ plotName = ini->get(plotGroupFieldFromID(groupNumber, plotNumber)).get("name");
+ visibilityStr = ini->get(plotGroupFieldFromID(groupNumber, plotNumber)).get("visibility");
+ visibility = (visibilityStr == "true" || visibilityStr.empty()) ? true : false;
+ }
+ }
+ groupNumber++;
+ }
+ /* Add all plots to the first group if there are no groups */
+ if (plotGroupHandler->getGroupCount() == 0)
+ {
+ std::string groupName = "default group";
+ auto group = plotGroupHandler->addGroup(groupName);
+ plotGroupHandler->setActiveGroup(groupName);
+ logger->info("Adding group: {}", groupName);
+
+ for (std::shared_ptr plot : *plotHandler)
+ group->addPlot(plot);
+ }
+}
+
+bool ConfigHandler::readConfigFile(std::string& elfPath)
+{
+ ViewerDataHandler::Settings viewerSettings{};
+ TraceDataHandler::Settings traceSettings{};
+ IDebugProbe::DebugProbeSettings debugProbeSettings{};
+ ITraceProbe::TraceProbeSettings traceProbeSettings{};
+
+ if (!file->read(*ini))
+ return false;
+
+ auto getValue = [&](std::string&& category, std::string&& field, auto&& result)
+ {
+ try
+ {
+ std::string value = ini->get(category).get(field);
+ parseValue(value, result);
+ }
+ catch (const std::exception& ex)
+ {
+ logger->error("config parsing exception {}", ex.what());
+ }
+ };
+
+ elfPath = ini->get("elf").get("file_path");
+
+ getValue("settings", "version", globalSettings.version);
+ getValue("settings", "sample_frequency_Hz", viewerSettings.sampleFrequencyHz);
+ getValue("settings", "max_points", viewerSettings.maxPoints);
+ getValue("settings", "max_viewport_points", viewerSettings.maxViewportPoints);
+ getValue("settings", "stop_acq_on_elf_change", viewerSettings.stopAcqusitionOnElfChange);
+ getValue("settings", "refresh_on_elf_change", viewerSettings.refreshAddressesOnElfChange);
+ getValue("settings", "probe_type", debugProbeSettings.debugProbe);
+ debugProbeSettings.device = ini->get("settings").get("target_name");
+ getValue("settings", "probe_mode", debugProbeSettings.mode);
+ getValue("settings", "probe_speed_kHz", debugProbeSettings.speedkHz);
+ debugProbeSettings.serialNumber = ini->get("settings").get("probe_SN");
+ getValue("settings", "should_log", viewerSettings.shouldLog);
+ viewerSettings.logFilePath = ini->get("settings").get("log_directory");
+ viewerSettings.gdbCommand = ini->get("settings").get("gdb_command");
+
+ if (viewerSettings.gdbCommand.empty())
+ viewerSettings.gdbCommand = "gdb";
+
+ getValue("trace_settings", "core_frequency", traceSettings.coreFrequency);
+ getValue("trace_settings", "trace_prescaler", traceSettings.tracePrescaler);
+ getValue("trace_settings", "max_points", traceSettings.maxPoints);
+ getValue("trace_settings", "max_viewport_points_percent", traceSettings.maxViewportPointsPercent);
+ getValue("trace_settings", "trigger_channel", traceSettings.triggerChannel);
+ getValue("trace_settings", "trigger_level", traceSettings.triggerLevel);
+ getValue("trace_settings", "timeout", traceSettings.timeout);
+ getValue("trace_settings", "probe_type", traceProbeSettings.debugProbe);
+ traceProbeSettings.device = ini->get("trace_settings").get("target_name");
+ getValue("trace_settings", "probe_speed_kHz", traceProbeSettings.speedkHz);
+ traceProbeSettings.serialNumber = ini->get("trace_settings").get("probe_SN");
+ getValue("trace_settings", "should_log", traceSettings.shouldLog);
+ traceSettings.logFilePath = ini->get("trace_settings").get("log_directory");
+
+ /* TODO magic numbers (lots of them)! */
+ if (traceSettings.timeout == 0)
+ traceSettings.timeout = 2;
+
+ if (traceSettings.maxViewportPointsPercent == 0 && traceSettings.maxPoints == 0)
+ traceSettings.triggerChannel = -1;
+
+ if (traceSettings.maxViewportPointsPercent == 0)
+ traceSettings.maxViewportPointsPercent = 50;
+
+ if (traceSettings.maxPoints == 0)
+ traceSettings.maxPoints = 10000;
+
+ if (viewerSettings.sampleFrequencyHz == 0)
+ viewerSettings.sampleFrequencyHz = 100;
+
+ if (viewerSettings.maxPoints == 0)
+ viewerSettings.maxPoints = 1000;
+
+ if (viewerSettings.maxViewportPoints == 0)
+ viewerSettings.maxViewportPoints = viewerSettings.maxPoints;
+
+ if (debugProbeSettings.speedkHz == 0)
+ debugProbeSettings.speedkHz = 100;
+
+ loadVariables();
+ loadPlots();
+ loadTracePlots();
+ loadPlotGroups();
+
+ viewerDataHandler->setSettings(viewerSettings);
+ viewerDataHandler->setProbeSettings(debugProbeSettings);
+
+ traceDataHandler->setSettings(traceSettings);
+ traceDataHandler->setProbeSettings(traceProbeSettings);
return true;
}
-bool ConfigHandler::saveConfigFile(std::map>& vars, const std::string& elfPath, const std::string& newSavePath)
+bool ConfigHandler::saveConfigFile(const std::string& elfPath, const std::string& newSavePath)
{
- PlotHandler::Settings viewerSettings = plotHandler->getSettings();
- TracePlotHandler::Settings traceSettings = tracePlotHandler->getSettings();
- IDebugProbe::DebugProbeSettings debugProbeSettings = plotHandler->getProbeSettings();
- ITraceProbe::TraceProbeSettings traceProbeSettings = tracePlotHandler->getProbeSettings();
+ *ini = prepareSaveConfigFile(elfPath);
- (*ini).clear();
+ if (newSavePath != "")
+ {
+ file.reset();
+ file = std::make_unique(newSavePath);
+ }
- (*ini)["elf"]["file_path"] = elfPath;
+ return file->generate(*ini, true);
+}
+
+mINI::INIStructure ConfigHandler::prepareSaveConfigFile(const std::string& elfPath)
+{
+ mINI::INIStructure configIni;
+
+ ViewerDataHandler::Settings viewerSettings = viewerDataHandler->getSettings();
+ TraceDataHandler::Settings traceSettings = traceDataHandler->getSettings();
+ IDebugProbe::DebugProbeSettings debugProbeSettings = viewerDataHandler->getProbeSettings();
+ ITraceProbe::TraceProbeSettings traceProbeSettings = traceDataHandler->getProbeSettings();
+
+ (configIni).clear();
+
+ (configIni)["elf"]["file_path"] = elfPath;
auto varFieldFromID = [](uint32_t id)
{ return std::string("var" + std::to_string(id)); };
@@ -226,45 +371,65 @@ bool ConfigHandler::saveConfigFile(std::map var : *variableHandler)
{
- (*ini)[varFieldFromID(varId)]["name"] = var->getName();
- (*ini)[varFieldFromID(varId)]["address"] = std::to_string(var->getAddress());
- (*ini)[varFieldFromID(varId)]["type"] = std::to_string(static_cast(var->getType()));
- (*ini)[varFieldFromID(varId)]["color"] = std::to_string(static_cast(var->getColorU32()));
+ (configIni)[varFieldFromID(varId)]["name"] = var->getName();
+ (configIni)[varFieldFromID(varId)]["tracked_name"] = var->getTrackedName();
+ (configIni)[varFieldFromID(varId)]["address"] = std::to_string(var->getAddress());
+ (configIni)[varFieldFromID(varId)]["type"] = std::to_string(static_cast(var->getType()));
+ (configIni)[varFieldFromID(varId)]["color"] = std::to_string(static_cast(var->getColorU32()));
+ (configIni)[varFieldFromID(varId)]["should_update_from_elf"] = var->getShouldUpdateFromElf() ? "true" : "false";
+ (configIni)[varFieldFromID(varId)]["shift"] = std::to_string(var->getShift());
+ (configIni)[varFieldFromID(varId)]["mask"] = std::to_string(var->getMask());
+ (configIni)[varFieldFromID(varId)]["high_level_type"] = std::to_string(static_cast(var->getHighLevelType()));
+
+ if (var->isFractional())
+ {
+ auto fractional = var->getFractional();
+ (configIni)[varFieldFromID(varId)]["frac"] = std::to_string(fractional.fractionalBits);
+ (configIni)[varFieldFromID(varId)]["base"] = std::to_string(fractional.base);
+ (configIni)[varFieldFromID(varId)]["base_variable"] = fractional.baseVariable != nullptr ? fractional.baseVariable->getName() : "";
+ }
varId++;
}
@@ -272,16 +437,18 @@ bool ConfigHandler::saveConfigFile(std::map plt : *plotHandler)
{
- (*ini)[plotFieldFromID(plotId)]["name"] = plt->getName();
- (*ini)[plotFieldFromID(plotId)]["visibility"] = plt->getVisibility() ? "true" : "false";
- (*ini)[plotFieldFromID(plotId)]["type"] = std::to_string(static_cast(plt->getType()));
+ (configIni)[plotFieldFromID(plotId)]["name"] = plt->getName();
+ (configIni)[plotFieldFromID(plotId)]["type"] = std::to_string(static_cast(plt->getType()));
+
+ if (plt->getType() == Plot::Type::XY)
+ (configIni)[plotFieldFromID(plotId)]["x_axis_variable"] = plt->getXAxisVariable() != nullptr ? plt->getXAxisVariable()->getName() : "";
uint32_t serId = 0;
for (auto& [key, ser] : plt->getSeriesMap())
{
- (*ini)[plotSeriesFieldFromID(plotId, serId)]["name"] = ser->var->getName();
- (*ini)[plotSeriesFieldFromID(plotId, serId)]["visibility"] = ser->visible ? "true" : "false";
+ (configIni)[plotSeriesFieldFromID(plotId, serId)]["name"] = ser->var->getName();
+ (configIni)[plotSeriesFieldFromID(plotId, serId)]["visibility"] = ser->visible ? "true" : "false";
std::string displayFormat = "DEC";
for (auto [format, value] : displayFormatMap)
@@ -293,32 +460,54 @@ bool ConfigHandler::saveConfigFile(std::mapgetName();
+
+ uint32_t plotId = 0;
+ for (auto& [name, plotElem] : *group)
+ {
+ auto plot = plotElem.plot;
+ bool visibility = plotElem.visibility;
+ (configIni)[plotGroupFieldFromID(groupId, plotId)]["name"] = plot->getName();
+ (configIni)[plotGroupFieldFromID(groupId, plotId)]["visibility"] = visibility ? "true" : "false";
+ plotId++;
+ }
+ groupId++;
+ }
+
plotId = 0;
for (std::shared_ptr plt : *tracePlotHandler)
{
const std::string plotName = plotFieldFromID(plotId, "trace_");
- (*ini)[plotName]["name"] = plt->getName();
- (*ini)[plotName]["alias"] = plt->getAlias();
- (*ini)[plotName]["visibility"] = plt->getVisibility() ? "true" : "false";
- (*ini)[plotName]["domain"] = std::to_string(static_cast(plt->getDomain()));
+ (configIni)[plotName]["name"] = plt->getName();
+ (configIni)[plotName]["alias"] = plt->getAlias();
+ (configIni)[plotName]["visibility"] = plt->getVisibility() ? "true" : "false";
+ (configIni)[plotName]["domain"] = std::to_string(static_cast(plt->getDomain()));
if (plt->getDomain() == Plot::Domain::ANALOG)
- (*ini)[plotName]["type"] = std::to_string(static_cast(plt->getTraceVarType()));
+ (configIni)[plotName]["type"] = std::to_string(static_cast(plt->getTraceVarType()));
plotId++;
}
- if (newSavePath != "")
- {
- file.reset();
- file = std::make_unique(newSavePath);
- }
+ return configIni;
+}
- return file->generate(*ini, true);
+bool ConfigHandler::isSavingRequired(const std::string& elfPath)
+{
+ mINI::INIStructure configIniFromApp = prepareSaveConfigFile(elfPath);
+ mINI::INIStructure configIniFromFile{};
+
+ if (!file->read(configIniFromFile))
+ return true;
+
+ return !(configIniFromApp == configIniFromFile);
}
\ No newline at end of file
diff --git a/src/ConfigHandler/ConfigHandler.hpp b/src/ConfigHandler/ConfigHandler.hpp
index 8b4f1cb1..db289992 100644
--- a/src/ConfigHandler/ConfigHandler.hpp
+++ b/src/ConfigHandler/ConfigHandler.hpp
@@ -1,13 +1,14 @@
-#ifndef _CONFIGHANDLER_HPP
-#define _CONFIGHANDLER_HPP
+#pragma once
#include