libsgxstep: Retrieve interrupted RIP in ISR

This is the _unprotected_ (non-enclave) RIP stored by the CPU on the stack,
which can be used for debugging.

libsgxstep/enclave.c

@@ -36,7 +36,7 @@ void* sgx_get_tcs(void);
 /* See aep_trampoline.S to see how these are used. */
 extern void sgx_step_aep_trampoline(void);
 aep_cb_t sgx_step_aep_cb = NULL;
-uint32_t nemesis_tsc_eresume = 0x0;
+uint64_t nemesis_tsc_eresume = 0x0;
 int sgx_step_eresume_cnt = 0;
 
 extern int fd_step;

libsgxstep/enclave.h

@@ -34,7 +34,7 @@ struct sgx_step_enclave_info
     char *drv;
 };
 
-extern uint32_t nemesis_tsc_eresume, nemesis_tsc_aex;
+extern uint64_t nemesis_tsc_eresume, nemesis_tsc_aex;
 extern int sgx_step_eresume_cnt;
 
 typedef void (*aep_cb_t)(void);

libsgxstep/irq_entry.S

@@ -14,7 +14,7 @@
 /* ********************************************************************** */
     .section isr_section,"awx",@progbits
     .align 0x1000
-    .global __ss_irq_fired, __ss_irq_count, __ss_irq_cpl, apic_base, nemesis_tsc_aex
+    .global __ss_irq_fired, __ss_irq_count, __ss_irq_cpl, apic_base, nemesis_tsc_aex, __ss_irq_rip
 __ss_irq_fired:
     .int 0x0
 __ss_irq_count:
@@ -30,6 +30,8 @@ __ss_irq_rax:
     .quad 0x0
 __ss_irq_rdx:
     .quad 0x0
+__ss_irq_rip:
+    .quad 0x0
 
 /* ********************************************************************** */
     .section isr_section,"awx",@progbits
@@ -41,12 +43,15 @@ __ss_irq_handler:
     mov %rdx, __ss_irq_rdx(%rip)
     rdtsc
     mov %eax, nemesis_tsc_aex(%rip)
+    mov %edx, nemesis_tsc_aex+4(%rip)
 
     /* IRQ bookkeeping */
-    incl __ss_irq_fired(%rip)
-    incl __ss_irq_count(%rip)
+    mov 0(%rsp), %rax
+    mov %rax, __ss_irq_rip(%rip)
     movw %cs,  __ss_irq_cpl(%rip)
     andw $0x3, __ss_irq_cpl(%rip)
+    incl __ss_irq_count(%rip)
+    incl __ss_irq_fired(%rip)
 
     /* apic_write(APIC_EOI, 0x0); */
     lea apic_base(%rip), %rax