From 074e95feb6b0b3e925e3bf7b703bd430371ac44c Mon Sep 17 00:00:00 2001 From: Wojciech Aleksander Woloszyn Date: Mon, 30 Sep 2024 13:52:40 +0100 Subject: [PATCH 1/2] Fix build with X2APIC false --- libsgxstep/apic.h | 1 + 1 file changed, 1 insertion(+) diff --git a/libsgxstep/apic.h b/libsgxstep/apic.h index c2cc1bd..ef4a5e1 100644 --- a/libsgxstep/apic.h +++ b/libsgxstep/apic.h @@ -74,6 +74,7 @@ void apic_init(void); /* read/write functions for XAPIC in MMIO access mode */ #if !X2APIC +extern void* apic_base; /* * From Linux kernel source: /arch/x86/include/asm/apic.h * NOTE: Intel SDM: "any access that touches bytes 4 through 15 of an APIC From 5045bf9af39999d8265ab77e07c27ca9a45419ca Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Wojciech=20Wo=C5=82oszyn?= Date: Mon, 30 Sep 2024 14:07:33 +0100 Subject: [PATCH 2/2] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index cdcc2ce..b1ff819 100644 --- a/README.md +++ b/README.md @@ -129,7 +129,7 @@ below. | Linux kernel parameter | Motivation | | ------------------------------------ | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ | -| `nox2apic` | Optionally configure local APIC device in memory-mapped I/O mode (to make use of SGX-Step's precise single-stepping features). Alternatively, you can leave the CPU in x2APIC mode and recent SGX-Step distributions should also be compatible. | +| `nox2apic` | Optionally configure local APIC device in memory-mapped I/O mode (to make use of SGX-Step's precise single-stepping features). If set, make sure to set X2APIC to 0 in libsgxstep/config.h. Alternatively, you can leave the CPU in x2APIC mode and recent SGX-Step distributions should also be compatible. | | `iomem=relaxed no_timer_check` | Suppress unneeded warning messages in the kernel logs. | | `nmi_watchdog=0` | Suppress the kernel NMI watchdog. | | `isolcpus=1` | Affinitize the victim process to an isolated CPU core. |