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@marjevan marjevan released this 17 Aug 17:49
· 12 commits to main since this release
v2023.04.16
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This release updates CPUs and instructions according to ISE rev-048 (Intel Architecture Instruction Set Extensions and Future Features), March 2023.

General:

  • Updated Python version requirement to 3.6 (closes #293)

Added:

  • Support new AMX instructions: TCMMIMFP16PS and TCMMRLFP16PS
  • Support Clang15 build
  • Support decode-encode of SAE/ROUNDC ignored ISA
  • Added mandatory 66 prefix API: xed_operand_values_mandatory_66_prefix()

Fixed:

  • Fixed XED-ILD standalone library for AVX512 instructions (fixes #298)
  • Chip-Check: Fixed CLDEMOTE mapping (for TREMONT and ALDER_LAKE)
  • Fixed Operand API: xed_operand_values_print_short()
  • Fixed FADD operand visibility
  • Changed NOP-0F1F to match SDM definition
  • Removed BROADCAST definition from VINSERTF128
  • Added missing UNDOCUMENTED attribute to instructions not documented in SDM
  • Fixed memory operand for PREFETCH instructions
  • Fixed SENDUIPI register operand width (fixes #292)
  • Fixed AMD LWP{INS,VAL} operand width (fixes #299)
  • Fixed git describe fail message (fixes #291)
  • Updated xed-doc-top (fixes #294)
  • Fixed libxed documentation for Windows (fixes #295)
  • Fixed legal headers

Modified:

  • Renamed XED operand: "REXRR" -> "REXR4"

Full Changelog: v2022.10.11...v2023.04.16

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