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Updated CPUs and instructions according to ISE (Intel Architecture Instruction Set Extensions and Future Features) rev-046, September 2022. Added: - Added new chips: Granite Rapids, Sierra Forest, Grand Ridge and Lakefield - Added new Instructions: AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8, CMPCCXADD, ICACHE_PREFETCH, MSRLIST, RAO-INT and WRMSRNS - Added getter API for VEX.pp prefix encoding value Fixed: - Fixed instructions-set list for SPR - Fixed first operand access definition for SSE compute instructions (#287) Modified: - Internal core modifications and updates
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v2022.08.11 | ||
v2022.10.11 |
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#BEGIN_LEGAL | ||
# | ||
#Copyright (c) 2022 Intel Corporation | ||
# | ||
# Licensed under the Apache License, Version 2.0 (the "License"); | ||
# you may not use this file except in compliance with the License. | ||
# You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, software | ||
# distributed under the License is distributed on an "AS IS" BASIS, | ||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
# See the License for the specific language governing permissions and | ||
# limitations under the License. | ||
# | ||
#END_LEGAL | ||
# | ||
# | ||
# | ||
# ***** GENERATED FILE -- DO NOT EDIT! ***** | ||
# ***** GENERATED FILE -- DO NOT EDIT! ***** | ||
# ***** GENERATED FILE -- DO NOT EDIT! ***** | ||
# | ||
# | ||
# | ||
AVX_INSTRUCTIONS():: | ||
# EMITTING TDPFP16PS (TDPFP16PS-128-1) | ||
{ | ||
ICLASS: TDPFP16PS | ||
CPL: 3 | ||
CATEGORY: AMX_TILE | ||
EXTENSION: AMX_FP16 | ||
ISA_SET: AMX_FP16 | ||
EXCEPTIONS: AMX-E4 | ||
REAL_OPCODE: Y | ||
ATTRIBUTES: NOTSX | ||
PATTERN: VV1 0x5C VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 mode64 | ||
OPERANDS: REG0=TMM_R():rw:tv:f32 REG1=TMM_B():r:tv:2f16 REG2=TMM_N():r:tv:2f16 | ||
IFORM: TDPFP16PS_TMMf32_TMM2f16_TMM2f16 | ||
} | ||
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#BEGIN_LEGAL | ||
# | ||
#Copyright (c) 2022 Intel Corporation | ||
# | ||
# Licensed under the Apache License, Version 2.0 (the "License"); | ||
# you may not use this file except in compliance with the License. | ||
# You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, software | ||
# distributed under the License is distributed on an "AS IS" BASIS, | ||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
# See the License for the specific language governing permissions and | ||
# limitations under the License. | ||
# | ||
#END_LEGAL | ||
|
||
XED_ISA_SET_AMX_FP16: amx_tiles.7.0.edx.24 amx_fp16.7.1.eax.21 |
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#BEGIN_LEGAL | ||
# | ||
#Copyright (c) 2022 Intel Corporation | ||
# | ||
# Licensed under the Apache License, Version 2.0 (the "License"); | ||
# you may not use this file except in compliance with the License. | ||
# You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, software | ||
# distributed under the License is distributed on an "AS IS" BASIS, | ||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
# See the License for the specific language governing permissions and | ||
# limitations under the License. | ||
# | ||
#END_LEGAL | ||
dec-instructions: amx-fp16-isa.xed.txt | ||
enc-instructions: amx-fp16-isa.xed.txt | ||
cpuid: cpuid.xed.txt |
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#BEGIN_LEGAL | ||
# | ||
#Copyright (c) 2022 Intel Corporation | ||
# | ||
# Licensed under the Apache License, Version 2.0 (the "License"); | ||
# you may not use this file except in compliance with the License. | ||
# You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, software | ||
# distributed under the License is distributed on an "AS IS" BASIS, | ||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
# See the License for the specific language governing permissions and | ||
# limitations under the License. | ||
# | ||
#END_LEGAL | ||
# | ||
# | ||
# | ||
# ***** GENERATED FILE -- DO NOT EDIT! ***** | ||
# ***** GENERATED FILE -- DO NOT EDIT! ***** | ||
# ***** GENERATED FILE -- DO NOT EDIT! ***** | ||
# | ||
# | ||
# | ||
AVX_INSTRUCTIONS():: | ||
# EMITTING VPMADD52HUQ (VPMADD52HUQ-128-2) | ||
{ | ||
ICLASS: VPMADD52HUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB5 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W1 | ||
OPERANDS: REG0=XMM_R():rw:dq:u64 REG1=XMM_N():r:dq:u64 REG2=XMM_B():r:dq:u64 | ||
IFORM: VPMADD52HUQ_XMMu64_XMMu64_XMMu64 | ||
} | ||
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||
{ | ||
ICLASS: VPMADD52HUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 | ||
OPERANDS: REG0=XMM_R():rw:dq:u64 REG1=XMM_N():r:dq:u64 MEM0:r:dq:u64 | ||
IFORM: VPMADD52HUQ_XMMu64_XMMu64_MEMu64 | ||
} | ||
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||
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||
# EMITTING VPMADD52HUQ (VPMADD52HUQ-256-2) | ||
{ | ||
ICLASS: VPMADD52HUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB5 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W1 | ||
OPERANDS: REG0=YMM_R():rw:qq:u64 REG1=YMM_N():r:qq:u64 REG2=YMM_B():r:qq:u64 | ||
IFORM: VPMADD52HUQ_YMMu64_YMMu64_YMMu64 | ||
} | ||
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{ | ||
ICLASS: VPMADD52HUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 | ||
OPERANDS: REG0=YMM_R():rw:qq:u64 REG1=YMM_N():r:qq:u64 MEM0:r:qq:u64 | ||
IFORM: VPMADD52HUQ_YMMu64_YMMu64_MEMu64 | ||
} | ||
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||
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||
# EMITTING VPMADD52LUQ (VPMADD52LUQ-128-2) | ||
{ | ||
ICLASS: VPMADD52LUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB4 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W1 | ||
OPERANDS: REG0=XMM_R():rw:dq:u64 REG1=XMM_N():r:dq:u64 REG2=XMM_B():r:dq:u64 | ||
IFORM: VPMADD52LUQ_XMMu64_XMMu64_XMMu64 | ||
} | ||
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||
{ | ||
ICLASS: VPMADD52LUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 | ||
OPERANDS: REG0=XMM_R():rw:dq:u64 REG1=XMM_N():r:dq:u64 MEM0:r:dq:u64 | ||
IFORM: VPMADD52LUQ_XMMu64_XMMu64_MEMu64 | ||
} | ||
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||
|
||
# EMITTING VPMADD52LUQ (VPMADD52LUQ-256-2) | ||
{ | ||
ICLASS: VPMADD52LUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB4 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W1 | ||
OPERANDS: REG0=YMM_R():rw:qq:u64 REG1=YMM_N():r:qq:u64 REG2=YMM_B():r:qq:u64 | ||
IFORM: VPMADD52LUQ_YMMu64_YMMu64_YMMu64 | ||
} | ||
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||
{ | ||
ICLASS: VPMADD52LUQ | ||
CPL: 3 | ||
CATEGORY: AVX_IFMA | ||
EXTENSION: AVX_IFMA | ||
ISA_SET: AVX_IFMA | ||
EXCEPTIONS: avx-type-4 | ||
REAL_OPCODE: Y | ||
PATTERN: VV1 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 | ||
OPERANDS: REG0=YMM_R():rw:qq:u64 REG1=YMM_N():r:qq:u64 MEM0:r:qq:u64 | ||
IFORM: VPMADD52LUQ_YMMu64_YMMu64_MEMu64 | ||
} | ||
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||
|
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@@ -0,0 +1,19 @@ | ||
#BEGIN_LEGAL | ||
# | ||
#Copyright (c) 2022 Intel Corporation | ||
# | ||
# Licensed under the Apache License, Version 2.0 (the "License"); | ||
# you may not use this file except in compliance with the License. | ||
# You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, software | ||
# distributed under the License is distributed on an "AS IS" BASIS, | ||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
# See the License for the specific language governing permissions and | ||
# limitations under the License. | ||
# | ||
#END_LEGAL | ||
|
||
XED_ISA_SET_AVX_IFMA: avx_ifma.7.1.eax.23 |
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---|---|---|
@@ -0,0 +1,22 @@ | ||
#BEGIN_LEGAL | ||
# | ||
#Copyright (c) 2022 Intel Corporation | ||
# | ||
# Licensed under the Apache License, Version 2.0 (the "License"); | ||
# you may not use this file except in compliance with the License. | ||
# You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, software | ||
# distributed under the License is distributed on an "AS IS" BASIS, | ||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
# See the License for the specific language governing permissions and | ||
# limitations under the License. | ||
# | ||
#END_LEGAL | ||
dec-instructions: avx-ifma-isa.xed.txt | ||
enc-instructions: avx-ifma-isa.xed.txt | ||
cpuid : cpuid.xed.txt | ||
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