Merge pull request #15 from hpc-io/develop

Remove operation from configuration file and fix for HDF5 1.8
hpc-io · Jul 28, 2021 · 9d3438c · 9d3438c
2 parents a08311d + 1e52c92
commit 9d3438c
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Showing 13 changed files with 20 additions and 54 deletions.
diff --git a/.github/workflows/linux.yml b/.github/workflows/linux.yml
@@ -93,7 +93,7 @@ jobs:
           make
 
       - name: Build h5bench ASYNC
-        run: |  
+        run: |
           mydir="$PWD"
           mkdir build_async
           cd build_async
@@ -103,23 +103,23 @@ jobs:
       - name: Test h5bench SYNC Read & Write (NON)
         run: |
           cd build_sync
-          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_write_cc1d_small.cfg testwrite.h5
-          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_read_cc1d_small.cfg testwrite.h5
+          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small.cfg file.h5
+          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small.cfg file.h5
           
       - name: Test h5bench ASYNC Read & Write (NON)
         run: |
           cd build_async
-          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_write_cc1d_small.cfg testwrite.h5
-          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_read_cc1d_small.cfg testwrite.h5
+          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small.cfg file.h5
+          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small.cfg file.h5
           
       - name: Test h5bench ASYNC Read & Write (IMP)
         run: |
           cd build_async
-          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_write_cc1d_small_IMP.cfg testwrite_IMP.h5
-          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_read_cc1d_small_IMP.cfg testwrite_IMP.h5
+          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small_IMP.cfg file_IMP.h5
+          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small_IMP.cfg file_IMP.h5
           
       - name: Test h5bench ASYNC Read & Write (EXP)
         run: |
           cd build_async
-          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_write_cc1d_small_EXP.cfg testwrite_EXP.h5
-          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_read_cc1d_small_EXP.cfg testwrite_EXP.h5
+          ./h5bench_write /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small_EXP.cfg file_EXP.h5
+          ./h5bench_read /home/runner/work/h5bench/h5bench/h5bench_patterns/sample_config/sample_cc1d_small_EXP.cfg file_EXP.h5
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
@@ -39,7 +39,7 @@ test:
       - export LD_LIBRARY_PATH=$HDF5_DIR/lib:$LD_LIBRARY_PATH
       - export MPICH_MAX_THREAD_SAFETY=multiple
       - echo "Test h5bench SYNC write"
-      - srun -n 2 ./h5bench_write ../h5bench_patterns/sample_config/sample_write_cc1d_small.cfg file.h5
+      - srun -n 2 ./h5bench_write ../h5bench_patterns/sample_config/sample_cc1d_small.cfg file.h5
       - echo "Test h5bench SYNC read"
-      - srun -n 2 ./h5bench_read ../h5bench_patterns/sample_config/sample_read_cc1d_small.cfg file.h5
+      - srun -n 2 ./h5bench_read ../h5bench_patterns/sample_config/sample_cc1d_small.cfg file.h5
       - ls -larth file.h5
diff --git a/h5bench_patterns/h5bench_read.c b/h5bench_patterns/h5bench_read.c
@@ -77,7 +77,9 @@ read_h5_data(time_step *ts, hid_t loc, hid_t *dset_ids, hid_t filespace, hid_t m
     hid_t         dapl;
     unsigned long t1, t2, t3;
     dapl = H5Pcreate(H5P_DATASET_ACCESS);
+#if H5_VERSION_GE(1, 10, 0)
     H5Pset_all_coll_metadata_ops(dapl, true);
+#endif
 
     t1          = get_time_usec();
     dset_ids[0] = H5Dopen_async(loc, "x", dapl, ts->es_meta_create);
@@ -341,10 +343,14 @@ set_pl(hid_t *fapl, hid_t *gapl)
 {
     *fapl = H5Pcreate(H5P_FILE_ACCESS);
     H5Pset_fapl_mpio(*fapl, MPI_COMM_WORLD, MPI_INFO_NULL);
+#if H5_VERSION_GE(1, 10, 0)
     H5Pset_all_coll_metadata_ops(*fapl, true);
     H5Pset_coll_metadata_write(*fapl, true);
+#endif
     *gapl = H5Pcreate(H5P_GROUP_ACCESS);
+#if H5_VERSION_GE(1, 10, 0)
     H5Pset_all_coll_metadata_ops(*gapl, true);
+#endif
 }
 
 void
@@ -386,12 +392,6 @@ main(int argc, char *argv[])
         return 0;
     }
 
-    if (params.io_op != IO_READ) {
-        if (MY_RANK == 0)
-            printf("Make sure the configuration file has IO_OPERATION=READ defined\n");
-        return 0;
-    }
-
     hid_t fapl, gapl;
     set_pl(&fapl, &gapl);
 

diff --git a/h5bench_patterns/h5bench_write.c b/h5bench_patterns/h5bench_write.c
@@ -885,8 +885,10 @@ set_metadata(hid_t fapl, int align, unsigned long threshold, unsigned long align
     if (meta_collective == 1) {
         if (MY_RANK == 0)
             printf("Collective write: enabled.\n");
+#if H5_VERSION_GE(1, 10, 0)
         H5Pset_all_coll_metadata_ops(fapl, 1);
         H5Pset_coll_metadata_write(fapl, 1);
+#endif
     }
     else {
         if (MY_RANK == 0)
@@ -964,12 +966,6 @@ main(int argc, char *argv[])
         return 0;
     }
 
-    if (params.io_op != IO_WRITE) {
-        if (MY_RANK == 0)
-            printf("Make sure the configuration file has IO_OPERATION=WRITE defined\n");
-        return 0;
-    }
-
     if (params.useCompress)
         params.data_coll = 1;
 

diff --git a/h5bench_patterns/sample_config/sample_2d_compressed.cfg b/h5bench_patterns/sample_config/sample_2d_compressed.cfg
@@ -1,6 +1,5 @@
 # this is a comment
 # Benchmark mode can only be one of these: CC/CI/IC/II/CC2D/CI2D/IC2D/II2D/CC2D/CC3D
-IO_OPERATION=READ
 MEM_PATTERN=CONTIG
 FILE_PATTERN=CONTIG
 READ_OPTION=FULL

diff --git a/.../sample_config/sample_read_cc1d_small.cfg → ...terns/sample_config/sample_cc1d_small.cfg b/.../sample_config/sample_read_cc1d_small.cfg → ...terns/sample_config/sample_cc1d_small.cfg
@@ -1,7 +1,6 @@
 # this is a comment
 # Benchmark mode can only be one of these: CC/CI/IC/II/CC2D/CI2D/IC2D/II2D/CC2D/CC3D
 # Template cof include all options
-IO_OPERATION=READ
 MEM_PATTERN=CONTIG
 FILE_PATTERN=CONTIG
 NUM_PARTICLES=16 M #16 K/G

diff --git a/...ple_config/sample_read_cc1d_small_EXP.cfg → ...s/sample_config/sample_cc1d_small_EXP.cfg b/...ple_config/sample_read_cc1d_small_EXP.cfg → ...s/sample_config/sample_cc1d_small_EXP.cfg
@@ -1,7 +1,6 @@
 # this is a comment
 # Benchmark mode can only be one of these: CC/CI/IC/II/CC2D/CI2D/IC2D/II2D/CC2D/CC3D
 # Template cof include all options
-IO_OPERATION=READ
 MEM_PATTERN=CONTIG
 FILE_PATTERN=CONTIG
 NUM_PARTICLES=16 M #16 K/G

diff --git a/...ple_config/sample_read_cc1d_small_IMP.cfg → ...s/sample_config/sample_cc1d_small_IMP.cfg b/...ple_config/sample_read_cc1d_small_IMP.cfg → ...s/sample_config/sample_cc1d_small_IMP.cfg
@@ -1,7 +1,6 @@
 # this is a comment
 # Benchmark mode can only be one of these: CC/CI/IC/II/CC2D/CI2D/IC2D/II2D/CC2D/CC3D
 # Template cof include all options
-IO_OPERATION=READ
 MEM_PATTERN=CONTIG
 FILE_PATTERN=CONTIG
 NUM_PARTICLES=16 M #16 K/G

diff --git a/h5bench_patterns/sample_config/sample_read_cc1d.cfg b/h5bench_patterns/sample_config/sample_read_cc1d.cfg
@@ -1,6 +1,5 @@
 # this is a comment
 # Benchmark mode can only be one of these: CC/CI/IC/II/CC2D/CI2D/IC2D/II2D/CC2D/CC3D
-IO_OPERATION=READ
 READ_OPTION=FULL
 NUM_DIMS=1
 NUM_PARTICLES=8 M

diff --git a/h5bench_patterns/sample_config/sample_read_cc1d_es1.cfg b/h5bench_patterns/sample_config/sample_read_cc1d_es1.cfg
@@ -1,5 +1,4 @@
 # this is a comment
-IO_OPERATION=READ
 TO_READ_NUM_PARTICLES=16777216
 READ_OPTION=READ_FULL
 MEM_PATTERN=CONTIG

diff --git a/h5bench_patterns/sample_config/sample_write_cc1d.cfg b/h5bench_patterns/sample_config/sample_write_cc1d.cfg
@@ -17,7 +17,7 @@ NUM_DIMS=1
 DIM_1=16777216 #16777216 # 16777216, 8388608
 DIM_2=1
 DIM_3=1
-ASYNC_MODE=NON #EXP #ASYNC_IMP ASYNC_NON ASYNC_EXP
+ASYNC_MODE=IMP #EXP #ASYNC_IMP ASYNC_NON ASYNC_EXP
 CSV_FILE=perf_write_1d.csv
 #===========================
 #WRITE_PATTERN=CC
diff --git a/h5bench_patterns/sample_config/sample_write_cc1d_small.cfg b/h5bench_patterns/sample_config/sample_write_cc1d_small.cfg
diff --git a/h5bench_patterns/sample_config/template.cfg b/h5bench_patterns/sample_config/template.cfg
@@ -11,7 +11,6 @@ DIM_2=1
 DIM_3=1
 #========================================================
 #   IO pattern settings
-IO_OPERATION=READ # WRITE
 MEM_PATTERN=CONTIG # INTERLEAVED STRIDED
 FILE_PATTERN=CONTIG # STRIDED
 #========================================================