fix 23 bit

hacknus · Apr 24, 2024 · 86a9923 · 86a9923
1 parent 02edf5f
commit 86a9923
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/src/lib.rs b/src/lib.rs
@@ -611,8 +611,8 @@ impl<SPI, CS, EN, E> Tmc5160<SPI, CS, EN>
     /// get the current velocity
     pub fn get_velocity(&mut self) -> Result<f32, Error<E>> {
         self.read_register(Registers::VACTUAL).map(|val| {
-            if (val.data & 0b1000000000000000000000000) == 0b1000000000000000000000000 {
-                ((8388607 - (val.data & 0b111111111111111111111111) as i32) as f64 / self._step_count as f64) as f32
+            if (val.data & 0b100000000000000000000000) == 0b100000000000000000000000 {
+                ((8388607 - (val.data & 0b11111111111111111111111) as i32) as f64 / self._step_count as f64) as f32
             } else {
                 ((val.data as i32) as f64 / self._step_count as f64) as f32
             }