VLSI_Project

The project is titled as SoC based AHB - APB Bridge design The project is part of VLSI Design Internship with Aceic Design Technologies All the RTL files are compile ready and checked with simulation. The simulation project files are in Simulation folder. The syntheisze project file are in Syn folder Model Sim and Quartus tools are used AHB-APB Bridge .pdf file was used as specification sheet. At the end of the project and internship a review meet was conducted successfully. For self practice Layout DRC and LVS and verification using UVM will be performed and uploaded