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Xtensa patches (16.x) (Do not merge, PR created for easier review only) #82
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Initial codegen support for simple ALU operations.
Constant Pool.
operations. Lower ConstantPool, GlobalAddress, BlockAddress and JumpTable. Implement lowering of External and JumpTable symbols to MCInst representation.
Implement lowering of dynamic_stackalloc, stacksave, stackrestore.
Also lower SHL, SRA, SRL with register operands.
patterns. Implement load unsigned 8-bit pseudo operation. Implement extending loads patterns extloadi1/i8/i16.
Add support for llvm.{frameaddress,returnaddress} intrinsics.
Implement volatile load/store from/to volatile memory location.
scavenger. Reserve an emergency spill slot for the register scavenger when Windowed Call ABI is used.
Also implement User Registers class.
SELECT_CC/SETCC/BR_CC. Implement DAG Combine for BRCOND operation with f32 operands.
Extend Xtensa C ABI test to include v1i1 parameters.
Adding __builtin_xtensa_movt_s and __builtin_xtensa_movf_s intrinsics. Adding intrincic patterns to MOVT_S anf MOVF_S definitions.
This patch adds a definition of Xtensa LX6 CPU variant present in Intel Cannonlake and Tigerlake SOC platforms.
Some Xtensa targets may still use GAS as a default assemblwr through -fno-integrated-as option. These changes make the assembly output compatible with GAS by default. - GAS does not recognize .word but .2byte works for both - Dwarf CFI is not supported by GAS. Option -fdwarf-exceptions can still turn it on but there is no option to turn it off, so an opt-in approach is more portable.
Xtensa architecture uses v2i1 (BR2 reg class) and v4i1 (BR4 reg class) boolean vectors as arguments for HIFI instructions: - vector compare, e.g.: AE_EQ16X4 - vector conditional move, e.g: AE_MOVT16X4
This option is passed to GNU AS and makes Xtensa compiler driver compatible with GCC.
Intrinsics: __builtin_xtensa_ae_int32x2 and builtin_xtensa_int32 are convenience functions for easy integer-vector and vector-vector conversions that conform to Xtensa coding style. Xtensa C dialect allows for implicit conversion between wider and narrower vector (via shuffle) and between integer and any vector (via broadcast). Standard Clang vectors do not support this, so these functions provide a handicap for better portability.
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