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New upstream version 6.11 #5

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164 changes: 164 additions & 0 deletions .ci/travis-prepare.sh
Original file line number Diff line number Diff line change
@@ -0,0 +1,164 @@
#!/bin/sh
set -e -x

SUPPORT=$HOME/.cache/support

install -d $SUPPORT

# Conditionally build IPAC
if [ -n "$IPAC" ]; then
IPAC_PATH=$SUPPORT/ipac
else
IPAC_PATH=
fi

RELEASE_PATH=$TRAVIS_BUILD_DIR/configure/RELEASE
EPICS_BASE=$SUPPORT/epics-base

cat << EOF > $RELEASE_PATH
IPAC=$IPAC_PATH
SNCSEQ=$SUPPORT/seq
ASYN=$SUPPORT/asyn
EPICS_BASE=$SUPPORT/epics-base
EOF

# use default selection for MSI
sed -i -e '/MSI/d' configure/CONFIG_SITE

if [ ! -e "$EPICS_BASE/built" ]
then

git clone --depth 10 --branch $BASE https://github.com/epics-base/epics-base.git $EPICS_BASE

EPICS_HOST_ARCH=`sh $EPICS_BASE/startup/EpicsHostArch`

case "$STATIC" in
static)
cat << EOF >> "$EPICS_BASE/configure/CONFIG_SITE"
SHARED_LIBRARIES=NO
STATIC_BUILD=YES
EOF
;;
*) ;;
esac

case "$CMPLR" in
clang)
echo "Host compiler is clang"
cat << EOF >> $EPICS_BASE/configure/os/CONFIG_SITE.Common.$EPICS_HOST_ARCH
GNU = NO
CMPLR_CLASS = clang
CC = clang
CCC = clang++
EOF
;;
*) echo "Host compiler is default";;
esac

# requires wine and g++-mingw-w64-i686
if [ "$WINE" = "32" ]
then
echo "Cross mingw32"
sed -i -e '/CMPLR_PREFIX/d' $EPICS_BASE/configure/os/CONFIG_SITE.linux-x86.win32-x86-mingw
cat << EOF >> $EPICS_BASE/configure/os/CONFIG_SITE.linux-x86.win32-x86-mingw
CMPLR_PREFIX=i686-w64-mingw32-
EOF
cat << EOF >> $EPICS_BASE/configure/CONFIG_SITE
CROSS_COMPILER_TARGET_ARCHS+=win32-x86-mingw
EOF
fi

# set RTEMS to eg. "4.9" or "4.10"
if [ -n "$RTEMS" ]
then
echo "Cross RTEMS${RTEMS} for pc386"
install -d /home/travis/.cache
curl -L "https://github.com/mdavidsaver/rsb/releases/download/travis-20160306-2/rtems${RTEMS}-i386-trusty-20190306-2.tar.gz" \
| tar -C /home/travis/.cache -xj

sed -i -e '/^RTEMS_VERSION/d' -e '/^RTEMS_BASE/d' $EPICS_BASE/configure/os/CONFIG_SITE.Common.RTEMS
cat << EOF >> $EPICS_BASE/configure/os/CONFIG_SITE.Common.RTEMS
RTEMS_VERSION=$RTEMS
RTEMS_BASE=/home/travis/.cache/rtems${RTEMS}-i386
EOF
cat << EOF >> $EPICS_BASE/configure/CONFIG_SITE
CROSS_COMPILER_TARGET_ARCHS+=RTEMS-pc386
EOF

fi

make -C "$EPICS_BASE" -j2
# get MSI for 3.14
case "$BASE" in
3.14*)
echo "Build MSI"
install -d "$HOME/msi/extensions/src"
curl https://epics.anl.gov/download/extensions/extensionsTop_20120904.tar.gz | tar -C "$HOME/msi" -xvz
curl https://epics.anl.gov/download/extensions/msi1-7.tar.gz | tar -C "$HOME/msi/extensions/src" -xvz
mv "$HOME/msi/extensions/src/msi1-7" "$HOME/msi/extensions/src/msi"

cat << EOF > "$HOME/msi/extensions/configure/RELEASE"
EPICS_BASE=$EPICS_BASE
EPICS_EXTENSIONS=\$(TOP)
EOF
make -C "$HOME/msi/extensions"
cp "$HOME/msi/extensions/bin/$EPICS_HOST_ARCH/msi" "$EPICS_BASE/bin/$EPICS_HOST_ARCH/"
echo 'MSI:=$(EPICS_BASE)/bin/$(EPICS_HOST_ARCH)/msi' >> "$EPICS_BASE/configure/CONFIG_SITE"

cat <<EOF >> configure/CONFIG_SITE
MSI = \$(EPICS_BASE)/bin/\$(EPICS_HOST_ARCH)/msi
EOF

;;
*) echo "Use MSI from Base"
;;
esac

touch $EPICS_BASE/built
else
echo "Using cached epics-base!"
fi

# IPAC
if [ -n "$IPAC" ]; then
if [ ! -e "$SUPPORT/ipac/built" ]; then
echo "Build ipac"
install -d $SUPPORT/ipac
git clone --depth 10 --branch $IPAC https://github.com/epics-modules/ipac.git $SUPPORT/ipac
cat << EOF > $SUPPORT/ipac/configure/RELEASE
EPICS_BASE=$SUPPORT/epics-base
EOF
make -C $SUPPORT/ipac
touch $SUPPORT/ipac/built
else
echo "Using cached ipac"
fi
else
echo "Skipping ipac"
fi


# sequencer
if [ ! -e "$SUPPORT/seq/built" ]; then
echo "Build sequencer"
install -d $SUPPORT/seq
curl -L "http://www-csr.bessy.de/control/SoftDist/sequencer/releases/seq-${SEQ}.tar.gz" | tar -C $SUPPORT/seq -xvz --strip-components=1
cp $RELEASE_PATH $SUPPORT/seq/configure/RELEASE
make -C $SUPPORT/seq
touch $SUPPORT/seq/built
else
echo "Using cached seq"
fi


# asyn
if [ ! -e "$SUPPORT/asyn/built" ]; then
echo "Build asyn"
install -d $SUPPORT/asyn
curl -L "https://epics.anl.gov/download/modules/asyn${ASYN}.tar.gz" | tar -C $SUPPORT/asyn -xvz --strip-components=1
cp $RELEASE_PATH $SUPPORT/asyn/configure/RELEASE
make -C "$SUPPORT/asyn" -j2
touch $SUPPORT/asyn/built
else
echo "Using cached asyn"
fi
5 changes: 5 additions & 0 deletions .gitattributes
Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
#Which files need CRLF handling
* text=auto
*.sh eol=lf
*.bat eol=crlf
*.cmd -text
17 changes: 17 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
*~
O.*
*.swp
*BAK.adl
bin/
db/
dbd/
html/
include/
lib/
templates/
cdCommands
envPaths
dllPath.bat
auto_settings.sav*
auto_positions.sav*
.ccfxprepdir/
27 changes: 27 additions & 0 deletions .travis.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
sudo: false
dist: trusty
language: c
compiler:
- gcc
cache:
directories:
- $HOME/.cache
addons:
apt:
packages:
- libreadline6-dev
- libncurses5-dev
- perl
- clang
- g++-mingw-w64-i686
- re2c
env:
- BASE=3.14 STATIC=shared SEQ=2.2.4 ASYN=4-31 IPAC=2.14
- BASE=3.14 STATIC=static SEQ=2.2.4 ASYN=4-31 IPAC=2.14
- BASE=R3.15.5 STATIC=shared SEQ=2.2.4 ASYN=4-31 IPAC=2.14
- BASE=R3.15.5 STATIC=static SEQ=2.2.4 ASYN=4-31 IPAC=2.14
- BASE=3.16 STATIC=shared RTEMS=4.10 SEQ=2.2.4 ASYN=4-31 IPAC=2.14
- BASE=3.16 STATIC=shared CMPLR=clang WINE=32 SEQ=2.2.4 ASYN=4-31 IPAC=
- BASE=3.16 STATIC=static WINE=32 SEQ=2.2.4 ASYN=4-31 IPAC=
install: ./.ci/travis-prepare.sh
script: make
79 changes: 78 additions & 1 deletion README
Original file line number Diff line number Diff line change
@@ -1,4 +1,13 @@
Motor Module R6-9 Release Notes
Notice
======

This file was historically used to document changes to the motor module that
were relevant to developers. It is largely obsolete now that the motor module
has moved github. It will not be updated in the future and is likely to move
to the documentation directory.


Motor Module R6-10 Release Notes
===============================================================================

The motor module software in this release is compatible with EPICS base
Expand Down Expand Up @@ -144,6 +153,74 @@ Known Problems
- Tapping the Jog button can cause the motor to move past the
soft-travel limit when backlash is nonzero.

Modification Log for R6-10
==========================

2) Fix for OMS controllers that do not have the correct deceleration rate at
the end of a JOG. Bug introduced with item #9 under R6-6.

File modified: OmsSrc/devOmsCom.cc

3) - If the user request UEIP be set true and the MSTA's EA_PRESENT indicator
is off, then special() denies the request and sets UEIP false. In other
words, UEIP can only be set true if the device/driver has set the
"Encoder is Present" MSTA indicator true. Replaced six occurrences of
logic that tested both UEIP and EA_PRESENT with just UEIP.

- UEIP and URIP are mutually exclusive. For example, if the user request
UEIP be set true when URIP is also true, then the special() function
will set URIP off and vice versa. Added the special attribute to URIP.

- If URIP is true and the RDBL link points to a valid DBR_DOUBLE, then the
value pointed to by RDBL will be multiplied by RRES, divided by MRES
and stored in RRBV. This fixes a problem with all previous releases
where RRBV was inconsistent with DRBV when URIP was true.

Files modified: motorApp/MotorSrc/motorRecord.cc
motorApp/MotorSrc/motorRecord.dbd

4) Fix for build errors when SNCSEQ isn't defined in the RELEASE file.

Files added: motorApp/AerotechSrc/devAerotechSeq.dbd
motorApp/NewportSrc/devNewportSeq.dbd
Files modified: motorApp/AerotechSrc/Makefile
motorApp/AerotechSrc/devAerotech.dbd
motorApp/NewportSrc/Makefile
motorApp/NewportSrc/devNewport.dbd

5) M�rcio Paduan Donadio (LNLS) fixed a bug with SYNC field processing. SYNC
was being ignored when URIP == True.

Files modified: syncTargetPosition() in motorRecord.cc

6) Kevin Peterson discovered an initialization bug when the motor record is
configured to do retries. When configured to do retries, the motor
record issues incremental rather than absolute moves. If the motor
behaves badly (e.g., a piezo stiction motor) the controller's absolute
step count can be far from its' absolute readback position. The motor
record initialization logic that determines how the target positions
are initialized at boot-up was not taking into consideration whether
or not the motor record is configured to do retries, and therefore,
whether or not absolute or incremental moves were issued by the motor
record. With this release, if the motor record is configured to do
retries, then the controller's absolute position is ignored (because
the controller's absolute position was "corrupted" by retries) and the
autosave/restore position is used to set the controllers position.

Switching between retries on and off (relative vs. absolute moves)
between reboots will cause unpredictable results and is not covered
by this bug fix.

Files modified: motor_init_record_com() in MotorSrc/motordevCom.cc
init_controller() in MotorSrc/devMotorAsyn.c

7) The MAXv User's Manual specifies that "The IRQ interrupt level range is
0x010-0x111 (IRQ2-7)...". The appropriate error check has been added to
the MAXvSetup() call.

File modified: OmsSrc/drvMAXv.cc


Modification Log for R6-9
=========================

Expand Down
17 changes: 17 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
# motor
APS BCDA synApps module: motor

[![Build Status](https://travis-ci.org/epics-modules/motor.png)](https://travis-ci.org/epics-modules/motor)

**Note**: Current discussion on future of the *motor* module repository: https://github.com/epics-modules/motor/issues/55

For more information, see:
* [main page](https://epics-modules.github.io/motor)
* [motor wiki](https://github.com/epics-modules/motor/wiki)
* http://www.aps.anl.gov/bcda/synApps
* [HTML documentation](https://github.com/epics-modules/motor/blob/master/docs/README.md)

[Report an issue with Motor](https://github.com/epics-modules/motor/issues/new?title=%20ISSUE%20NAME%20HERE&body=**Describe%20the%20issue**%0A%0A**Steps%20to%20reproduce**%0A1.%20Step%20one%0A2.%20Step%20two%0A3.%20Step%20three%0A%0A**Expected%20behaivour**%0A%0A**Actual%20behaviour**%0A%0A**Build%20Environment**%0AArchitecture:%0AEpics%20Base%20Version:%0ADependent%20Module%20Versions:&labels=bug)
[Request a feature](https://github.com/epics-modules/motor/issues/new?title=%20FEATURE%20SHORT%20DESCRIPTION&body=**Feature%20Long%20Description**%0A%0A**Why%20should%20this%20be%20added?**%0A&labels=enhancement)

converted from APS SVN repository: Fri Oct 16 12:31:41 CDT 2015
5 changes: 4 additions & 1 deletion configure/RELEASE
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ SUPPORT=
# Recommended ASYN release: R4-23
ASYN=$(SUPPORT)/asyn/R4-23

# Need the sequencer and the bust record for the MM4005 and XPS trajectory scanning
# Need the sequencer and the busy record for the MM4005 and XPS trajectory scanning
# Recommended SNCSEQ release: R2.1.16
SNCSEQ=$(SUPPORT)/seq/seq-2-1-16
# Recommended BUSY release: R1-6
Expand All @@ -37,6 +37,9 @@ EPICS_BASE=
# Recommended IPAC release: R2-12
IPAC=$(SUPPORT)/ipac/R2-12

# Script module needed to build ScriptMotorController
#!LUA=$(SUPPORT)/lua

# The following is only needed for the motor examples in iocBoot.
#!MOTOR=$(TOP)

4 changes: 4 additions & 0 deletions documentation/Doxyfile → docs/Doxyfile
Original file line number Diff line number Diff line change
Expand Up @@ -586,6 +586,10 @@ INPUT = ../../asyn/asyn/miscellaneous/asynPortDriver.cpp \
../motorApp/NewportSrc/XPSController.h \
../motorApp/NewportSrc/XPSController.cpp \
../motorApp/NewportSrc/XPSAxis.h \
../motorApp/NewportSrc/AG_CONEX.cpp \
../motorApp/NewportSrc/AG_CONEX.h \
../motorApp/NewportSrc/AG_UC.cpp \
../motorApp/NewportSrc/AG_UC.h \
../motorApp/NewportSrc/XPSAxis.cpp \
../motorApp/MotorSimSrc/motorSimDriver.h \
../motorApp/MotorSimSrc/motorSimDriver.cpp
Expand Down
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