From d09d297c5d28bd0af4dd8bf3ca66d8dbbd196d9d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Lu=C3=ADs=20Marques?= Date: Thu, 7 Apr 2022 12:00:41 +0100 Subject: [PATCH] [RISCV] Fix crash for section alignment with .option norvc The existing code wasn't getting the subtarget info from the fragment, so the current status of RVC would be ignored. This would cause a crash for the new test case when the target then reported it couldn't write the requested number of code alignment bytes. Differential Revision: https://reviews.llvm.org/D122236 --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 8 +++++--- llvm/test/MC/RISCV/align-option-relax.s | 8 ++++++++ llvm/test/MC/RISCV/align.s | 8 ++++++++ 3 files changed, 21 insertions(+), 3 deletions(-) create mode 100644 llvm/test/MC/RISCV/align-option-relax.s diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 514789b3f6459c..4b940093482f58 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -583,10 +583,11 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign( const MCAlignFragment &AF, unsigned &Size) { // Calculate Nops Size only when linker relaxation enabled. - if (!STI.getFeatureBits()[RISCV::FeatureRelax]) + const MCSubtargetInfo *STI = AF.getSubtargetInfo(); + if (!STI->getFeatureBits()[RISCV::FeatureRelax]) return false; - bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; + bool HasStdExtC = STI->getFeatureBits()[RISCV::FeatureStdExtC]; unsigned MinNopLen = HasStdExtC ? 2 : 4; if (AF.getAlignment() <= MinNopLen) { @@ -606,7 +607,8 @@ bool RISCVAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm, const MCAsmLayout &Layout, MCAlignFragment &AF) { // Insert the fixup only when linker relaxation enabled. - if (!STI.getFeatureBits()[RISCV::FeatureRelax]) + const MCSubtargetInfo *STI = AF.getSubtargetInfo(); + if (!STI->getFeatureBits()[RISCV::FeatureRelax]) return false; // Calculate total Nops we need to insert. If there are none to insert diff --git a/llvm/test/MC/RISCV/align-option-relax.s b/llvm/test/MC/RISCV/align-option-relax.s new file mode 100644 index 00000000000000..890e1e72d77061 --- /dev/null +++ b/llvm/test/MC/RISCV/align-option-relax.s @@ -0,0 +1,8 @@ +# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \ +# RUN: | llvm-readobj -r - | FileCheck %s + +# Check that .option relax overrides -mno-relax and enables R_RISCV_ALIGN +# relocations. +# CHECK: R_RISCV_ALIGN + .option relax + .align 4 diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s index 804effb6600b22..75ea8eb77bbd47 100644 --- a/llvm/test/MC/RISCV/align.s +++ b/llvm/test/MC/RISCV/align.s @@ -112,3 +112,11 @@ data1: # C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN data2: .word 9 +# Check that the initial alignment is properly handled when using .option to +# disable the C extension. This used to crash. +# C-EXT-RELAX-INST: <.text2>: +# C-EXT-RELAX-INST-NEXT: add a0, a0, a1 + .section .text2, "x" + .option norvc + .balign 4 + add a0, a0, a1