x32_DDS

Description

DIRECT DIGITAL SYNTHESIZER (DDS). Sine and Cosine generation with amplitude resolution of 16 bits, adjustable phase offset, phase increment and resync. The core accommodates the generated waves to the 16 most significant bits (MSB) of the output ports, which corresponds to a sine and cosine wave of amplitude=1V.

The phase (p) of the cosine and sine waves reads:
p=2*PI*(pOff+pInc*i)/2^32.............IF resync==0,
p=2*PI*(pOff)/2^32............................IF resync==1,
where i is the number of clk cycles since the resync port is 0.

See Xilinx DDS Compiler for further information on the backend.

Ports

Name	Direction	Width	Comment
pInc	Rx	32 bit	Phase increment
pOff	Rx	32 bit	Phase offset
resync	Rx	1 bit	RUNNING_PHASE IF resync==0 RESET_PHASE IF resync==1
cos	Tx	32 bit	cos(p)
sin	Tx	32 bit	sin(p)

VHDL

x32_DDS.vhd.